Patents Examined by Aaron D Ho
  • Patent number: 10866737
    Abstract: Techniques and mechanisms for exchanging information between a solid state drive (SSD) and a write-in-place non-volatile memory via a host device. In an embodiment, access control information defines state of the SSD, where the access control information determines and/or is based on an access by the host device to other non-volatile memory of the SSD. The access control information includes address conversion information defining a correspondence of a logical address with a physical address for a location of the other non-volatile memory of the SSD. At least some of the access control information is stored by the SSD to the write-in-place non-volatile memory for later retrieval by the SSD. In another embodiment, the SSD signals that a commit operation is to be performed to flush any cached or buffered access control information into the write-in-place non-volatile memory.
    Type: Grant
    Filed: September 17, 2015
    Date of Patent: December 15, 2020
    Assignee: Intel Corporation
    Inventors: Anand S. Ramalingam, James A. Boyd, Myron Loewen
  • Patent number: 10866741
    Abstract: A storage appliance includes a first SSD, a second SSD, and a controller. The controller is able to calculate a first utilization parameter of the first SSD and a second utilization parameter of the second SSD. If the first utilization parameter is less than a threshold and the second utilization parameter exceeds the threshold, the controller identifies a data range stored on the first SSD to be removed. The removal of the data range from the first SSD causes the first utilization parameter to exceed the threshold. The controller then migrates the data range from the first SSD to the second SSD.
    Type: Grant
    Filed: August 2, 2017
    Date of Patent: December 15, 2020
    Assignee: Toshiba Memory Corporation
    Inventors: Yaron Klein, Miki Schnarch
  • Patent number: 10860508
    Abstract: Data management functions are offloaded from a main controller to individual storage devices in a multi-device storage environment. The main controller receives a data management request from a host system, and responds by determining one or more storage devices and one or more data management operations to be performed by the one or more storage devices. The main controller initiates performance of a data management function corresponding to the data management request, by sending one or more data management commands to the one or more storage devices, and initiating one or more data transfers, such as a direct memory access operation to transfer data between a memory buffer of a storage device and a host memory buffer of the host system, and an internal data transfer between two or more of the storage devices using an internal communication fabric of the data storage subsystem.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: December 8, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventors: Vladislav Bolkhovitin, Sanjay Subbarao, Brian W. O'Krafka, Anand Kulkarni, Warren Fritz Kruger
  • Patent number: 10853268
    Abstract: An information processing system including a processor, a memory, and a plurality of drives, wherein when a write request of new data is received, the processor stores the new data in the memory, transmits a response for the write request to a transmission source of the write request, reads old data updated by the new data from a first drive of the plurality of drives and old parity related to the old data from a second drive of the plurality of drives according to transmission of the response, store the old data and the old parity in the memory, generates new parity related to the new data from the new data, the old data, and the old parity stored in the memory, and stores the new data in the first drive to store the new parity in the second drive.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: December 1, 2020
    Assignee: HITACHI, LTD.
    Inventors: Miho Imazaki, Akira Yamamoto, Tomohiro Yoshihara, Kohei Tatara
  • Patent number: 10838860
    Abstract: Memory-mapped interfaces for message passing computing systems are provided. According to various embodiments, a write request is received. The write request comprises write data and a write address. The write address is a memory address within a memory map. The write address is translated into a neural network address. The neural network address identifies at least one input location of a destination neural network. The write data is sent via a network according to the neural network address to the at least one input location of the destination neural network. A message is received via the network from a source neural network. The message comprises data and at least one address. A location in a buffer is determined based on the at least one address. The data is stored at the location in the buffer. The buffer is accessible via the memory map.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: November 17, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Filipp A. Akopyan, John V. Arthur, Andrew S. Cassidy, Michael V. DeBole, Paul A. Merolla, Dharmendra S. Modha, Jun Sawada
  • Patent number: 10838648
    Abstract: An apparatus in one embodiment comprises a first host device comprising a processor coupled to a memory. The first host device is configured to assign to additional host devices different portions of a source logical unit designated for migration to a target logical unit. In conjunction with migration of the assigned portions of the source logical unit to the target logical unit by the additional host devices, the first host device is configured to receive from the additional host devices respective sets of information each characterizing one or more writes directed to the corresponding assigned portion during the migration. The first host device is further configured to update the target logical unit based at least in part on the received sets of information. In some embodiments, the first host device is configured to assign to itself a portion of the source logical unit designated for migration to the target logical unit.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: November 17, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Shubham Sharma, Kurumurthy Gokam, Kundan Kumar
  • Patent number: 10824575
    Abstract: A memory system and a buffer device include a structure for performing training operations for a plurality of memory devices to ensure data reliability. A memory controller is configured to control a memory operation for a plurality of memory devices. A memory module includes the plurality of memory devices and a buffer device connected between the memory devices and the memory controller. Training operations for the memory devices to be performed by the buffer device including a training block with a signal delay circuit, and the memory controller performs the training operations by controlling the training block.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: November 3, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jang-woo Lee, Jeong-don Ihm, Byung-hoon Jeong
  • Patent number: 10809928
    Abstract: Various aspects for data deduplication in a storage system are provided. For instance, a storage controller may perform operations including receiving a data chunk including a set of data blocks, determining a signature for the data chunk, and comparing the signature and a set of reference signatures to determine a match. Responsive to a match, the operations may further include identifying a reference data chunk including a set of comparison blocks associated with the matched reference signature, performing a deduplication technique on the set of data blocks based on the set of comparison blocks, and identifying a subsequent reference data chunk for an estimated next data chunk based on identification of the reference data chunk and prior to receipt of the next data chunk.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: October 20, 2020
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Ajith Kumar Battaje, Tanay Goel, Kiran Shivanagoudar, Saurabh Manchanda, Ashwin Narasimha, Ashish Singhai
  • Patent number: 10795593
    Abstract: Technologies for adjusting the performance of data storage devices based on telemetry data include a compute device with a compute engine. The compute engine is configured to receive, with communication circuitry and through a network, telemetry data indicative of a present configuration and performance of each of multiple data storage devices, determine, as a function of the received telemetry data, a replacement configuration to improve the performance of one or more of the data storage devices, and send, with the communication circuitry, responsive data that is usable by the one or more of the data storage devices to improve the performance of the one or more data storage devices.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: October 6, 2020
    Assignee: Intel Corporation
    Inventors: Joseph David Tarango, Jim Baca
  • Patent number: 10776261
    Abstract: A storage apparatus managing method, applied to a first storage apparatus and a second storage apparatus coupled to an electronic apparatus, wherein the first storage apparatus comprises a local registering region and a global registering region, comprising: (a) receiving a read request indicating reading a target data unit from the second storage apparatus; (b) confirming whether the global registering region has the target data unit; (c) if yes, reading the target data unit from the global registering region, if not, confirming whether the local registering region has the target data unit; and (d) reading the target data unit from the local registering region if the local registering region has the target data unit, reading the target data unit from the second storage apparatus if the local registering region does not have the target data unit.
    Type: Grant
    Filed: July 5, 2018
    Date of Patent: September 15, 2020
    Assignee: Silicon Motion, Inc.
    Inventor: Chao-Yu Lin
  • Patent number: 10754788
    Abstract: Systems and methods for managing content in a flash memory. Systems and methods for implementing hash tables in a flash memory are disclosed. A hash table may include a flat array or an array of buckets that are each associated with a linked list. Adding or removing entries from the hash table or from the linked list are achieved by performing an overwrite operation where possible to pointers affected by the table operation.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: August 25, 2020
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Grant R. Wallace, Philip N. Shilane
  • Patent number: 10747441
    Abstract: Devices and techniques for efficient allocation of storage connection resources are disclosed herein. An active trigger for a storage device is received when the storage device is in an idle state. A workload that corresponds to the storage device is measured to determine that the workload meets a threshold. Connection parameters, for a connection to the storage device, are negotiated based on the workload in response to receipt of the active trigger and the workload meeting the threshold. The workload is then executed on the storage device via the connection using the connection parameters.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: August 18, 2020
    Assignee: Micron Technology, Inc.
    Inventor: Sebastien Andre Jean
  • Patent number: 10740009
    Abstract: Flexible deprovisioning of distributed storage is disclosed. For example, an orchestrator executes on a processor to measure a current storage demand factor based on a current count of service guests and a storage capacity of a plurality of storage nodes. A projected storage demand factor is calculated by (i) adjusting the current count of service guests with a timing factor resulting in a projected count, and (ii) combining the projected count with a storage class associated with the service guests. The orchestrator determines that the projected storage demand factor is lower than the current storage demand factor, and in response requests termination of a first storage node of the plurality of storage nodes based on the first storage node lacking an active communication session with the service guests. Cancel termination of the first storage node based on an association between the first storage node and a second storage node.
    Type: Grant
    Filed: July 5, 2018
    Date of Patent: August 11, 2020
    Assignee: Red Hat, Inc.
    Inventors: Huamin Chen, Steven Travis Nielsen, Sage Austin Weil
  • Patent number: 10732896
    Abstract: A method and apparatus for optimizing read operations during a control sync operation on a data storage device are disclosed. The data storage device contains a management table used for mapping memory addresses to a non-volatile memory. A control sync operation makes a copy of the management table to the non-volatile memory. The control sync operation is non-blocking—the sync operation allows read and write operations in parallel with making a copy of or updating the management table. During the control sync operation, the read operations are optimized through a CUQ and an overlap range table. The CUQ may act as a temporary management table while also containing updates to be consolidated to the management table. The overlap range table is used to allow skipping searches within the CUQ by identifying then mapping entries that reside within CUQ.
    Type: Grant
    Filed: April 9, 2018
    Date of Patent: August 4, 2020
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Karin Inbar, Michael Micha Ionin, Einat Lev
  • Patent number: 10732900
    Abstract: The present disclosure generally presents a method and apparatus to provide a bounded latency, where a device would report “non-service” of a command at the defined system level timeout or earlier if the device was unable to successfully return the data to the host.
    Type: Grant
    Filed: October 24, 2018
    Date of Patent: August 4, 2020
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Neil Hutchison, Peter Grayson, Xinde Hu, Daniel Helmick, Rodney Brittner
  • Patent number: 10733097
    Abstract: The disclosed technology provides a method that reduces time to recover in storage systems. In one implementation, the method comprises entering an idle status, determining if there is an incomplete band update operation, invalidating a media scratch pad (MSP) by clearing headers responsive to determining there is no incomplete band update operation, performing a power cycle, reading an MSP header, and determining if an MSP header is valid. If a rude power cycle occurs and the MSP header is determined to be valid, an MSP is examined, and restored if required. If a safe power cycle occurs, an MSP restore operation is not required, reducing time to recover.
    Type: Grant
    Filed: March 2, 2018
    Date of Patent: August 4, 2020
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Jian Qiang, Sze Chek Tan
  • Patent number: 10691340
    Abstract: A method for writing data to a storage device including a processor, a volatile memory, and a non-volatile memory, the storage device being in communication with a host, the method includes receiving, by the processor, a command to write host data to the non-volatile memory, the host data being associated with a host identification, calculating, by the processor, a hash value associated with the host data, adding, by the processor, an object entry in an object map associated with the hash value, the object entry including the host identification and the hash value, and identifying, by the processor, whether there is a dedup entry in a deduplication map associated with the hash value, and writing, by the processor, stored data to the non-volatile memory based on the identification, the stored data being associated with and different from the host data.
    Type: Grant
    Filed: October 20, 2017
    Date of Patent: June 23, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yang Seok Ki, Jason Martineau
  • Patent number: 10671525
    Abstract: A computer program product, according to one embodiment, includes a computer readable storage medium having program instructions embodied therewith. The computer readable storage medium is not a transitory signal per se. The program instructions are readable and/or executable by a processor to cause the processor to perform a method which includes: receiving a request to delete a volume stored in one or more regions in physical space of a storage system; determining whether at least one of the regions having at least a portion of the volume includes reclaimable space; deleting the portion of the volume from the at least one region having the reclaimable space in response to determining that at least one of the regions having at least a portion of the volume includes reclaimable space; and failing the received request to delete the volume in response to determining that none of the regions include reclaimable space.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: June 2, 2020
    Assignee: International Business Machines Corporation
    Inventors: Jonathan Fischer-Toubol, Asaf Porat-Stoler, Yosef Shatsky
  • Patent number: 10671290
    Abstract: Example control methods of hybrid storage are provided, which are applied to each HDD-type storage device and each SSD-type storage device in a storage system having one or more HDD-type storage devices and one or more SSD-type storage devices. Each HDD-type storage device in the storage system is connected to the SSD-type storage device. Each HDD-type storage device and each SSD-type storage device stores one or more data blocks respectively. Access information of each data block stored in a storage device is periodically acquired. A storage location of each data block in the storage system is adjusted according to the acquired access information of each data block. By using the technical solution of the present disclosure, the storage location of the data block is dynamically configured according to an access frequency so that advantages of different storage devices are fully utilized.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: June 2, 2020
    Assignee: Alibaba Group Holding Limited
    Inventors: Huabing Du, Yangjun Ma, Zhenkun Yang
  • Patent number: 10664409
    Abstract: A data storage apparatus includes a nonvolatile memory device including block groups, a random access memory including a sequential map table that stores a sequential map entry for consecutive sequential write logical addresses, among write addresses received from a host apparatus, greater than or equal to a predetermined threshold number, and a processor configured to determine whether or not first sequential write logical addresses are present among logical addresses corresponding to physical addresses for a first region of a first block group when a write operation for the first region of the first block group in response to a write request received from the host apparatus is completed, generate a first sequential map entry for the first sequential write logical addresses when the first sequential write logical addresses are present, and store the first sequential map entry in the sequential map table.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: May 26, 2020
    Assignee: SK hynix Inc.
    Inventors: In Jung, Byeong Gyu Park, Young Ick Cho