Patents Examined by Arpan P Savla
  • Accessing a serial number of a removable non-volatile memory device
    Patent number: 9552855
    Abstract: A removable non-volatile memory device durably stores a serial number or identifier, which is used to mark multimedia content legally stored on the removable non-volatile memory device. In order to retrieve the serial number, a host electronic system coupled to the removable non-volatile memory device sends a sequence of multiple file access commands to access a predefined target file stored on the removable non-volatile memory device. In accordance with the executed predefined sequence of multiple file access commands, a corresponding sequence of data access commands are received at the removable non-volatile memory device and are interpreted as a request by the host electronic device to read the serial number. The removable non-volatile memory device outputs the serial number in response to the sequence of data access commands.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: January 24, 2017
    Assignee: Mo-DV, Inc.
    Inventors: Robert D. Widergren, John L. Douglas, Eric R. Hamilton
  • Flexible memory interface system for independently processing different portions of an instruction
    Patent number: 9547623
    Abstract: A flexible memory interface system includes a control module, instruction memory, a command processing unit, an address processing unit, and a data processing unit. The control module controls storing and retrieving of a command portion, an addressing portion, and data of an instruction to access memory to and from the instruction memory and the command processing unit, the address processing unit, and the data processing unit, respectively. The command processing unit is operably coupled to process a command portion of an instruction to access memory. The address processing unit is operably coupled to process an addressing portion of the instruction to access the memory. The data processing unit is operably coupled to process data conveyance to or from the external memory based on the instruction to access the memory.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: January 17, 2017
    Assignee: SIGMATEL, INC.
    Inventors: Steve Vu, Jean Charles Pina
  • Variable distance bypass between tag array and data array pipelines in a cache
    Patent number: 9529720
    Abstract: The present application describes embodiments of techniques for picking a data array lookup request for execution in a data array pipeline a variable number of cycles behind a corresponding tag array lookup request that is concurrently executing in a tag array pipeline. Some embodiments of a method for picking the data array lookup request include picking the data array lookup request for execution in a data array pipeline of a cache concurrently with execution of a tag array lookup request in a tag array pipeline of the cache. The data array lookup request is picked for execution in response to resources of the data array pipeline becoming available after picking the tag array lookup request for execution. Some embodiments of the method may be implemented in a cache.
    Type: Grant
    Filed: June 7, 2013
    Date of Patent: December 27, 2016
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Marius Evers, John Kalamatianos, Carl D. Dietz, Richard E. Klass, Ravindra N. Bhargava
  • Method and arrangement for completion or recovery of data transactions in a flash type memory device using a commit process
    Patent number: 9495286
    Abstract: The invention relates to a method and arrangement for processing transactions in a flash type memory device, wherein the transaction is a data update and/or changing operation consisting of one or more suboperations, all of which must be successfully executed in order to regard the discussed transaction as having been successfully completed in its entirety. In the solution according to the invention, memory-block specific status information (131) of a memory block present in a flash type memory device is utilized not only for managing payload data (141) present in the memory block but also for the management of an entire transaction. Consequently, there is no need for a separate status bookkeeping of transactions, thus reducing the number of reading and writing operations required in transactions.
    Type: Grant
    Filed: June 7, 2007
    Date of Patent: November 15, 2016
    Assignee: CORIANT OY
    Inventor: Matti Hallivuori
  • External storage manager for a data storage cell
    Patent number: 9485311
    Abstract: A storage management solution according to certain embodiments is provided which decouples certain aspects of the storage manager from the data storage cell. The data storage system according to certain aspects can provide one or more external storage managers that manage data protection and administer the operation of data storage cells. According to certain aspects, usage of the decoupled storage manager can be allocated amongst multiple data storage cells, such as by data storage cells of multiple companies, sub-units of a company, or both.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: November 1, 2016
    Assignee: Commvault Systems, Inc.
    Inventors: Sanjay Harakhchand Kripalani, David W. Owen, Parag Gokhale
  • Programmable latency count to achieve higher memory bandwidth
    Patent number: 9477619
    Abstract: Disclosed herein are system, method and/or computer program product embodiments for increasing memory bandwidth when accessing a plurality of memory devices. An embodiment operates by executing, by at least one processor, a first read operation to read data from a first memory device following an access time for the first memory device. The embodiment further includes executing, by the at least one processor, a second read operation to read data from a second memory device following an access time for the second memory device. The access time for the second memory device is substantially the same or longer than the access time for the first memory device plus a time it takes to read data from the first memory device.
    Type: Grant
    Filed: June 10, 2013
    Date of Patent: October 25, 2016
    Inventors: Qamrul Hasan, Dawn M. Hopper, Clifford Alan Zitlaw
  • Binning of blocks for dynamic linking
    Patent number: 9465732
    Abstract: A multi-plane non-volatile memory die includes circuits that receive and apply different parameters to different planes while accessing planes in parallel so that different erase blocks are accessed using individualized parameters. Programming parameters, and read parameters can be modified on a block-by-block basis with modification based on the number of write-erase cycles or other factors.
    Type: Grant
    Filed: April 2, 2013
    Date of Patent: October 11, 2016
    Assignee: SanDisk Technologies LLC
    Inventors: Abhijeet Manohar, Chris Nga Yee Avila
  • Memory management unit that applies rules based on privilege identifier
    Patent number: 9465753
    Abstract: A memory management and protection system that manages memory access requests from a number of requestors. Memory accesses are allowed or disallowed based on the privilege level of the master, usually a CPU originating the request based on a Privilege Identifier that accompanies each memory access request. Deputy masters such as DMA controllers inherit the Privilege Identifier of the originating master. An extended memory controller selects the appropriate set of segment registers based on the Privilege Identifier to insure that the request is compared to and translated by the segment register associated with the master originating the request.
    Type: Grant
    Filed: July 13, 2015
    Date of Patent: October 11, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Joseph Raymond Michael Zbiciak, Amitabh Menon
  • Semiconductor memory device and method for logging monitored events into a buffer
    Patent number: 9442841
    Abstract: A semiconductor memory device includes a nonvolatile semiconductor memory in which writing is carried out at a page unit and erasing is carried out at a block unit larger than the page unit, and a controller for transferring data between a host device and the nonvolatile semiconductor memory. The controller includes a log-management section that is configured to: (i) record a page unit of log data in a buffer area each time a monitored event (e.g., error) occurs, the buffer area being partitioned into a plurality of pages and the page unit of log data is recorded in a designated page of the buffer area, and (ii) prior to recording the page unit of log data in the designated page, copy part of the designated page to another page of the buffer area.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: September 13, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Takeyuki Minamimoto
  • Method and apparatus for a partial-address select-signal generator with address shift
    Patent number: 9411724
    Abstract: In accordance with embodiments disclosed herein, there are provided methods, systems, mechanisms, techniques, and apparatuses for implementing and using a partial-address select-signal generator with address shift.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: August 9, 2016
    Assignee: Intel Corporation
    Inventors: Lutz Naethke, Eric Desmarais, Ralf Goettsche
  • Method for cleaning a delta storage system
    Patent number: 9400610
    Abstract: A computer-implemented method and system for performing garbage collection in a delta compressed data storage system selects a file recipe to traverse to identify live data chunks and selects a chunk identifier from the file recipe. The chunk identifier is added to a set of live data chunks. Delta references in an entry of an index corresponding to the chunk identifier are added to the set of live data chunks. Data chunks in a data storage system not identified by the set of live data chunks are then discarded.
    Type: Grant
    Filed: June 13, 2012
    Date of Patent: July 26, 2016
    Assignee: EMC Corporation
    Inventors: Grant R. Wallace, Philip N. Shilane
  • Observation of data in persistent memory
    Patent number: 9367472
    Abstract: Systems and methods for reliably using data storage media. Multiple processors are configured to access a persistent memory. For a given data block corresponding to a write access request from a first processor to the persistent memory, a cache controller prevents any read access of a copy of the given data block in an associated cache. The cache controller prevents any read access while detecting an acknowledgment that the given data block is stored in the persistent memory is not yet received. Until the acknowledgment is received, the cache controller allows write access of the copy of the given data block in the associated cache only for a thread in the first processor that originally sent the write access request. The cache controller invalidates any copy of the given data block in any cache levels below the associated cache.
    Type: Grant
    Filed: June 10, 2013
    Date of Patent: June 14, 2016
    Assignee: Oracle International Corporation
    Inventors: William H. Bridge, Jr., Paul Loewenstein, Mark A. Luttrell
  • System and methods for distributing a power-of-two virtual memory page across a non-power-of two number of DRAM partitions
    Patent number: 9348751
    Abstract: One embodiment of the present invention sets forth a technique for computing dynamic random access memory (DRAM) addresses from linear physical addresses for memory subsystems implementing integral power of two virtual page sizes, and an arbitrary number of available partitions. Each DRAM address comprises a row address, column address, bank address, and partition address. The linear physical address is used to generate to the DRAM address in units of a DRAM bank size. Address scrambling may be implemented to overcome transient access contention to specific DRAM pages by multiple client modules.
    Type: Grant
    Filed: September 21, 2010
    Date of Patent: May 24, 2016
    Assignee: NVIDIA Corporation
    Inventor: James M. Van Dyke
  • System, method, and computer program product for detecting access to a memory device
    Patent number: 9336387
    Abstract: Discrete events that take place with respect to a hard disk drive or other I/O device or port are indicated to logic that implements Self-Monitoring Analysis and Reporting Technology (SMART) or similar technology. These events are communicated to SMART as event data. Examples of such discrete events include power on, power off, spindle start, and spindle stop, positioning of the actuator, and the time at which such events occur. SMART then compiles event data to create compiled activity data. Compiled activity data represents summary statistical information that is created by considering some or all of the event data. Examples of compiled activity data include the Time Powered On and Power Cycle Count. Collection logic then writes the compiled activity data to a memory medium. An analyst can then read data from log file(s).
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: May 10, 2016
    Assignee: Stroz Friedberg, Inc.
    Inventors: Donald E. Allison, Kenneth A. Mendelson
  • System and method for data logging within a field replaceable unit
    Patent number: 9336111
    Abstract: A computer-implemented method, computer program product, and computing system for detecting the availability of status-related data within a field replaceable unit (FRU). The status-related data is written to persistent memory within the FRU.
    Type: Grant
    Filed: July 30, 2010
    Date of Patent: May 10, 2016
    Assignee: EMC Corporation
    Inventors: Joseph P. King, Phil Roux, Mingxiang Xu
  • Methods and systems for consistently replicating data
    Patent number: 9317432
    Abstract: Techniques for maintaining consistent replicas of data are disclosed. By way of example, a method for managing copies of objects within caches, in a system including multiple caches, includes the following steps. Consistent copies of objects are maintained within the caches. A home cache for each object is maintained, wherein the home cache maintains information identifying other caches likely containing a copy of the object. In response to a request to update an object, the home cache for the object is contacted to identify other caches which might have copies of the object.
    Type: Grant
    Filed: January 9, 2008
    Date of Patent: April 19, 2016
    Assignee: International Business Machines Corporation
    Inventors: Judah M. Diament, Arun Kwangil Iyengar, Thomas A. Mikalsen, Isabelle Marie Rouvellou
  • Calculating an allocation mode for a storage pool based on a policy
    Patent number: 9292216
    Abstract: An embodiment of a computer-implemented method for use in managing allocation of a storage pool in a data storage system by calculating an allocation mode for the storage pool based on a policy is described. Also described are embodiments of a system and computer program product enabled for carrying out such computer-implemented allocation management.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: March 22, 2016
    Assignee: EMC Corporation
    Inventors: Paul T. McGrath, Sheetal A. Desai, Miles A. Deforest, David Haase, Saurabh M. Pathak
  • Monitoring a value in storage without repeated storage access
    Patent number: 9274957
    Abstract: A technique is provided for monitoring a value without repeated storage access. A processing circuit processes an instruction of a program that specifies a memory address of a memory location to be monitored. The processing circuit configures a monitor station for monitoring the memory location. The memory location includes a state descriptor for the program. The processing circuit receives a cross-invalidate request from a memory controller. The cross-invalidate request indicates to the monitor station that content of the memory location has been changed by another processing circuit.
    Type: Grant
    Filed: March 4, 2013
    Date of Patent: March 1, 2016
    Assignee: International Business Machines Corporation
    Inventors: Khary J. Alexander, Ute Gaertner, Jonathan T. Hsieh, Christian Jacobi, Timothy J. Slegel
  • Tracking transactional execution footprint
    Patent number: 9262320
    Abstract: Embodiments relate to tracking a transactional execution footprint. An aspect includes receiving a store instruction which includes store data. It is determined if the store instruction is executing within a transaction that effectively delays committing stores to a shared cache until the transaction has completed. The store data is stored to a cache line in a local cache. The cache line is marked as dirty if the transaction is active. The stored data that was marked as dirty in the local cache is invalidated if the transaction has terminated abnormally. The stored data is un-marked if it is determined that the transaction has successfully ended.
    Type: Grant
    Filed: June 15, 2012
    Date of Patent: February 16, 2016
    Assignee: International Business Machines Corporation
    Inventors: Khary J. Alexander, Jonathan T. Hsieh, Christian Jacobi, Patrick M. West
  • Managing CPU resources for high availability micro-partitions
    Patent number: 9244826
    Abstract: Profile properties in a partition profile are user-configurable through a management entity such as a management console. A partition manager calculates a secondary processing unit entitlement for a logical partition based in part on a secondary processing unit mode property in the partition profile. The secondary processing unit entitlement may be smaller than a primary processing unit entitlement for the logical partition. The partition manager reserves processing units from a secondary shared processor pool equal to the logical partition's secondary entitlement for the logical partition. The primary and secondary processing unit entitlements may be stored in primary and secondary configuration data structures associated with the logical partition. The partition manager may relocate the logical partition to the secondary shared processor pool in response to a predetermined condition.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: January 26, 2016
    Assignee: International Business Machines Corporation
    Inventors: Naresh Nayar, Geraint North, Bryan M. Logan