Abstract: The present invention provides a means for sufficiently removing organic residues remaining on the surface of an object to be polished which contains silicon nitride, silicon oxide, or polysilicon and has been polished. The present invention relates to a surface treatment composition including a polymer compound having a sulfonic acid (salt) group and water, wherein the surface treatment composition has a pH value of less than 7 and the surface treatment composition is used for decreasing an organic residue on a surface of an object to be polished which contains silicon nitride, silicon oxide, or polysilicon and has been polished.

Abstract: A flip chip bonding method includes obtaining a die including a first substrate and an adhesive layer on the first substrate; bonding the die to a second substrate different from the first substrate; and curing the adhesive layer. The curing the adhesive layer includes heating the second substrate to melt the adhesive layer, and providing the adhesive layer and the second substrate with air having pressure greater than atmospheric pressure.

Abstract: The present invention is characterized in that by laser beam being slantly incident to the convex lens, an aberration such as astigmatism or the like is occurred, and the shape of the laser beam is made linear on the irradiation surface or in its neighborhood. Since the present invention has a very simple configuration, the optical adjustment is easier, and the device becomes compact in size. Furthermore, since the beam is slantly incident with respect to the irradiated body, the return beam can be prevented.

Abstract: A material of the vapor deposition mask that a resin film layer is disposed on a surface of a metal film layer on which one or more openings are formed is welded on a metal frame in a manner so that the resin film layer faces outward under a condition that a predetermined tension is applied in a predetermined direction; the metal frame is held on a base mount; a taper forming member/material having a reflection surface or the like is disposed to facing the metal film layer which is inward of the metal frame; laser beams are irradiated from above the resin film layer.

Abstract: A method of producing a wafer includes forming a peel-off layer in a hexagonal single-crystal ingot by applying a laser beam having a wavelength transmittable through the ingot while positioning a focal point of the laser beam in the ingot at a depth corresponding to the thickness of a wafer to be produced from an end face of the ingot, generating ultrasonic waves from an ultrasonic wave generating unit positioned in facing relation to the wafer to be produced across a water layer interposed therebetween, thereby to break the peel-off layer, and detecting when the wafer to be produced is peeled off the ingot based on a change that is detected in the height of an upper surface of the wafer to be produced by a height detecting unit positioned above the upper surface of the wafer to be produced across the water wafer interposed therebetween.

Abstract: A method of manufacturing a flexible display device includes forming a graphene adhesive layer on a carrier substrate, forming a flexible substrate on the graphene adhesive layer, forming a first barrier layer on the flexible substrate, forming a display element part on the first barrier layer, forming a protective film on the display element part, separating the flexible substrate from the carrier substrate, removing a remaining portion of the graphene adhesive layer from a surface of the flexible substrate, and forming a second barrier layer on the surface of the flexible substrate, after removing the remaining portion of the graphene adhesive layer from the surface of the flexible substrate.

Abstract: A photoresist is applied to a front surface of a semiconductor wafer rotating at a predetermined rotational speed and a photoresist film having a predetermined thickness is formed and dried. Next, a chemical is dripped while the semiconductor wafer is rotated at the predetermined rotational speed or less, whereby an edge part of the photoresist film is dissolved and removed by the chemical while the predetermined thickness of the photoresist film is maintained. A predetermined pattern is transferred to the photoresist film by exposure and development. After the development, without performing UV curing or post-bake, the photoresist film is used as a mask and helium irradiation having a range of 8 ?m or greater from the front surface of the semiconductor wafer is performed. Thus, a predetermined impurity may be implanted with good positioning accuracy in a predetermined region, using the photoresist film as a mask and cost may be reduced.

Abstract: Some embodiments include methods in which a structure has a first semiconductor material over a dielectric region, a second semiconductor material under the dielectric region, an insulative wall laterally surrounding a volume of the first semiconductor material, and a first doped region along a lower surface of the first semiconductor material. The first semiconductor material is patterned to form a pillar within a tub. The pillar has top and bottom portions. An upper doped region is formed within the pillar top portion. A dielectric liner is formed to extend along the pillar, and to extend along the bottom of the tub. Conductive gate material is formed within the tub and over the dielectric liner. The lower and upper doped regions within the pillar are first and second source/drain regions, respectively, and the conductive gate material includes a transistor gate which gatedly couples the first and second source/drain regions.

Abstract: A bottom protection film for an OLED panel is provided. More particularly, a bottom protection film for an OLED panel, which has excellent alignment process workability and excellent adhesion to an OLED panel, and is capable of preventing static electricity through an antistatic treatment and preventing an electrical short circuit at the same time, and an organic light-emitting display device including the bottom protection film are provided.

Abstract: Examples of an integrated circuit with a gate stack and a method for forming the integrated circuit are provided herein. In some examples, a method includes receiving a workpiece that includes: a pair of sidewall spacers disposed over a channel region, a gate dielectric disposed on the channel region and extending along a vertical surface of a first spacer of the pair of sidewall spacers, and a capping layer disposed on the high-k gate dielectric and extending along the vertical surface. A shaping feature is formed on the capping layer and the high-k gate dielectric. A first portion of the high-k gate dielectric and a first portion of the capping layer disposed between the shaping feature and the first spacer are removed to leave a second portion of the high-k gate dielectric and a second portion of the capping layer extending along the vertical surface.

Abstract: A method includes forming a seed layer on a semiconductor wafer, coating a photo resist on the seed layer, performing a photo lithography process to expose the photo resist, and developing the photo resist to form an opening in the photo resist. The seed layer is exposed, and the opening includes a first opening of a metal pad and a second opening of a metal line connected to the first opening. At a joining point of the first opening and the second opening, a third opening of a metal patch is formed, so that all angles of the opening and adjacent to the first opening are greater than 90 degrees. The method further includes plating the metal pad, the metal line, and the metal patch in the opening in the photo resist, removing the photo resist, and etching the seed layer to leave the metal pad, the metal line and the metal patch.

Abstract: A method of bonding a semiconductor element to a substrate includes: carrying a semiconductor element including a plurality of first electrically conductive structures with a bonding tool; supporting a substrate including a plurality of second electrically conductive structures with a support structure; providing a reducing gas in contact with each of the plurality of first conductive structures and the plurality of second conductive structures; establishing contact between corresponding ones of the plurality of first conductive structures and the plurality of second conductive structures; moving at least one of the semiconductor element and the substrate such that the corresponding ones of the plurality of first conductive structures and the plurality of second conductive structures are separated; re-establishing contact between the plurality of first conductive structures and the plurality of second conductive structures; and bonding the plurality of first conductive structures to the respective ones of the

Abstract: A method for fabricating a thin film transistor substrate includes forming a buffer layer including at least one film on a base substrate, planarizing a surface of the buffer layer, and forming a thin film transistor on the buffer layer.

Abstract: A method for processing a semiconductor substrate includes providing the semiconductor substrate having die formed as part of the semiconductor substrate and separated from each other by singulation lines. The semiconductor substrate has first and second opposing major surfaces and contacts disposed over the first major surface. A layer of material is disposed over the second major surface, and the singulation lines extend inward from the first major surface into the semiconductor substrate without extending through the layer of material so that the layer of material is under the singulation lines. The method includes separating the layer of material proximate to the singulation lines by exposing the layer of material to a reduced temperature below about minus 150 degrees Celsius. In some examples, a cryogenic fluid can be to provide the reduced temperature. The method provides a reliable and efficient way to bulk separate at least the layer of material.

Abstract: Described herein is a technique capable of forming a film with uniform characteristics from an upper portion to a lower portion of a deep concave structure whose aspect ratio is high. According to one aspect of the technique of the present disclosure, there is provided a method of manufacturing a semiconductor device including: (a) placing a substrate comprising a deep concave structure constituted by at least an upper portion and a lower portion on a substrate support provided in a process chamber; (b) supplying a process gas into the process chamber to form a layer on an inner surface of the deep concave structure; and (c) discharging by-products generated in an inner space of the deep concave structure in (b) by setting a pressure of a process space defined by the process chamber to be lower than a pressure of the inner space of the deep concave structure.

Abstract: A first semiconductor die and a second semiconductor die can be bonded in a manner that enhances alignment of bonding pads. Non-uniform deformation of a first wafer including first semiconductor dies can be compensated for by forming a patterned stress-generating film on a backside of the first wafer. Metallic bump portions can be formed on concave surfaces of metallic bonding pads by a selective metal deposition process to reduce gaps between pairs of bonded metallic bonding pads. Pad-to-pad pitch can be adjusted on a semiconductor die to match the pad-to-pad pitch of another semiconductor die employing a tilt-shift operation in a lithographic exposure tool. A chuck configured to provide non-uniform displacement across a wafer can be employed to hold a wafer in a contoured shape for bonding with another wafer in a matching contoured position. Independently height-controlled pins can be employed to hold a wafer in a non-planar configuration.

Abstract: A method of forming a nanowire device includes providing a substrate containing nanowires between vertical spacers, selectively depositing a high-k film on the nanowires relative to the vertical spacers, and selectively depositing a metal-containing gate electrode layer on the high-k film relative to the vertical spacers. The method can further include selectively depositing a dielectric material on the vertical spacers prior to selectively depositing the high-k film, where the dielectric material has a lower dielectric constant than the high-k film.

Abstract: Described are methods for forming a multilayer conductive structure for semiconductor devices. A seed layer is formed comprising a metal and an additional constituent that in combination with the metal inhibits nucleation of a fill layer of the metal formed over the seed layer. Tungsten may be doped or alloyed with silicon to form the seed layer, with a tungsten fill being formed over the seed layer.

Abstract: A method for forming a semiconductor structure is provided. The method includes depositing a dielectric material in a first opening above a first source/drain region in a first region of the semiconductor structure and in a second and a third opening above a respective second and a third source/drain region in a second region of the silicon structure. There is a gate region between the second and third source/drain regions. The method etches away the dielectric material deposited in the first opening and deposits an organic material in the first opening. The method further etches a region above the gate region between the second and third source/drain regions to expose the gate region and form a fourth opening and removes the organic material from the first opening. The method deposits a metal in the first opening and the fourth opening.

Abstract: Methods, apparatuses, and systems related to stack a semiconductor structure are described. An example method includes stacking a semiconductor structure between electrode materials having a first silicate material on a working surface. The method further includes forming a first nitride material on the first silicate material. The method further includes forming a second silicate material on the first nitride material. The method further includes forming a second nitride material on the second silicate material. The method further includes forming a third silicate material on the second nitride. The method further includes forming a third nitride on the third silicate material. The method further includes using a wet etch process to increase a width between electrode materials. The method further includes using a dry etch process to remove a portion of materials within the semiconductor structure.