Abstract: In a base drive circuit for a high power transistor, an external signal is applied to the circuit by an optical coupler. In response to the external signal, the circuit provides a positive current to the high power transistor in order turn it on. The positive constant current is characterized by an initial spike that prevents any localized hot spots from developing in the high power transistor and thereafter the positive current becomes constant. The circuit also provides a constant negative current when the external signal is removed, thereby quickly turning off the high power transistor. The optical coupler and a time delay device provide the circuit with high noise immunity.

Abstract: A power transistor comprising a plurality of elementary transistors coupled in parallel and an identical number of current generators, each of which has a terminal coupled individually to the base of an elementary transistor is described. High power levels may be achieved with a transistor of this type without forward secondary breakdown taking place.

Abstract: A MOSFET transistor switch control circuit using high impedance, low offset, ground referenced control is disclosed. The invention comprises a first enhancement mode MOSFET having a drain connected to an electrical signal, and a second enhancement mode MOSFET having a gate connected to the gate of the first MOSFET, a source connected to the source of the first MOSFET, and a drain connected to an output of the switch. The invention further comprises, in combination with the above elements, current injection apparatus for injecting current into the switch control circuit, current switching apparatus for connecting and disconnecting the current injection apparatus from and to the switch control circuit, and electrical circuit apparatus for maintaining the gate voltage of the MOSFETs about equal to their source voltage when the current injection apparatus is disconnected, and for increasing the gate voltage when the current injection apparatus is connected.

Abstract: Provided is a power semiconductor device operable to be switched at high frequencies. The semiconductor device according to the present invention is applied to a three-terminal BIMOS power semiconductor device in which a MOS-FET (2) is connected in parallel with a bipolar transistor (3) while the gate of the MOS-FET (2) is connected with the base of the bipolar transistor (3) through a reference-voltage diode (6) and a fast switching diode (7) so that the operation of the semiconductor device can be controlled by one driving circuit (1).

Abstract: A flame control circuit becomes a flame protection circuit when the whole circuit is also controlled with respect to correct operation. A final output signal 32, "presence of flame", is supplied only if a flame 6 is present and the circuit operates correctly. In any other case, in which parts of the circuit operate incorrectly, independently of the presence or absence of the flame, the output signal "absence of flame" is supplied. The circuit utilizes the rectifying effect of a flame on an alternating voltage applied to a measuring probe 2 in the flame, and the measuring direct voltage thus obtained, taken with an alternating voltage as a reference and applied to correctly polarized phase detection circuits 28, 42 produces the final output signal.

Abstract: An integrated circuit comprising a series pass transistor for sourcing current from the positive side of a battery to an inductive load includes integrated circuitry for providing a direct current conduction path between ground and the inductive load as the series pass transistor is turned off by the battery being disconnected therefrom during normal operation so that the stored inductive energy of the inductive load is dissipated. The integrated circuitry includes a silicon controlled rectifier (SCR) coupled between the output of the integrated circuit and ground as well as a Zener diode coupled between the gate and anode of the SCR.

Abstract: An electronic sensor of the contactless type has a free-running oscillator with internal positive feedback supplemented by an external negative feedback including a capacitive path whose impedance is normally high but is lowered in the presence of an object to be detected, thereby reducing the output signal of the oscillator from a normal amplitude above a predetermined level to a diminished amplitude below that level. The negative feedback is provided through an IGFET, e.g. of n-channel depletion type, with the aid of a capacitor bridging its source and gate electrodes to form with the external capacitance a voltage divider for the output signal of the oscillator.

Abstract: An analog gate configuration employing multiple input transistors, eliminates distortion in its output signal when switching between multiple input signals during a corresponding switch-over interval when the input transistors are sharing current, by providing circuitry for sensing the occurrence of the switch-over interval. The sensing circuitry modulates a current source during the switch-over interval to selectively increase the current to be shared by the input transistors such that the current through each input transistor is maintained constant for any transistor which contributes to the output signal.

Abstract: A transistorized power switching circuit for controlling the conductive state of a Darlington transistor. The circuit, driven by a single signal driver, operates to switch the Darlington transistor from a conducting state to a nonconducting state as well as from a nonconducting state to a conducting state. The circuit minimizes the number of components in the circuit that introduce time delays in switching the Darlington transistor. To further enhance switching the Darlington transistor from a conducting state to a nonconducting state, a reverse bias is employed to sweep the charge back out through the base of the Darlington transistor rather than permitting the charge to pass through the Darlington transistor then to the load. The reverse bias is maintained on the Darlington transistor for the duration of the off time regardless of the duration of the off period.

Abstract: A circuit for generating a triangular voltage (V.sub.c) across a capacitor (C) having a charging current source (1, 2) and a discharging current source (3, 4) for the capacitor (C). A comparison stage (11, 12, 13, 14) compares the generated voltage (V.sub.c) with a first and a second reference voltage, respectively, from a voltage divider (17, 18, 19) and controls the generation of a setting and a resetting signal, respectively, at a bistable switching element (20, 21) when the value of the first and the second reference voltage, respectively, is reached. The bistable element (20, 21) controls a switch (7, 8) which determines charging or discharging, respectively, of the capacitor (C). The circuit is suitable for high repetition rates because of the fact that a buffer stage (28) is connected to the capacitor (C) for deriving, under the control of the capacitor voltage (V.sub.

Abstract: A circuit technique for stabilizing the timing of signals at an output node of a gate, despite substantial variations in temperature. In a gate having a switching portion and an emitter follower, the temperature-dependence of the gate delay within the switching portion may be offset by suitable control of the temperature characteristics of the load current source supplying the emitter follower output node. The load current source comprises a current source resistor, a current source transistor having its collector coupled to the output node, and a reference voltage source. The voltage source, rather than having a zero temperature coefficient as in known temperature-compensated configurations, is configured to have a temperature coefficient chosen to provide a temperature dependence in the delay through the emitter follower that offsets the temperature dependence of the delay through the switching portion so that the total gate delay is substantially temperature-independent.

Abstract: A switching circuit which uses a compound transistor pair as the switch employs to improve the switching properties a circuit branch which comprises an auxiliary transistor and a zener diode. In a preferred embodiment, the branch also included a voltage-divider resistor network to control the maximum current through the switch.

Abstract: The present invention in the preferred embodiment comprises a plurality of current mirror circuit stages connected together for amplifying a first input signal and generating an output signal. A shunt path circuit is connected to the first stage of the plurality of current mirror stages and when activated by a second input signal shunts a portion of the first input signal to ground, thus reducing the current flow into the plurality of current mirror stages. During normal operation, when the shunt path circuit is inactivated, the last stage of the plurality of current mirror stages functions as a switch and passes all of the amplified first input signal. However, during the low power consumption mode, when the shunt path circuit is activated, the last stage of the plurality of current mirror circuit stages functions as a current mirror circuit and passes current at a considerably reduced level.

Abstract: A solid state relay circuit is provided which controls the application of power to multiple loads in a manner which prevents the simultaneous application of power to more than one load. Photovoltaic diode arrays along with phototransistors are employed to control MOSFET output switching devices.

Abstract: A high speed laser driver includes a differential pair of bipolar transistors sharing a common emitter resistor as in the prior art. However, an improvement thereover resides in the use of Schottky barrier diodes, one of which couples the emitter of one transistor to the common emitter resistor and the other of which couples the emitter of the other transistor to the common emitter resistor. Furthermore, separate resistors couple the emitters of both transistors to a voltage source so that the transistors are always conducting.

Abstract: A gate circuit device of an integrated circuit tester, for variably setting the signal propagation delay time of various integrated circuits to be tested at a predetermined value, includes a gate circuit having a pair of emitter coupled transistors and a constant current source transistor connected to the emitter side of the pair of transistors, and a terminal to apply a predetermined level of voltage to the base of the constant current source transistor to control the constant current. In addition to this manner of the voltage control of signal propagation delay time, a current adjustment circuit is utilized to generate current in a constant current source transistor in response to the control current. Thus, the gate circuit device controls the signal propagation delay time by regulating either voltage or current in response to the control current.

Abstract: A field effect transistor circuit generates a reference current that can obtain a desired temperature coefficient. The circuit is self-compensatory with respect to process variations, in that a "slow" process will produce a higher than normal current, while a "fast" process will give a lower one. This results in a tight spread of slew-rate, gain, gain-bandwidth, etc. in opamps, comparators, and other linear circuits. A simple adjustment in the circuit allows the temperature coefficient to be made positive or negative if so desired. An illustrative circuit is shown for CMOS technology, but can be applied to other field effect technologies.

Abstract: A switching control circuit for power transistors controlling an inductive load. To avoid oversaturation of the transistor, causing excessive consumption and a switching difficulty on opening, said transistor is caused to operate at the limit of saturation, by means of an emitter resistor, a quasi current mirror in parallel across said resistor, another current mirror and a current amplifier. The current from said first current mirror is controlled on or off by a square wave generator such as those used in chopped power supplies or television scanning circuits for which the invention is particularly appropriate.

Abstract: Circuit for enhancing the utilizable Hall signal of a Hall sensor, including N Hall generators being operated with impressed control current and having Hall signal paths, N voltage to current converters each having an output and each being coupled to the Hall signal path of a different one of the Hall generators, and a common output connected to each of the outputs of the voltage to current converters.

Abstract: A delay circuit including: a P-channel enhancement-type transistor (Q.sub.11), linked between an input terminal (IN) and an output terminal (OUT); a capacitor (C) connected to the gate of the transistor (Q.sub.11); a charging switch (SW.sub.1) for charging the capacitor (C); a discharging switch (SW.sub.2) for discharging the capacitor (C); and a control circuit (CONT) for controlling the charging switch (SW.sub.1) and the discharging switch (SW.sub.2). The delay time period is determined by the discharging operation of the discharging switch (SW.sub.1) after the charging operation of the charging switch (SW.sub.1).