Patents Examined by B. P. Davis
  • Patent number: 4733930
    Abstract: To a carrier (1, 1') there is cemented a bar of a material (3, 3'), for example glass or a ceramic material, which is subsequently divided, using cuts (7, 7') which extend transversely of its longitudinal direction, into a number of slices (9, 9') which are separately cemented to the carrier. Each slice (9, 9') is provided with a groove (13, 13') which extends parallel to the cuts (7, 7'). The grooves (13, 13') are curved and have a center of curvature which is situated at the side of the bar (3, 3') which faces the carrier (1, 1'). In the grooves (13, 13') there are secured optical fibres (19, 19') which follow the curvature of the groove, after which a side portion of the fibres which is situated furthest from the carrier (1, 1') is ground off. A flat ground face (21, 21') is thus formed one each fibre (19, 19'). Such ground fibres (19, 19') are arranged so that their ground faces contact one another in order to form directional couplers, after which the slices (9, 9') are detached from the carrier (1, 1').
    Type: Grant
    Filed: October 22, 1986
    Date of Patent: March 29, 1988
    Assignee: U.S. Philips Corporation
    Inventors: Petrus J. W. Severin, Adrianus P. Severijns, Johannes A. M. Steenbakkers
  • Patent number: 4734594
    Abstract: A Hall effect device with offset compensation in which the output terminals of a Hall effect element formed in an epitaxial layer are connected to a differential current source. The sum of first and second currents produced by the source is determined by a resistor formed in the epitaxial layer in which the Hall effect element is formed and which is powered by the same electrical source as the Hall effect element so as to produce a current which tracks the current through the Hall effect element with temperature. The current through the resistor is split by a pair of trimmable temperature insensitive resistors and supplied to a pair of cross-coupled current mirrors which supply the currents to the output terminals of the Hall effect element.
    Type: Grant
    Filed: December 31, 1986
    Date of Patent: March 29, 1988
    Assignee: Honeywell Inc.
    Inventor: Richard W. Nelson
  • Patent number: 4733106
    Abstract: A device for driving a capacitive load, comprising a first switching element responsive to an external control signal for selectively conducting a charge current therethrough to the load, a second switching element responsive to the external control signal for conducting a discharge current from the load and a generator for generating from the discharge current a cutoff signal to be applied to the first switching element to ensure turn-off of the latter.
    Type: Grant
    Filed: April 1, 1985
    Date of Patent: March 22, 1988
    Assignees: Hitachi, Ltd., Hitachi Engineering Co.
    Inventors: Mitsuhiko Okutsu, Tatsuo Shimura, Tadaaki Kariya
  • Patent number: 4733108
    Abstract: An improved on-chip bias generator for producing a negative bias for the substrate of a VLSI FET chip for reducing the body effect and for increasing circuit speed. The improvement comprises active FETs to rectify a ring oscillator square wave output, thereby reducing the voltage losses in the rectifier and increasing the amount of voltage delivered to the substrate.
    Type: Grant
    Filed: June 28, 1982
    Date of Patent: March 22, 1988
    Assignee: Xerox Corporation
    Inventor: Ho-Dai Truong
  • Patent number: 4730128
    Abstract: A bias circuit accurately compensates temperature coefficient of an optical multiplication in an avalanche photodiode with low power consumption. Temperature coefficient voltage for compensating temperature coefficient of the multiplication of the photodiode is delivered from an emitter follower added a constant voltage to an input of an operational amplifier. The output of the operational amplifier is added, via a voltage regulating diode, to a base of a transistor of which emitter and collector are respectively connected to a terminal of the photodiode and a negative power source. Emitter voltage of the transistor is dividedly connected to another input terminal of the operational amplifier, wherein this connection is negative feedback. The temperature coefficient voltage generated at the emitter follower is amplified inversely proportional to the divided ratio of the emitter voltage of the transistor in order to compensate the temperature coefficient of the multiplication of the photodiode.
    Type: Grant
    Filed: September 8, 1986
    Date of Patent: March 8, 1988
    Assignee: Iwatsu Electric Co., Ltd.
    Inventor: Yoshihito Seki
  • Patent number: 4730125
    Abstract: An arrangement for synchronizing the PWM clock signals of several clocked direct voltage converters uses commercially available control circuits for controlling the converters. In the case where the TDA 4714 and TDA 4716 units are used as the control circuits no connection for synchronizing the switching clock signals is provided. The arrangement guarantees the synchronism of the oscillators of all the control circuits and features apparatus by which the phase shift between two switching clocks of two arbitrary direct voltage converters can be chosen to amount to 0.degree. or 180.degree..
    Type: Grant
    Filed: July 7, 1986
    Date of Patent: March 8, 1988
    Assignee: U.S. Philips Corporation
    Inventors: Walter Losel, Gerd Kohler
  • Patent number: 4730124
    Abstract: A high-transconductance composite PNP transistor comprises a PNP transistor and three or more NPN transistors arranged in a three-terminal configuration which behaves as a PNP transistor, and yet exhibits high beta, alpha greater than one, and transconductance approaching infinity.
    Type: Grant
    Filed: February 11, 1987
    Date of Patent: March 8, 1988
    Assignee: Tektronix, Inc.
    Inventor: Arthur J. Metz
  • Patent number: 4730165
    Abstract: A non-linear signal processing apparatus used in a video tape recorder or a video disk player is disclosed. The time variation of an input signal or a processed version thereof is non-linearly processed by a differential circuit and a closed loop including a non-linear circuit. The non-linearly processed time variation of the signal or a processed version thereof is arithmetically combined with the input signal. Thus, the same non-linear characteristic as that obtained by the prior art analog signal technique is attained by the digital signal processing technique, which is superior in integrity and stability. By appropriately selecting the characteristic of the non-linear circuit, better results than those obtainable by the analog signal processing technique are achieved.
    Type: Grant
    Filed: September 9, 1985
    Date of Patent: March 8, 1988
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masakazu Nishino, Kiyokazu Hashimoto
  • Patent number: 4728828
    Abstract: A transresistance amplifier particularly adapted for use in a radiation detection system. The amplifier includes a feedback gain stage with a switched capacitor load. The amplifier is arranged to provide an average detector voltage approximating zero thus substantially reducing detector noise and also providing a low equivalent input impedance for increasing injection efficiency. A switched capacitor output load is also provided which allows the total transresistance to be determined by simply selecting an appropriate capacitance value.
    Type: Grant
    Filed: June 24, 1985
    Date of Patent: March 1, 1988
    Assignee: Santa Barbara Research Center
    Inventor: Mark A. Goodnough
  • Patent number: 4728825
    Abstract: In a bidirectional linear switch in which two MOS transistors are used with their sources mutually connected, the gates and the substrates of the transistors are also respectively mutually connected and a control signal is applied to the gates. A potential of the polarity such that the substrates are reversely biased to the sources is applied between the substrates and the sources. With this constitution, the linearity of the bidirectional switch is improved.
    Type: Grant
    Filed: May 29, 1986
    Date of Patent: March 1, 1988
    Assignees: Haramachi Semi-Hitachi Ltd., Hitachi Conductor Ltd.
    Inventors: Shigeru Sugayama, Tadaaki Kariya, Tatsuo Shimura, Sigeo Tomita
  • Patent number: 4728817
    Abstract: A transistor drive circuit includes a driver transistor and a power switching transistor connected in a Darlington configuration which receives turn-on and turn-off signals from a drive transformer. A capacitor is provided for connection between the driver transistor base and the switching transistor emitter during a turn-off period such that the voltage on the capacitor hastens turn-off of the driver transistor and the switching transistor. A diode connected between the emitter and the base of the driver transistor provides for continuing current flow from the capacitor following turn-off of the driver transistor but prior to turn-off of the switching transistor. After the switching transistor has turned off, the capacitor is recharged prior to the presence of a turn-on signal from the drive transformer.
    Type: Grant
    Filed: February 9, 1987
    Date of Patent: March 1, 1988
    Assignee: Westinghouse Electric Corp.
    Inventors: Ralph D. Jessee, Joseph M. Urish
  • Patent number: 4727270
    Abstract: A noise immune circuit for use with pulse type sensors whereby a noise modulated signal is clipped and shaped in a hard limiter to a square wave signal before being filtered by a low pass filter. A Schmitt trigger with substantial feedback then biases the threshold of said hard limiter for discrimination of noise from signal.
    Type: Grant
    Filed: May 8, 1986
    Date of Patent: February 23, 1988
    Assignee: North American Philips Corporation
    Inventor: Paul E. Payne
  • Patent number: 4725744
    Abstract: A logic circuit including an input transistor receiving the input signal at its emitter, an output transistor in emitter-follower configuration receiving the signal from the collector of the input transistor, a voltage dividing resistor pair connected to the collector of the input transistor, and a feedback circuit conducting the signal produced by the voltage dividing resistor pair back to the base of the input transistor, the output signal being produced at the emitter of the output transistor.
    Type: Grant
    Filed: May 21, 1985
    Date of Patent: February 16, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Masayoshi Yagyuu, Hiroyuki Itoh, Akira Masaki
  • Patent number: 4725741
    Abstract: Prior circuits for rapidly switching Darlington-connected transistors between on and off states have accomplished relatively fast switching by applying reverse base drive to the transistors to quickly sweep the excess carriers therefrom. However, such circuits have not accomplished the required degree of reduction of turn off time and have induced localized "hot spots" in the base-collector junctions of the transistors.
    Type: Grant
    Filed: May 12, 1986
    Date of Patent: February 16, 1988
    Assignee: Sundstrand Corporation
    Inventors: Sampat S. Shekhawat, P. John Dhyanchand
  • Patent number: 4721871
    Abstract: A high voltage switch circuit, wherein the source of a first MOS transistor is connected to the gate of a second MOS transistor, the source of the second MOS transistor is connected to the gate of the first MOS transistor, the drain of a third MOS transistor and the gate of a fourth MOS transistor, the drains of the first and fourth MOS transistors are connected to a high voltage input terminal, the sources of the third and fourth MOS transistors are connected to an output terminal, a voltage for turning the transistor ON is applied to the gate of the third MOS transistor, one electrodes of two independent capacitors are connected to the gates of the first and second MOS transistors, and a clock is applied through transmission gates to the other electrode of the two capacitors.
    Type: Grant
    Filed: October 9, 1986
    Date of Patent: January 26, 1988
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Akio Kiji, Kazuo Aoki, Seiichirou Asari
  • Patent number: 4720683
    Abstract: A circuit for preventing retarding field oscillations in electron switching tubes, includes a feeding diode connected to the plate of the switching tube, and a power supply for generating the retarding field voltage, the power supply being connected in parallel with the switching tube through the feeding diode.
    Type: Grant
    Filed: July 18, 1986
    Date of Patent: January 19, 1988
    Assignee: Siemens Aktiengesellschaft
    Inventors: Jochen Stahl, Ingo Beling
  • Patent number: 4719374
    Abstract: A broadband switching circuit has two or more field controlled switch elements coupled in series between an input terminal and an output terminal. A passive, lossy network is coupled between a junction of consecutive switch elements and a virtual around. The off state isolation of the switch elements is improved and signal losses are reduced significantly. When utilized in multichannel switching circuits, only a single switching voltage polarity per channel is required.
    Type: Grant
    Filed: April 11, 1986
    Date of Patent: January 12, 1988
    Assignee: Ampex Corporation
    Inventor: Charles A. Bialo
  • Patent number: 4719373
    Abstract: A high-speed operation, low-power consumption gate circuit structure comprises a combination of complementary field-effect-transistors and bipolar transistors and discharge means for discharging accumulated charges from these transistors when the field-effect-transistors and bipolar transistors are turned off.
    Type: Grant
    Filed: April 30, 1987
    Date of Patent: January 12, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Ikuro Masuda, Kazuo Kato, Takao Sasayama, Yoji Nishio, Shigeo Kuboki, Masahiro Iwamura
  • Patent number: 4716304
    Abstract: For driving each power transistor of a three phase bridge rectifier for utilizing d.c. electric power for the control and energization of a motor, each individual power transistor is provided with an individual driver circuit supplied an individual power supply. Each power transistor in such a rectifier has a reverse voltage free wheeling diode connected between emitter and collector. Each individual driver circuit has its input control signal supplied through a galvanic isolation stage in the form of an optical coupler and the power supply has its input connection to a source of power galvanically isolated by a transformer, supplying a relatively high frequency for powering the rectifier of the driver power supply. The final driver stage utilizes Darlington transistor combinations of complementary types, one Darlington combination being supplied with negative voltage and the other being supplied with positive voltage, by the power supply rectifier.
    Type: Grant
    Filed: June 20, 1986
    Date of Patent: December 29, 1987
    Assignee: Robert Bosch GmbH
    Inventors: Arnim Fiebig, Rupert Weber
  • Patent number: 4716316
    Abstract: A logarithmic rf amplifier includes a plurality of cascaded stages each including a differential amplifier which performs full-wave rectification of the rf signal and a circuit for providing a video signal representative of the full-wave rectified rf signal. The logarithmic amplifier further includes a circuit for supplying rf signals of equal amplitude and opposite polarity to the inputs of the first differential amplifier stage and a circuit for summing the video signals from each of the stages and providing a logarithmic video output. The amplifier exhibits extremely fast pulse response and clean limiting.
    Type: Grant
    Filed: May 20, 1987
    Date of Patent: December 29, 1987
    Assignee: Varian Associates, Inc.
    Inventor: Dennis P. Colin