Abstract: A semiconductor device package includes a first conductive base, a first insulation layer and a second insulation layer. The first conductive base has a first surface, a second surface opposite to the first surface and a lateral surface extended between the first surface and the second surface. The lateral surface includes a first portion adjacent to the first surface and a second portion adjacent to the second surface. The first insulation layer comprises a first insulation material. The first insulation layer has a first surface and a second surface opposite to the first surface. The first insulation layer covers the first portion of the lateral surface of the first conductive base. The second insulation layer comprises a second insulation material and covers the second portion of the lateral surface of the first conductive base. The first insulation material is different from the second insulation material.

Abstract: A multi-grooved interposer includes an interposer substrate containing multiple parallel grooves laterally extending along a first direction and laterally spaced among one another along a second direction, and multiple conductive strips. The multiple parallel grooves are recessed from front side surfaces of the multi-grooved interposer in a third direction toward a back side surface of the multi-grooved interposer. The multiple conductive strips continuously extend across recessed surfaces in the multiple parallel grooves and the front side surfaces along the second direction with an undulating surface profile to provide electrically conductive paths across the multiple parallel grooves. Each of the multiple parallel grooves is configured to receive an edge of a respective semiconductor chip.

Abstract: Disclosed are a light emitting display device and a method of manufacturing the same, which prevent a lifetime of a light emitting layer from being shortened and prevent occurrence of a turn-on defect. The light emitting display device includes a plurality of pixels each including a transistor having a gate electrode, an active layer overlapping the gate electrode, a source electrode connected to one side of the active layer, and a drain electrode connected to another side of the active layer. The pixels further include a light emitting device having a first electrode, a light emitting layer disposed on the first electrode, and a second electrode disposed on the light emitting layer. The light emitting display device includes a contact hole, and the first electrodes of at least two of the pixels are electrically connected to side surfaces of respective source electrodes or to side surfaces of respective drain electrodes in the contact hole.

Abstract: A FinFET device structure is provided. The FinFET device structure includes a fin structure extended above a substrate and a gate structure formed over a middle portion of the fin structure. The middle portion of the fin structure is wrapped by the gate structure. The FinFET device structure includes a source/drain (S/D) structure adjacent to the gate structure, and the S/D structure includes a doped region at an outer portion of the S/D structure, and the doped region includes gallium (Ga). The FinFET device structure includes a metal silicide layer formed over the doped region of the S/D structure, and the metal silicide layer is in direct contact with the doped region of the S/D structure.

Abstract: The present invention provides an epitaxial structure of Ga-face group III nitride, its active device, and the method for fabricating the same. The epitaxial structure of Ga-face AlGaN/GaN comprises a substrate, a Buffer layer (C-doped) on the substrate, an i-GaN (C-doped) layer on the Buffer layer (C-doped), an i-Al(y)GaN buffer layer on the i-GaN (C-doped) layer, an i-GaN channel layer on the i-Al(y)GaN buffer layer, and an i-Al(x)GaN layer on the i-GaN channel layer, where x=0.1˜0.3 and y=0.05˜0.75. By using the p-GaN inverted trapezoidal gate or anode structure in device design, the 2DEG in the epitaxial structure of Ga-face group III nitride below the p-GaN inverted trapezoidal structure will be depleted, and thus fabricating p-GaN gate enhancement-mode (E-mode) AlGaN/GaN high electron mobility transistors (HEMTs), p-GaN anode AlGaN/GaN Schottky barrier diodes (SBDs), or hybrid devices.

Abstract: A packaged semiconductor device has a thin profile, two face-to-face mounted power semiconductor device dice, and no internal bond wires. A first semiconductor device die is mounted so that a gate pad is bonded to the bottom of a first lead, and so that a source pad is bonded to the bottom of a second lead. A second semiconductor device die identical to the first is mounted so that a gate pad is bonded to the top of the first lead, and so that a source pad is bonded to the top of the second lead. The backside drain electrodes of both dice are electrically coupled to a third lead. The third lead in one example has a forked-shape, and the two dice are disposed entirely between the two tines of the fork. After encapsulation, the three leads extend parallel to each other from a body portion of the package.

Abstract: A synaptic semiconductor device and neural networks using the same operates with an ultrahigh speed through a tunneling operation by a semi-floating gate and applies pre- and post-synaptic signals to first and second control gates directly.

Abstract: A light control device according to the present disclosure includes: stacked M (provided that M?1) light control layers 113M in each of which a first nanocarbon film 114, a first intermediate layer 117A, a dielectric material layer 116, and a second intermediate layer 117B are stacked; and a second nanocarbon film 115formed on the second intermediate layer 117B included in an M-th light control layer 113M. A voltage is applied to the first nanocarbon film 114 and the second nanocarbon film 115.

Abstract: A method for manufacturing a semiconductor device, including: forming a metal carbide film including a first metal element and a second metal element on a substrate, by time-divisionally performing, supplying a first precursor gas containing the first metal element and not containing carbon to the substrate, supplying a second precursor gas containing the second metal element differing from the first metal element and not containing carbon to the substrate, and supplying a reaction gas containing carbon to the substrate.

Abstract: The present invention provides a MOS (Metal-Oxide-Silicon) device having mitigated threshold voltage roll-off and a threshold voltage roll-off mitigation method therefor. The MOS device includes: a substrate, a well region, an isolation region, a gate, two LDDs (Lightly-Doped-Drains), a source, a drain and a compensation doped region. The compensation doped region is substantially in contact with at least a part of a recessed portion along the channel length direction. Viewing from a cross-section view, at a boundary where the compensation doped region is in contact with the isolation region along the channel length direction, the compensation doped region has two doped region widths along the channel width direction, wherein, the two doped region widths of the compensation doped region are both not greater than 10% of the width of the operation region. Two doped region widths are defined as distances within an interior part and an exterior part of the operation region, respectively.

Abstract: A compound for an organic photoelectric device includes at least one of a compound represented by Chemical Formula 1, a compound represented by Chemical Formula 2 and a combination thereof.

Abstract: A compound that includes a ligand L, having the formula, is provided. In the structure of Formula I, each R1, R2, R3, R4, R4, R5, R6, R7, and R8 is independently selected from a variety of substituents; any adjacent substituents are optionally joined or fused into a ring; at least one of R3, R4, and R5 is not hydrogen; “a” is an integer from 0 to 10; (i) when a is 0, at least one of R7, R8, and an R2 adjacent to ring B, is not hydrogen, and (ii) when a is 1 to 10, at least one of an R2 adjacent to ring A and an R6 adjacent to ring C is not hydrogen; ligand L is coordinated to a metal M having an atomic weight greater than 40; and ligand L is optionally linked with other ligands to comprise a tridentate, tetradentate, pentadentate or hexadentate ligand.

Abstract: An organic light-emitting diode display includes a substrate including an active area and a dead area surrounding the active area. The organic light-emitting diode display further includes a first organic light-emitting device disposed in the active area. The organic light-emitting diode display additionally includes a second organic light-emitting device disposed in the dead area, and a sensor configured to sense light emitted from the second organic light-emitting device. The first organic light-emitting device emits light in a first direction, and the second organic light-emitting device emits light in a second direction that is opposite to the first direction and is toward the sensor.

Abstract: Conjugated polymer-based organic field-effect transistors have garnered attention since the solution processability of the semiconductor material raises the possibility of lower device fabrication costs, and considerable progress has been made on achieving high mobility systems. Further improvements in charge carrier mobility while using non-specialized deposition techniques and minimizing the volume of semiconductor used in the fabrication process are important considerations for practical implementation. Here, a method of fabricating devices is disclosed that uses a technique (for example, a scalable blade-coating technique) to cast polymer thin film devices from blend solutions with one component being the polymer semiconductor and the other being a commodity polymer. Even when mixing the semiconducting polymer with 90% polystyrene by weight, an average mobility of 2.7±0.4 cm2 V?1 s?1 can be obtained.

Abstract: There are disclosed herein various implementations of a charge trapping prevention III-Nitride transistor. Such a transistor may be a III-Nitride high electron mobility transistor (HEMT) including a III-Nitride intermediate body situated over a substrate, a channel layer situated over the III-Nitride intermediate body, and a barrier layer situated over the channel layer. The channel layer and the barrier layer are configured to produce a two-dimensional electron gas (2DEG). In addition, the III-Nitride transistor includes a dielectric layer situated over the barrier layer, a gate coupled to the barrier layer, and a drain electrode and a source electrode each extending through the dielectric layer. The drain electrode makes ohmic contact with one or both of the barrier layer and a charge trapping prevention layer situated between the dielectric layer and the barrier layer.

Abstract: A flexible film structure, a method of manufacturing the flexible film structure, and a flexible display device, the flexible film structure including a base film; and at least one functional hard coating layer on the base film, wherein the functional hard coating layer includes a siloxane polymer having an epoxy group.

Abstract: Embodiments of the invention include a light emitting device including a substrate and a semiconductor structure including a light emitting layer. A first reflective layer surrounds the light emitting device. A wavelength converting element is disposed over the light emitting device. A second reflective layer is disposed adjacent a first sidewall of the wavelength converting element.

Abstract: A semiconductor package may be composed of a variety of different types of semiconductor chips of different sizes and support structures stacked within the semiconductor package. Semiconductor chips having a larger chip size may be stacked above smaller semiconductor chips. Smaller chips may be included in a layer of the semiconductor package along with a support structure which may assist supporting upper semiconductor chips, such as during a wire bonding process connecting bonding wires to chip pads of the semiconductor chips above the support structure. Use of different thicknesses of die attach film may allow for a further reduction in height of the semiconductor package.

Abstract: A photoelectric conversion element, including a first electrode, a second electrode, and at least one organic layer being present between the first electrode and the second electrode, in which the organic layer contains at least two kinds of compounds having the same skeletons and different substituents in combination.

Abstract: A display device includes a substrate, a barrier layer, a transistor, and a first impact buffer layer. The barrier layer is disposed on the substrate. The transistor is disposed on the barrier layer. The first impact buffer layer is disposed between the barrier layer and the transistor. The first impact buffer layer includes a nanostructure. The nanostructure includes pores.