Patents Examined by Bot Ledynh
  • Patent number: 5850332
    Abstract: A process for making a solid electrolytic capacitor is provided which comprises the following steps. First, a capacitor element is prepared which includes a capacitor chip and an anode wire projecting from the capacitor chip. Then, the anode wire of the capacitor element is brought into contact with an anode lead. Finally, the anode wire is bonded to the anode lead at a connecting portion spaced from a tip of the anode wire.
    Type: Grant
    Filed: October 30, 1995
    Date of Patent: December 15, 1998
    Assignee: Rohm Co. Ltd.
    Inventors: Youichi Kunieda, Shigeki Kibayashi
  • Patent number: 5844166
    Abstract: In the present invention the cover-like part (21) of an RF shield is manufactured from a transparent material, e.g., plastic, and unplated areas that function as light conductors (22) are left in the conductive plating covering the shield. The present invention combines an RF shield and a light conductor into one structure whose manufacturing process is quite easy to control. The present invention eliminates the necessity of having separate plates that function as light conductors.
    Type: Grant
    Filed: August 6, 1997
    Date of Patent: December 1, 1998
    Assignee: Nokia Mobile Phones, Ltd.
    Inventors: Mikko Halttunen, Pekka Lonka
  • Patent number: 5844168
    Abstract: A ball grid array (BGA) package is provided in which the stiffener of the BGA may also be utilized as a conductive layer. A TAB tape is adhered to the stiffener by an adhesive and both the TAB tape and the adhesive may have vias which open to the stiffener. Conductive plugs which may be formed of solder paste, conductive adhesives, or the like may then be filled in the vias to provide electrical connection from the TAB tape to the stiffener. The vias may be located adjacent to solder ball locations. The TAB tape may include multiple conductor layers or multiple layers of single conductive layer TAB tape may be stacked upon each other to provide additional circuit routing. Further, the TAB tape layers may also be combined with the use of metal foil layers.
    Type: Grant
    Filed: December 2, 1996
    Date of Patent: December 1, 1998
    Assignee: Minnesota Mining and Manufacturing Company
    Inventors: Randolph Dennis Schueller, John David Geissinger, Anthony Raymond Plepys, Howard Edwin Evans
  • Patent number: 5844170
    Abstract: A cable closure assembly using a cold shrink, or pre-stretched, tube has a flowable material in the assembly, and an extra support core which reinforces the conventional support core that maintains the tube in a radially expanded state. The flowable material may be used to fill voids, or provide improved bonding or water resistance. The extra, or secondary, support core has an outer diameter which is approximately equal to the inner diameter of the primary support core. The secondary support core is sufficiently long to substantially support the area where the flowable material abuts the primary support core. In one embodiment particularly suited for power applications, the elastomeric tube is electrically insulative and the flowable material provides electrical stress control, and another elastomeric tube is provided having a high permittivity. The primary support core may have a varying diameter such that the tubular member has different zones with different expanded diameters.
    Type: Grant
    Filed: March 1, 1996
    Date of Patent: December 1, 1998
    Assignee: Minnesota Mining and Manufacturing Company
    Inventors: Lawrence C. Chor, Brian K. Molitor
  • Patent number: 5835980
    Abstract: A receptacle plate cover for a standard duplex electrical outlet which covers the entire outlet except for the outlet apertures that receive the prongs of an electrical plug.
    Type: Grant
    Filed: August 6, 1997
    Date of Patent: November 10, 1998
    Assignee: American Tack & Hardware Co, Inc.
    Inventor: Vazgen Houssian
  • Patent number: 5475568
    Abstract: A power supply structure for a multichip package is provided to improve the transmission performance of signals. Cases are fitted onto one face of a ceramic substrate. On the other face are aligned substrates. On each of the substrates are erected I/O pins. The I/O pins are connected to signal pins of LSIs via the ceramic substrate's internal layer. On side faces of the substrates are provided power supply pads. To the power supply pads are connected the power supply pins of the LSIs via the ceramic substrate's internal layer. When power is to be supplied, electroconductive bars are inserted between the substrates. The electroconductive bars supply power to the LSIs via the power supply pads. A cable is connected to one of the I/O pins.
    Type: Grant
    Filed: April 28, 1994
    Date of Patent: December 12, 1995
    Assignee: NEC Corporation
    Inventor: Shoji Umesato
  • Patent number: 5455741
    Abstract: An electronic device comprises a three dimensional electronic element holder of a non-conducting material having at least one cavity in a first surface and a plurality of lead through holes with inlet guides extending from the cavity to a second surface having a circuit thereon, an electronic element mounted in the cavity and having a plurality of leads, a plurality of the leads extending via the through holes from the element to the second surface, and a plurality of lead terminal recesses formed at the second surface for for receiving and forming terminal ends and connections of the leads to the circuit on the second surface.
    Type: Grant
    Filed: October 26, 1993
    Date of Patent: October 3, 1995
    Assignee: Pulse Engineering, Inc.
    Inventors: Ka K. Wai, Moin Ahmad, Aurelio J. Gutierrez, James D. Lint
  • Patent number: 5448452
    Abstract: A circuit board for mounting a band-pass filter. An elongate through hole is formed through the ground surface of the circuit board for shielding the input and output terminals of a band-pass filter from each other. The through hole eliminates unexpected coupling between the input and output terminals within the circuit board. Solder which flows into the through hole allows the casing of the filter to closely contact the ground surface of the circuit board.
    Type: Grant
    Filed: June 18, 1993
    Date of Patent: September 5, 1995
    Assignee: NEC Corporation
    Inventors: Hisashi Kondo, Tomoshi Sone
  • Patent number: 5436800
    Abstract: A circuit board is ejected from an electrical chassis by inserting a pair of implements into corresponding pairs of apertures disposed on opposing side members of the electrical chassis. The end portions of the implements are engaged in a first pair of notches, each one being disposed on each of a pair of opposing edges of the circuit board provided within the electrical chassis, and a force is exerted on each of the first notches disposed on each of the pair of opposing edges of the circuit board with the pair of implements, to disengage the circuit board from a connector located at one end of the electrical chassis.
    Type: Grant
    Filed: July 16, 1993
    Date of Patent: July 25, 1995
    Assignee: Digital Equipment Corporation
    Inventors: David W. Maruska, Jeffrey M. Lewis
  • Patent number: 5434749
    Abstract: This invention concerns a hybrid printed circuit board which permits easy and reliable connection between small-current circuit conductors and large-current circuit conductors. The hybrid printed circuit board of this invention comprises: an insulating substrate of synthetic resin having fixing bosses erected thereon; a flexible printed circuit sheet having small-current circuit conductors; and busbars as large-current circuit conductors; wherein the flexible printed circuit sheet is stacked and arranged on the insulating substrate so that the fixing bosses erected on the insulating substrate pass through and above the flexible printed circuit sheet, the busbars as large-current circuit conductors are put in contact with the small-current circuit conductors, and the fixing bosses are heated and deformed to fix the busbars in place.
    Type: Grant
    Filed: March 9, 1994
    Date of Patent: July 18, 1995
    Assignee: Yazaki Corporation
    Inventor: Yoshiaki Nakayama
  • Patent number: 5434357
    Abstract: A sealed semiconductor unit includes an electrical component within a defined area on a semiconductor material. A cover with the dimensions of the semiconductor defined area is placed over the semiconductor material with a sealant there between. The dimensions of the cover are aligned with the dimensions of the semiconductor. The sealed unit includes electrical contacts extending from outside the sealed unit to the electrical component within the sealed unit on the semiconductor material. The sealed semiconductor unit, including the cover, the semiconductor material, and the electrical component, has an area of the semiconductor material.
    Type: Grant
    Filed: December 23, 1991
    Date of Patent: July 18, 1995
    Inventors: Donald K. Belcher, Calvin L. Adkins
  • Patent number: 5432682
    Abstract: A mounting bracket is disclosed that is intended to be used, in conjunction with other identical mounting brackets, to facilitate the insertion and removal of certain printed circuit boards known as AT style cards into and out of passive backplane or motherboard slots in a computer housing, as well as to protect the AT style computer cards from damage while they are resident in the housing. The mounting bracket of the present invention is adaptable to fit an AT style card of any length, and is capable of providing close spacing between inserted cards.
    Type: Grant
    Filed: January 27, 1993
    Date of Patent: July 11, 1995
    Assignee: RAAC Technologies, Inc.
    Inventors: Kevin Giehl, David Brandt, David Franke
  • Patent number: 5432678
    Abstract: A mounting device (170) of a semiconductor integrated circuit (202) allows edge mounting on surface of a printed circuit board (250). The mounting device includes a top portion (150) to provide for cooling and protection of the semiconductor chip while a side portion (140) provides for cooling and positioning on the printed circuit board.
    Type: Grant
    Filed: May 12, 1994
    Date of Patent: July 11, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: Ernest Russell, Daniel Baudouin, James S. Wallace
  • Patent number: 5430425
    Abstract: A clamping frame for a transformer core has a clamping frame part and a tensioner. The surfaces of the tensioner and of the clamping frame part abutting the transformer core lie in a common plane. The tensioner features an engagement part, which engages in a recess of the clamping frame part.
    Type: Grant
    Filed: April 22, 1994
    Date of Patent: July 4, 1995
    Assignee: Siemens Aktiengesellschaft
    Inventors: Friedrich Alber, Rudolf Dedelmahr, Winfried Jungnitz, Rudolf Link, Hans Schott, Siegfried Weiss
  • Patent number: 5430250
    Abstract: Single, continuous bonding wires for an integrated-circuit die are supported in mid-span by a support ring which is snap-fit or adhesively bonded to a die-attach paddle of a leadframe. The support member includes a groove formed in its distal end for receiving an adhesive material, if necessary, for securing the bonding wires in position to prevent wire-wash and electrically shorting of the bonding wires when a plastic molding compound is formed around the die and leadframe. Alternatively the bonding wires are contained within notches formed in the distal end of the support ring. A lid placed over the support ring provides an enclosure for the integrated-circuit die. Stacking of support rings on each other and concentric support rings provide various optional arrangements for supporting bonding wires.
    Type: Grant
    Filed: April 8, 1994
    Date of Patent: July 4, 1995
    Assignee: VLSI Technology, Inc.
    Inventor: Young I. Kwon
  • Patent number: 5428505
    Abstract: A printed circuit board comprising a plurality of lands onto which a plurality of leads of an electronic component are soldered. These lands are arrayed in parallel one another. Each of these lands includes a narrow portion basically extending in a longitudinal direction thereof and having a predetermined constant width, and a wide portion protruding laterally from both edges of the narrow portion.
    Type: Grant
    Filed: August 5, 1994
    Date of Patent: June 27, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shouzi Sakemi, Tadahiko Sakai
  • Patent number: 5424920
    Abstract: An integrated stack of layers incorporating a plurality of IC chip layers has an end layer which is formed of dielectric material (or covered with such material). The outer surface of the end layer provides a substantial area for the spaced location of a multiplicity of lead-out terminals, to which exterior circuitry can be readily connected. In the preferred embodiment, each lead-out terminal on the outer surface of the end layer is connected to IC circuitry embedded in the stack by means of conducting material in a hole through the end layer, and a conductor (trace) on the inner surface of the end layer which extends from the hole to the edge of the end layer, where it is connected by a T-connect to metalization on the access plane face of the stack.
    Type: Grant
    Filed: April 25, 1994
    Date of Patent: June 13, 1995
    Assignee: Irvine Sensors Corporation
    Inventor: Michael K. Miyake
  • Patent number: 5422435
    Abstract: A circuit assembly which includes a semiconductor die having substantially parallel opposing first and second surfaces and at least one electrical contact mounted on the first surface. A first element having substantially parallel opposing first and second surfaces and at least one electrical contact mounted on one of its surfaces is mounted on and at least partially supported at its second surface by the first surface of the semiconductor die. The first element is positioned such that the semiconductor die electrical contact is exposed. A fine wire conductor having first and second ends is connected at its first end to either the semiconductor die electrical contact or the first element electrical contact. A method of manufacturing this circuit assembly is also disclosed.
    Type: Grant
    Filed: May 22, 1992
    Date of Patent: June 6, 1995
    Assignee: National Semiconductor Corporation
    Inventors: Hem P. Takiar, Peng-Cheng Lin, Luu T. Nguyen
  • Patent number: 5422791
    Abstract: In the case of a switching element, a pressure-compensation element (20) is inserted in the base body (10) of the terminal strip (11) in a recess so that a pressure compensation is possible between the interior of the housing (17) and the outer atmosphere. By means of this special arrangement of the pressure-compensation element (20) in the terminal strip (11) it is possible to test the functional capability of the pressure-compensation elements in the installed state in a simple way without additional testing processes.
    Type: Grant
    Filed: April 21, 1994
    Date of Patent: June 6, 1995
    Assignee: Robert Bosch GmbH
    Inventors: Willy Bentz, Siegfried Goetzke, Peter Schiefer
  • Patent number: 5418689
    Abstract: A printed circuit board or card for direct chip attachment that includes at least one power core, at least one signal plane that is adjacent to the power core, and plated through holes for electrical connection is provided. In addition, a layer of dielectric material is adjacent the power core and a circuitized conductive layer is adjacent the dielectric material, followed by a layer of photosensitive dielectric material adjacent the conductive layer. Photodeveloped blind vias for subsequent connection to the power core and drilled blind vias for subsequent connection to the signal plane are provided. Also provided is process for fabricating the printed circuit board or card for direct chip attachment.
    Type: Grant
    Filed: February 1, 1993
    Date of Patent: May 23, 1995
    Assignee: International Business Machines Corporation
    Inventors: Warren A. Alpaugh, Voya R. Markovich, Ajit K. Trivedi, Richard S. Zarr