Patents Examined by Bradford Gates
  • Patent number: 8980761
    Abstract: Methods for processing a substrate are described herein. Methods can include positioning a substrate comprising silicon in a processing chamber, delivering a plasma to the surface of the substrate while biasing the substrate, exposing the surface of the substrate to ammonium fluoride (NH4F), and annealing the substrate to a first temperature to sublimate one or more volatile byproducts.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: March 17, 2015
    Assignee: Applied Materials, Inc.
    Inventors: David T. Or, Joshua Collins, Mei Chang
  • Patent number: 8946090
    Abstract: A method for selective etching of an SiGe mixed semiconductor layer on a silicon semiconductor substrate by dry chemical etching of the SiGe mixed semiconductor layer with the aid of an etching gas selected from the group including ClF3 and/or ClF5, a gas selected from the group including Cl2 and/or HCl being added to the etching gas.
    Type: Grant
    Filed: July 2, 2008
    Date of Patent: February 3, 2015
    Assignee: Robert Bosch GmbH
    Inventors: Volker Becker, Franz Laermer, Tino Fuchs, Christina Leinenbach
  • Patent number: 8945405
    Abstract: A magneto-resistive reader includes a first magnetic shield element, a second magnetic shield element and a magneto-resistive sensor stack separating the first magnetic shield element from the second magnetic shield element. The first shield element includes two ferromagnetic anisotropic layers separated by a grain growth suppression layer.
    Type: Grant
    Filed: April 23, 2013
    Date of Patent: February 3, 2015
    Assignee: Seagate Technology LLC
    Inventors: Vladyslav Alexandrovich Vas'ko, Venkateswara Rao Inturi, Michael C. Kautzky, Zhihong Lu, Mark T. Kief, Yifan Zhang
  • Patent number: 8940182
    Abstract: Etching compositions are provided. The etching composition includes a phosphoric acid, ammonium ions and a silicon compound. The silicon compound includes a silicon atom, an atomic group having an amino group combined with the silicon atom, and at least two oxygen atoms combined with the silicon atom. Methods utilizing the etching compositions are also provided.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: January 27, 2015
    Assignees: Samsung Electronics Co., Ltd., Soulbrain Co., Ltd.
    Inventors: Young-Taek Hong, Jinuk Lee, Junghun Lim, Jaewan Park, Chanjin Jeong, Hoon Han, Seonghwan Park, Yanghwa Lee, Sang Won Bae, Daehong Eom, Byoungmoon Yoon, Jihoon Jeong, Kyunghyun Kim, Kyounghwan Kim, ChangSup Mun, Se-Ho Cha, Yongsun Ko
  • Patent number: 8926850
    Abstract: Plasma processing with enhanced charge neutralization and process control is disclosed. In accordance with one exemplary embodiment, the plasma processing may be achieved as a method of plasma processing a substrate. The method may comprise providing the substrate proximate a plasma source; applying to the plasma source a first RF power level during a first period and a second RF power level during a second period, the first and second RF power levels being greater than zero RF power level, wherein the second RF power level is greater than the first RF power level; generating with the plasma source a first plasma during the first period and a second plasma during the second period; and applying to the substrate a first bias voltage during the first period and a second bias voltage during the second period, wherein the first voltage has more negative potential than the second voltage.
    Type: Grant
    Filed: December 7, 2012
    Date of Patent: January 6, 2015
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Vikram Singh, Timothy J. Miller, Bernard G. Lindsay
  • Patent number: 8920666
    Abstract: Disclosed herein is a dry etching method for a work layer formed over a substrate, including the steps of forming a hard mask layer over the work layer formed over the substrate, forming a resist pattern over the hard mask layer, transferring the resist pattern to the hard mask layer by first dry etching conducted using the resist pattern, and patterning the work layer by second dry etching conducted using a hard mask pattern obtained upon the transfer to the hard mask layer, wherein after the hard mask layer is patterned by the first dry etching, the patterning of the work layer by the second dry etching is conducted through changing the concentration of an auxiliary ingredient of a dry etching gas, without changing a main ingredient of the dry etching gas, in an etching apparatus in which the first dry etching has been conducted.
    Type: Grant
    Filed: May 14, 2010
    Date of Patent: December 30, 2014
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Shinichi Igarashi, Yukio Inazuki, Hideo Kaneko, Hiroki Yoshikawa, Yoshinori Kinase
  • Patent number: 8916051
    Abstract: The present invention provides a method of forming via holes. First, a substrate is provided. A plurality of first areas is defined on the substrate. A dielectric layer and a blocking layer are formed on the substrate. A patterned photoresist layer is formed on the blocking layer. The patterned photoresist layer includes a plurality of holes arranged in a regular array wherein the area of the hole array is greater than those of the first areas. The blocking layer in the first areas is removed by using the patterned photoresist layer as a mask. Lastly, the dielectric layer is patterned to form at least a via hole in the dielectric layer in the first area.
    Type: Grant
    Filed: December 23, 2010
    Date of Patent: December 23, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Cheng-Han Wu, Chun-Chi Yu
  • Patent number: 8906248
    Abstract: A method etching features through a stack of a silicon nitride layer over a silicon layer over a silicon oxide layer in a plasma processing chamber is provided. The silicon nitride layer is etched in the plasma processing chamber, comprising; flowing a silicon nitride etch gas; forming the silicon nitride etch gas into a plasma to etch the silicon nitride layer, and stopping the flow of the silicon nitride etch gas. The silicon layer is, comprising flowing a silicon etch gas, wherein the silicon etch gas comprises SF6 or SiF4, forming the silicon etch gas into a, and stopping the flow of the silicon etch gas. The silicon oxide layer is etched in the plasma processing chamber, comprising flowing a silicon oxide etch gas, forming the silicon oxide etch gas into a plasma, and stopping the flow of the silicon oxide etch gas.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: December 9, 2014
    Assignee: Lam Research Corporation
    Inventors: Siyi Li, Robert C. Hefty, Mark Todhunter Robson, James R. Bowers, Audrey Charles
  • Patent number: 8877079
    Abstract: The present invention relates to a method of manufacturing a semiconductor device wherein etching is performed on films on a wafer using a plasma treatment apparatus. In the manufacturing method according to the present invention, a change in the difference between the emission intensities of a first wavelength component and a second wavelength component in plasma is monitored during etching. If the amount of change in the difference per unit time exceeds a predetermined threshold a given number of times in a row, then the flow rate of oxygen introduced to the plasma treatment apparatus is increased or, if the amount of change exceeding the predetermined threshold has not been seen, then the oxygen flow rate is set back to the original value thereof. This series of actions is repeated all the time during a set period of time.
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: November 4, 2014
    Assignee: PS4 Luxco S.a.r.l.
    Inventor: Yasuhiko Ueda
  • Patent number: 8840258
    Abstract: The present invention provides such a formation method that an antireflection structure having excellent antireflection functions can be formed in a large area and at small cost. Further, the present invention also provides an antireflection structure formed by that method. In the formation method, a base layer and particles placed thereon are subjected to an etching process. The particles on the base layer serve as an etching mask in the process, and hence they are more durable against etching than the base layer. The etching rate ratio of the base layer to the particles is more than 1 but not more than 5. The etching process is stopped before the particles disappear. It is also possible to produce an antireflection structure by nanoimprinting method employing a stamper. The stamper is formed by use of a master plate produced according to the above formation method.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: September 23, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tsutomu Nakanishi, Akira Fujimoto, Koji Asakawa, Takeshi Okino, Shinobu Sugimura
  • Patent number: 8834730
    Abstract: In the present invention, a nanoporous membrane having a columnar structure is manufactured through a deposition technology used in a semiconductor process, and the size of a nanopore is adjusted by etching the lower surface of the manufactured nanoporous membrane or using a seed layer and a nanobead layer so that scaling up is available at a lowered process temperature and the size of the nanopore can be easily adjusted when manufacturing the nanoporous membrane having a columnar structure.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: September 16, 2014
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Dae Sik Lee, Jun Bo Yoon, Dong Hoon Choi, Byung Kee Lee, Moon Youn Jung, Seung Hwan Kim
  • Patent number: 8815112
    Abstract: Disclosed is a method for processing a substrate including a first process and a second process. The first process comprises supporting the substrate formed with a titanium-containing film on its front surface and rear surface by a support unit which is rotatably installed; rotating the substrate along with the support unit; and supplying a first processing liquid containing hydrofluoric acid to the rear surface of the substrate thereby processing the rear surface of the substrate with the first processing liquid. The second process comprises supplying a second processing liquid containing ammonia hydrogen peroxide mixture to the rear surface of the substrate after the first process is completed, thereby processing the rear surface of the substrate with the second processing liquid.
    Type: Grant
    Filed: September 1, 2011
    Date of Patent: August 26, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Tsuyoshi Mizuno, Hiromitsu Namba, Yuichiro Morozumi, Shingo Hishiya, Katsushige Harada, Fumiaki Hayase
  • Patent number: 8795541
    Abstract: In a supercritical fluid method a supercritical fluid is supplied into a process chamber. The supercritical fluid is discharged from the process chamber as a supercritical fluid process proceeds. A concentration of a target material included in the supercritical fluid discharged from the process chamber is detected during the supercritical fluid process. An end point of the supercritical fluid process may be determined based on a detected concentration of the target material.
    Type: Grant
    Filed: December 8, 2011
    Date of Patent: August 5, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Jhin Cho, Kun-Tack Lee, Hyo-San Lee, Young-Hoo Kim, Jung-Won Lee, Sang-Won Bae, Jung-Min Oh
  • Patent number: 8795540
    Abstract: A method includes forming a photo resist pattern, and performing a light-exposure on a first portion of the photo resist pattern, wherein a second portion of the photo resist pattern is not exposed to light. A photo-acid reactive material is coated on the first portion and the second portion of the photo resist pattern. The photo-acid reactive material reacts with the photo resist pattern to form a film. Portions of the photo-acid reactive material that do not react with the photo resist pattern are then removed, and the film is left on the photo resist pattern.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: August 5, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Feng Shieh, Ching-Yu Chang
  • Patent number: 8795549
    Abstract: The present invention relates to novel printable etching media having improved properties for use in the process for the production of solar cells. These are corresponding particle-containing compositions by means of which extremely fine lines and structures can be etched very selectively without damaging or attacking adjacent areas.
    Type: Grant
    Filed: October 5, 2007
    Date of Patent: August 5, 2014
    Assignee: Merck Patent GmbH
    Inventors: Werner Stockum, Armin Kuebelbeck
  • Patent number: 8790533
    Abstract: Disclosed is a method of etching semiconductor nanocrystals, which includes dissolving semiconductor nanocrystals in a halogenated solvent containing phosphine so that anisotropic etching of the surface of semiconductor nanocrystals is induced or adding a primary amine to a halogenated solvent containing phosphine and photoexciting semiconductor nanocrystals thus inducing isotropic etching of the surface of the nanocrystals, thereby reproducibly controlling properties of semiconductor nanocrystals including absorption wavelength, emission wavelength, emission intensity, average size, size distribution, shape, and surface state.
    Type: Grant
    Filed: December 28, 2010
    Date of Patent: July 29, 2014
    Assignee: Postech Academy-Industry Foundation
    Inventors: Seung Koo Shin, Won Jung Kim, Sung Jun Lim
  • Patent number: 8778804
    Abstract: A method and apparatus for selective etching a substrate using a focused beam. For example, multiple gases may be used that are involved in competing beam-induced and spontaneous reactions, with the result depending on the materials on the substrate. The gases may include, for example, an etchant gas and an auxiliary gas that inhibits etching.
    Type: Grant
    Filed: January 30, 2009
    Date of Patent: July 15, 2014
    Assignee: FEI Company
    Inventors: Steven Randolph, Clive D. Chandler
  • Patent number: 8772170
    Abstract: A benign all-wet process for stripping photoresist after an implantation process performed to fabricate a device is provided. A method of stripping implanted resist includes a first step of disrupting a crust formed on the surface of the resist during the implantation process and then removing the underlying resist. In accordance with embodiments of the invention, a catalyzed hydrogen peroxide (CHP) chemical system is used to disrupt the crust and allow for low temperature (<180° C.) removal of the underlying resist.
    Type: Grant
    Filed: December 29, 2010
    Date of Patent: July 8, 2014
    Assignee: Arizona Board of Regents on Behalf of the University of Arizona
    Inventors: Srini Raghavan, Rajkumar Govindarajan, Manish Keswani
  • Patent number: 8765615
    Abstract: A quart resonator for use in lower frequency applications (typically lower than the higher end of the UHF spectrum) where relatively thick quartz members, having a thickness greater than ten microns, are called for.
    Type: Grant
    Filed: June 15, 2010
    Date of Patent: July 1, 2014
    Assignee: HRL Laboratories, LLC
    Inventors: David T. Chang, Frederic P. Stratton, Hung Nguyen, Randall L. Kubena
  • Patent number: 8758636
    Abstract: A method for producing a medical functional element having a self-supporting lattice structure which has interconnected webs. The method applies a first layer to the substrate layer, the first layer is structured by an etching process, the structured first layer is under-cut of a wet chemical etching process acting on the substrate layer, the substrate layer is removed in order to form the self-supporting lattice structure, a web constructional layer is applied to the first layer. The method is distinguished by the forming the first web attachment layer which has a smaller layer thickness than the web constructional layer and is intimately bonded to the web constructional layer in such a way that the web attachment layer, together with the web constructional layer, forms the webs of the self-supporting lattice structure.
    Type: Grant
    Filed: May 28, 2010
    Date of Patent: June 24, 2014
    Assignee: ACANDIS GmbH & Co. KG
    Inventors: Eckhard Quandt, Christiane Zamponi, Rodrigo Lima De Miranda