Abstract: A MEMS anti-phase vibratory gyroscope includes two measurement masses with a top cap and a bottom cap each coupled with a respective measurement mass. The measurement masses are oppositely coupled with each other in the vertical direction. Each measurement mass includes an outer frame, an inner frame located within the outer frame, and a mass located within the inner frame. The two measurement masses are coupled with each other through the outer frame. The inner frame is coupled with the outer frame by a plurality of first elastic beams. The mass is coupled with the inner frame by a plurality of second elastic beams. A comb coupling structure is provided along opposite sides of the outer frame and the inner frame. The two masses vibrate toward the opposite direction, and the comb coupling structure measures the angular velocity of rotation.

Abstract: A chip part includes a substrate, a first electrode and a second electrode which are formed apart from each other on the substrate and a circuit network which is formed between the first electrode and the second electrode. The circuit network includes a first passive element including a first conductive member embedded in a first trench formed in the substrate and a second passive element including a second conductive member formed on the substrate outside the first trench.

Abstract: Techniques for minimizing loss of volatile components during thermal processing of kesterite films are provided. In one aspect, a method for annealing a kesterite film is provided. The method includes: placing a cover over the kesterite film; and annealing the cover and the kesterite film such that, for an entire duration of the annealing, the cover is at a temperature T1 and the kesterite film is at a temperature T2, wherein the temperature T1 is greater than or equal to the temperature T2. Optionally, during a cool down segment of the annealing, conditions can be reversed to have the temperature T1 be less than the temperature T2. A solar cell and method for formation thereof using the present annealing techniques are also provided.

Abstract: The present disclosure relates to an array substrate, a manufacturing method thereof, and a display panel. Each of the pixel areas correspondingly connects with a data line and a scanning line. In each of the pixel areas, a source of a first TFT and a gate of a second TFT are on the same layer. A gate of the first TFT, a source and a drain of the second TFT, and the scanning line are on the same layer. As such, the present disclosure may avoid the color shift of the vertical alignment (VA) display and may improve the pixel aperture rate.

Abstract: According to various embodiments, a semiconductor device may include: a contact pad; a metal clip disposed over the contact pad; and a porous metal layer disposed between the metal clip and the contact pad, the porous metal layer connecting the metal clip and the contact pad with each other.

Abstract: The present disclosure may provide a semiconductor device having a stable structure and a low manufacturing degree of the difficulty. The device may include conductive layers and insulating layers which are alternately stacked; a plurality of pillars passing through the conductive layers and the insulating layers; and a plurality of deposition inhibiting patterns, each deposition inhibiting pattern being formed along a portion of an interface between a side-wall of each of the pillars and each of the conductive layers and along a portion of an interface between each of the insulating layers and each of the conductive layers.

Abstract: An electronic component supply body and a method for manufacturing the same, which can suppress generation of wrinkles of an adhesive sheet and is unlikely to cause pickup failure of electronic component chips to occur. The supply body includes an adhesive sheet with an adhesive layer formed with an ultraviolet-curing adhesive, a ring frame bonded onto the adhesive sheet, and electronic component chips bonded onto a first region on the adhesive sheet superimposed with the opening of the ring frame. The second cured portions that are cured by being irradiated with ultraviolet rays are provided in a part of a second region forming a bonded portion between the adhesive sheet and the ring frame. Adhesive strength in the second cured portions in a shearing direction is larger than adhesive strength in a portion of the second region other than the second cured portions.

Abstract: First to fourth switches are provided so that conduction states are able to be controlled independently of each other. The first switch, the third switch, and the second switch are electrically connected in series between a first wiring and a third wiring. The fourth switch has a function of controlling a conduction state between the light-emitting element and a fourth wiring. In a first transistor, a gate is electrically connected to a node to which the third switch and the second switch are electrically connected, one of a source and a drain is electrically connected to a second wiring, and the other is electrically connected to the light-emitting element. A capacitor includes first and second electrodes, the first electrode is electrically connected to a node to which the first switch and the third switch are electrically connected, and the second electrode is electrically connected to the light-emitting element.

Abstract: A method of forming image sensor packages may include performing a molding process. Mold material may be formed either on a transparent substrate in between image sensor dies, or on a removable panel in between transparent substrates attached to image sensor dies. Redistribution layers may be formed before or after the molding process. Mold material may be formed after forming redistribution layers so that the mold material covers the redistribution layers. In these cases, holes may be formed in the mold material to expose solder pads on the redistribution layers. Alternatively, redistribution layers may be formed after the molding process and the redistribution layers may extend over the mold material. Image sensor dies may be attached to a glass or notched glass substrate with dam structures. The methods of forming image sensor packages may result in hermetic image sensor packages that prevent exterior materials from reaching the image sensor.

Abstract: In some embodiments, a flash memory and a fabricating method thereof are provided.

Abstract: Semiconductor devices and methods for making the same includes conformally forming a first spacer on multiple fins. A second spacer is conformally formed on the first spacer, the second spacer being formed from a different material from the first spacer. The fins are etched below a bottom level of the first spacer to form a fin cavity. Material from the first spacer is removed to expand the fin cavity. Fin material is grown directly on the etched fins to fill the fin cavity.

Abstract: According to various embodiments, a method for processing a substrate may include: processing a plurality of device regions in a substrate separated from each other by dicing regions, each device region including at least one electronic component; wherein processing each device region of the plurality of device regions includes: forming a recess into the substrate in the device region, wherein the recess is defined by recess sidewalls of the substrate, wherein the recess sidewalls are arranged in the device region; forming a contact pad in the recess to electrically connect the at least one electronic component, wherein the contact pad has a greater porosity than the recess sidewalls; and singulating the plurality of device regions from each other by dicing the substrate in the dicing region.

Abstract: A method for manufacturing a semiconductor device and a device manufactured using the same are provided. According to a method approach of the embodiment, a substrate having at least a first area with a plurality of polysilicon gates and a second area adjacent to the first area is provided. A contact etch stop layer (CESL) over the polysilicon gates of the first area is formed, and the CESL extends to the second area. Then, a dielectric layer is formed on the CESL, and a nitride layer is formed on the dielectric layer. The nitride layer is patterned to expose the dielectric layer in the first area and to form a pattern of dummy nitrides on the dielectric layer in the second area.

Abstract: The present disclosure may provide a semiconductor device having a stable structure and a low manufacturing degree of the difficulty. The device may include conductive layers and insulating layers which are alternately stacked; a plurality of pillars passing through the conductive layers and the insulating layers; and a plurality of deposition inhibiting patterns, each deposition inhibiting pattern being formed along a portion of an interface between a side-wall of each of the pillars and each of the conductive layers and along a portion of an interface between each of the insulating layers and each of the conductive layers.

Abstract: An embodiment optoelectronic semiconductor device includes a housing having a leadframe with a first and second connection conductor. The housing further has a housing body surrounding the leadframe in one or more regions. The housing body extends in a vertical direction between a mounting side of the housing body and a front side of the housing body opposite the mounting side. The first connection conductor has a recess. A semiconductor chip configured to generate radiation is arranged within the housing, and the semiconductor chip is disposed in the recess and is affixed to the first connection conductor within the recess. A side face of the recess forms a reflector for reflecting the generated radiation. The first connection conductor protrudes from the housing body at the mounting side. The semiconductor chip is, in at least some regions, free of an encapsulation material adjoining the semiconductor chip.

Abstract: Disclosed are methods and systems for providing silicon carbide films. A layer of silicon carbide can be provided under process conditions that employ one or more silicon-containing precursors that have one or more silicon-hydrogen bonds and/or silicon-silicon bonds. The silicon-containing precursors may also have one or more silicon-oxygen bonds and/or silicon-carbon bonds. One or more radical species in a substantially low energy state can react with the silicon-containing precursors to form the silicon carbide film. The one or more radical species can be formed in a remote plasma source.

Abstract: A semiconductor device includes a semiconductor substrate, an analog circuit block including an active element arranged in the semiconductor substrate, a metal layer having a slit or a plurality of metal interconnects arranged in parallel, positioned above the analog circuit block, and a resin layer containing a filler, positioned above at least the metal layer or the plurality of metal interconnects. In the case of forming a semiconductor device by sealing a semiconductor chip with resin having a filler mixed therein, according to this semiconductor device, it is possible to suppress lowering of the level of precision of the electric characteristics of the analog circuit, and a variation in the characteristics or a change in the characteristics, in a mold packaging process, without using special materials or production methods.

Abstract: A method for forming an electronic device such as a passive color OLED display. Bottom electrodes are patterned onto a substrate in rows. Raised posts formed by photoresist are patterned into columns oriented orthogonally to the bottom row electrodes. One or more organic layers, such as R, G, B organic emissive layers are patterned over the raised posts and bottom electrodes using organic vapor jet printing (OVJP). An upper electrode layer is applied over the entire device and forms electrically isolated columnar electrodes due to discontinuities in the upper electrode layer created by the raised columnar posts. This permits patterning of the upper electrodes over the organic layers without using photolithography. A device formed by this method is also described.

Abstract: A method for fabricating an image sensor array having a first group of photodiodes for detecting light at visible wavelengths a second group of photodiodes for detecting light at infrared or near-infrared wavelengths, the method including forming a germanium-silicon layer for the second group of photodiodes on a first semiconductor donor wafer; defining a first interconnect layer on the germanium-silicon layer; defining integrated circuitry for controlling pixels of the image sensor array on a semiconductor carrier wafer; defining a second interconnect layer on the semiconductor carrier wafer; bonding the first interconnect layer with the second interconnect layer; defining the pixels of an image sensor array on a second semiconductor donor wafer; defining a third interconnect layer on the image sensor array; and bonding the third interconnect layer with the germanium-silicon layer.

Abstract: An image sensor array including a carrier substrate; a first group of photodiodes coupled to the carrier substrate, where the first group of photodiodes include a first photodiode, and where the first photodiode includes a semiconductor layer configured to absorb photons at visible wavelengths and to generate photo-carriers from the absorbed photons; and a second group of photodiodes coupled to the carrier substrate, where the second group of photodiodes include a second photodiode, and where the second photodiode includes a germanium-silicon region fabricated on the semiconductor layer, the germanium-silicon region configured to absorb photons at infrared or near-infrared wavelengths and to generate photo-carriers from the absorbed photons.