Abstract: A solder resist comprising a thermosetting resin is printed on a surface of an insulating board (7) having a conductor circuit (6). The solder resist is then heat-cured to form an insulating film (1) having a low thermal expansion coefficient. A laser beam (2) is then applied to the portion of the insulating film in which an opening is to be formed, to burn off the same portion for forming an opening (10), whereby the conductor circuit (6) is exposed. This opening may be formed as a hole for conduction by forming a metal plating film on an inner surface thereof. It is preferable that an external connecting pad be formed so as to cover the opening. The film of coating of a metal is formed by using an electric plating lead, which is preferably cut off by a laser beam after the electric plating has finished.
Abstract: The present invention relates to a double-sided copper-clad laminate for forming a capacitor layer, formed by adhering electrodeposited copper foils on the both sides of a dielectric layer of a thickness of 10 ?m or less, and the object of the present invention is to secure good voltage resistant proprieties. For the double-sided copper-clad laminate of the present invention uses an electrodeposited copper foil provided with a matte side to be joined to the dielectric layer prepared by physically polishing the rough surface of an untreated electrodeposited copper foil obtained by an electrolysis method to a surface roughness (Rz) of 0.5 ?m to 3.0 ?m, and nodular treatment, and as required, passivation, silane coupling agent treatment, or the like are performed thereon. As the manufacturing method thereof, a manufacturing method wherein the surfaces of the resin layers of two electrodeposited copper foils having resin layers facing to each other are adhered, or the like.
Abstract: There is provided a flexible printed wiring board including an insulating layer having a high optical transmittance, a high adhesion strength and a high migration resistance, and suitable for a chip on film (hereafter referred to as COF). In a flexible printed wiring board for COF, having an insulating layer on which a conductive layer of an electrodeposited copper foil is laminated, and an optical transmittance of 50% or more of the insulating layer in the etched region when a circuit is formed by etching said conductive layer, electrodeposited copper foil was made to have a rust-proofing layer of a nickel-zinc alloy on the adhering surface to be adhered to the insulating layer; the surface roughness (Rz) of the adhering surface was made to be 0.05 to 1.5 ?m, and the specular gloss was made to be 250 or more when the incident angle is 60°.
Abstract: The present invention improves the oxidation resistance of an ultrafine metal powder for use in the internal electrode of a multilayer ceramic capacitance and suppresses an increase in the thickness of a metal internal electrode film resulting from the spheroidization of the molten metal under surface tension during the formation of the metal internal electrode film. The ultrafine metal powder has a sulfur-containing compound of not less than one element selected from the group consisting of Y, Zr, and La present on the surface of the particle thereof and is produced by performing an ultrafine metal powder purification step of dispersing the ultrafine metal powder in a slurry, a surface treatment step of adding an aqueous solution containing a sulfate of not less than one element selected from the group consisting of Y, Zr, and La to the slurry to form the compound on the surface of the metal particle, a filtering step, and a drying step.
Abstract: An electro-conductive metal plated polyimide substrate is composed of an aromatic polyimide substrate, a subbing metal layer of Mo—Ni alloy (in which a weight ratio of Mo to Ni is 75/25 to 99/1, and a plated electro-conductive film.
Abstract: The invention provides a method for manufacturing printed wiring substrates which can manufacture printed wiring substrates each having resin dielectric layers of uniform thickness and excellent surface flatness while maintaining favorable cutting performance in a dicing step. A multi-printed wiring-substrate panel is manufactured which includes a metal plate having a first main surface and a second main surface, and resin dielectric layers disposed on the first and second main surfaces. The metal plate has first depression portions and second depression portions. The first depression portions are opened at the first main surface and arranged discontinuously along predetermined cutting lines. The second depression portions are opened at the second main surface and arranged discontinuously along the predetermined cutting lines. The multi-printed wiring-substrate panel is cut along the predetermined cutting lines into a plurality of printed wiring substrates.
Abstract: Wiring circuit boards with bumps can be manufactured such that stable bump connections are possible and plating pre-treatments or other difficult operations are rendered unnecessary. By utilizing a technique whereby a bump-formation etching mask 7 is formed on a bump-forming surface 3a of a metal foil 3 which has a thickness that is the sum of the thickness t1 of the wiring circuit 1 and the height t2 of the bumps 2 which are to be formed on the wiring circuit 1 (t1+t2), and then the bumps 2 are formed by half-etching the metal foil 3 to a depth corresponding to the desired bump height t2 from the bump-formation etching mask 7 side, wiring circuit boards with bumps can be manufactured such that stable bump connections are possible and plating pre-treatments or other complex processes are rendered unnecessary.
Abstract: A wire-bonding substrate is described. The wire-bonding substrate includes a copper metallization and a gold surface finish disposed above and on the copper metallization. The gold surface finish completes a structure that includes at least one of a bond finger for wire bonding of a first side of the substrate, and a land pad for a ball attach on a second side of the substrate. A process of forming the surface finish is also disclosed. An electronic package is also disclosed that uses the surface finish on the wire-bonding substrate. A method of assembling an electronic package is also disclosed that includes the surface finish on the wire-bonding substrate. A computing system is also described that includes the surface finish on the wire-bonding substrate.
Type:
Grant
Filed:
June 27, 2003
Date of Patent:
December 6, 2005
Assignee:
Intel Corporation
Inventors:
Brian Taggert, Dale Hackitt, Dilip K. Misra
Abstract: A film structure for absorbing electromagnetic wave and manufacturing method thereof is provided. The multilayer film structure is composed of a plurality of polymer films and a plurality of permeability films. The polymer films have a multi-film stacking structure and the polymer films are composed of a carbon group compound structure. The permeability films are formed on each surface of the polymer films. Thus, every neighboring permeability films will have magnetic moments in opposite direction, and all the emitted electromagnetic waves will be cancelled by the permeability films, or be reflected in any one of the polymer films until the energies of the electromagnetic waves are consumed, or be absorbed by the carbon group compound structure and be transferred into thermal energy.
Abstract: The invention provides a surface-treated copper foil which can sufficiently ensure adhesive strength with a low-dielectric substrate used in forming a printed wiring board for high-frequency applications and can minimize transmission losses. There is provided a surface-treated copper foil for a low-dielectric substrate which is used in bonded relationship to a low-dielectric substrate, which is characterized in that a nodular-treated layer constituted by bump-like copper particles is formed on a surface of the copper foil and that ultrafine copper particles are caused to precipitate on the whole surface of the nodular-treated layer and adhere thereto and the roughness value Rz of the surface is 1.0 to 6.5 ?m. The surface color of the surface-treated copper foil has L* of not more than 50, a* of not more than 20 and b* of not more than 15.
Abstract: A method of forming a member for joining to form a composite wiring board. The member includes a dielectric substrate. Adhesive tape is applied to at least one face of said substrate. At least one opening is formed through the substrate extending from one face to the other and through each adhesive tape. An electrically conductive material is dispensed in each of the openings and partially cured. The adhesive tape is removed to allow a nub of the conductive material to extend above the substrate face to form a wiring structure with other elements.
Type:
Grant
Filed:
August 13, 2003
Date of Patent:
November 29, 2005
Assignee:
International Business Machines Corporation
Inventors:
Brian E. Curcio, Donald S. Farquhar, Lisa J. Jimarez, Keith P. Brodock
Abstract: A solder joint or seal attaching components having dissimilar coefficients of thermal expansion is made thin (e.g., less than 20 ?m and preferably about 5 ?m) and of a solder such as an indium-based solder that has a tendency to creep. The solder is toroidal or otherwise shaped to avoid tensile stress in the solder. Axial shearing stress in the solder causes reversible creep without causing failure of the joint or seal. In one embodiment, a toroidal solder seal has a diameter, a footprint, and a thickness in approximate proportions of 5000:200:1.
Type:
Grant
Filed:
April 17, 2002
Date of Patent:
October 25, 2005
Assignee:
Agilent Technologies, Inc.
Inventors:
Giles Humpston, Yoshikatsu Ichimura, Nancy M. Mar, Daniel J. Miller, Michael J. Nystrom, Heidi L. Reynolds, Gary R. Trott
Abstract: This invention provides a multi-layer circuit board excellent in flame resistance, insulating property and adhesion and not generating detrimental substances when burnt, and a curable composition suitable for obtaining the multi-layer circuit board. The curable composition contains an insulating resin such as an alicyclic olefin polymer or an aromatic polyether polymer, a nitrogen-type curing agent such as 1,3-diallyl-5-glycidyl isocyanurate and a phosphorus-type flame retardant such as phosphoric acid ester amide, and is molded into a film by a solution casting method. The film so formed is laminated on an internal layer board and is cured to give the multi-layer circuit substrate.
Abstract: A method for producing small pitch z-axis electrical interconnections in layers of dielectric materials which are applied to printed wiring boards and diverse electronic packages. A method for parallel fabrication of intermediate structures which are subsequently jointed to form a final structure. In addition there is provided a z-interconnected electrical structure, employing dielectric materials such as resin coated copper, employable in the manufacture of diverse type of electronic packages, including printed wiring boards (PWBs), substrates, multi-chip modules and the like.
Type:
Grant
Filed:
May 26, 2004
Date of Patent:
October 18, 2005
Assignee:
International Business Machines Corporation
Inventors:
Brian E. Curcio, Frank D. Egitto, Robert M. Japp, Thomas R. Miller, Manh-Quan T. Nguyen, Douglas O. Powell
Abstract: A ceramic layered product 10 includes a plurality of ceramic layers 12 including a metallic element and a plurality of metal layers 14a, 14b, each of which is arranged between the ceramic layers 12. The metallic layers 14a, 14b include at least one element selected from the group consisting of Ni, Cu, Ag, and Pd in a total content of not less than 50 atm % as a main component, and at least one element selected from the metallic elements of the ceramic layers 12 in a content of not less than 1 atm % and less than 50 atm % as an additive component. This ceramic layered product can be less susceptible to fracture in the metal layers caused by firing.
Type:
Grant
Filed:
September 16, 2003
Date of Patent:
October 11, 2005
Assignee:
Matsushita Electric Industrial Co., Ltd.
Abstract: A wiring transfer sheet including a carrier base and a wiring layer formed thereon is produced so that an exposed area of a surface of the carrier base on which the wiring layer is formed has a plurality of concavities. By transferring the wiring layer to an electrically insulating substrate with this wiring transfer sheet, convexities which are complementary to the concavities are formed on the electrically insulating substrate. The convexities improve adhesion between a wiring board and a resin stacked thereon. Therefore, the wiring board thus obtained has surface coplanarity suitable for mounting a semiconductor bare chip and an electronic component as a whole, and a microscopical surface structure which adheres to a material stacked thereon.
Type:
Grant
Filed:
April 23, 2003
Date of Patent:
September 20, 2005
Assignee:
Matsushita Electric Industrial Co., Ltd.
Abstract: To produce a green composite laminate 11, a green multilayer collective substrate 13 containing low-temperature sinterable glass ceramic powder as a main ingredient is disposed between first and second shrinkage-restraining layers 14a and 14b containing alumina powder as a main ingredient. Grooves 16 are formed on one main surface 11a of the green composite laminate 11 such as to pass through the first shrinkage-restraining layer 14a and the green multilayer collective substrate 13 and reach the second shrinkage-restraining layer 14b, but not to reach the other main surface 11b of the green composite laminate 11. The green composite laminate 11 provided with the grooves 16 is sintered under conditions where the low-temperature sinterable glass ceramic powder is sintered and the green first and second shrinkage-restraining layers 14a and 14b are removed to prepare a plurality of ceramic multilayer substrates.
Abstract: A copper foil having a high etching factor, enabling formation of fine patterns excellent in linearity of bottom lines of circuit patterns and without leaving particles of copper foil forming the circuit patterns in the resin, free from a drop in bond strength between the copper foil and resin substrate due to the processing for formation of solder balls, excellent in visibility, and excellent in mounting of ICs on fine patterns, comprising a copper foil on at least one surface of which is provided an alloy fine roughening particle layer comprised of a copper-cobalt-nickel alloy with contents of cobalt and nickel equal to or greater than that of copper, specifically a copper foil on the surface of the copper foil for bonding with the resin substrate of which is provided an alloy fine roughening particle layer comprised of 5 to 12 mg/dm2 copper, 6 to 13 mg/dm2 cobalt, and 5 to 12 mg/dm2 nickel, wherein the alloy fine roughening particle layer provided on the copper foil surface may be treated for stainproof or
Abstract: There is provided a metal/ceramic circuit board capable of eliminating discrepancy during mounting of parts to improve the reliability of mounting of the parts. The metal/ceramic circuit board has a ceramic substrate 10, and a metal circuit plate (a copper plate 14) bonded to the ceramic substrate 10, the metal circuit plate having a thickness which is more than 0.25 mm and which is less than 0.3 mm, and the metal circuit plate having a skirt spreading length (a dimensional difference between the bottom and top portion of the peripheral edge portion of the metal circuit plate) of less than 50 ?m.
Abstract: A transfer sheet for use in forming a conductor circuit comprises a base and a metal layer formed into a circuit pattern on the base. The metal layer is transferred onto a surface of an insulation layer. At least part of the circuit pattern of the metal layer is formed by laser-processing. Since it is possible, without using an etching process and a plating process at a minute part of the conductor circuit, to remove the metal layer by emitting laser light having a minute beam diameter, it is possible to form a minute conductor circuit which is 50 ?m or less in width and pitch, with the result that it is prevented that the conductor circuit has a break because of excessive etching and a failure of plating deposition or the conductor circuit is short-circuited because of the residue of etching and a short of plating.