Patents Examined by Derris H. Banks
-
Patent number: 7906364Abstract: A method for connecting substrates having electrical conductive elements thereon, comprising: providing at least one spacer between the substrates; applying a conductive material to at least one of the electrical conductive elements; aligning the electrical conductive elements; and, connecting the substrates by urging them together, wherein the at least one spacer prevents lateral spreading of the conductive material on the substrates from bridging a distance between adjacent conductive elements during the connecting.Type: GrantFiled: November 29, 2005Date of Patent: March 15, 2011Assignee: N-trig Ltd.Inventors: Moshe Kriman, Merav Yaakoby
-
Patent number: 7895750Abstract: A method of manufacturing an inkjet print head that includes an improved process of forming an ink feed hole, thereby enabling an increase in productivity and a favorable ink supply via the ink feed hole. The method includes preparing a substrate on which a heater to heat an ink is formed on the front side thereof, forming a flow passage formation layer on the front side of the substrate such that the flow passage formation layer defines an ink flow passage, forming a nozzle layer provided with a nozzle on the flow passage formation layer, forming a first protective layer such that the first protective layer covers the flow passage formation layer and the nozzle layer, applying a mask material used to etch the substrate to the rear side of the substrate, applying a second protective layer to the lateral side of the substrate to protect the lateral side of the substrate, and forming an ink feed hole on the substrate by wet etching. Tantalum (Ta) is used as the mask material.Type: GrantFiled: October 19, 2007Date of Patent: March 1, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Byung Ha Park, Sung Joon Park, Young Ung Ha, Kyong Il Kim
-
Patent number: 7895741Abstract: A method of producing a wired circuit board includes preparing a metal supporting board, forming a metal foil on the metal supporting board, forming an insulating layer on the metal foil to expose an unneeded portion of the metal foil, etching the unneeded portion using the insulating layer as an etching resist, and forming a plurality of wires on the insulating layer.Type: GrantFiled: July 24, 2008Date of Patent: March 1, 2011Assignee: Nitto Denko CorporationInventor: Katsutoshi Kamei
-
Patent number: 7891093Abstract: An inkjet head includes a channel unit and actuator units. Inside the channel unit, individual ink channels are formed so that ink supplied from ink inlets is ejected from nozzles via pressure chambers. The actuator units are bonded to the upper surface of the channel unit. The actuator units have a configuration of four piezoelectric sheets laminated to one another. On the upper surface of the piezoelectric sheet, individual electrodes are disposed in positions opposed to the pressure chambers respectively. A FPC for supplying driving signals to the actuator units is connected to the individual electrodes.Type: GrantFiled: January 30, 2009Date of Patent: February 22, 2011Assignee: Brother Kogyo Kabushiki KaishaInventor: Manabu Hibi
-
Patent number: 7891088Abstract: Embodiments provide a method of running cables from an already-installed cable duct to devices. According to the method, a portion of a duct from which it is desirable for cable to be dropped is selected upon consideration of a first location of a first device to which a connection is desired. The method also includes punching a first aperture in the duct proximate the first portion, snaking a first cable from the duct through the first aperture, and connecting the first cable to the first device.Type: GrantFiled: May 1, 2008Date of Patent: February 22, 2011Assignee: Sprint Communications Company L.P.Inventors: Doug Robinett, Todd Daugherty
-
Patent number: 7891089Abstract: A printed circuit board according to the present invention is a printed circuit board (4) including a component mounting pin (1) made of a metal wire to connect with a semiconductor chip (10). The semiconductor chip (10) is a surface mounting type semiconductor chip having an electrode pad on its mounting surface for use in a flip-chip mounting system. The component mounting pin (1) is formed by using wire-bonding technology. This printed circuit board (4) is able to decrease malconnections or disconnection caused by a difference between the coefficients of thermal expansion of the semiconductor chip (10) and the printed circuit board (4).Type: GrantFiled: October 20, 2008Date of Patent: February 22, 2011Assignee: Ibiden Co., Ltd.Inventors: Takashi Kariya, Toshiki Furutani, Takeshi Kawanishi
-
Patent number: 7886437Abstract: A method of forming an isolated electrically conductive contact through a metal substrate by creating at least one via through the substrate. The at least one sidewall of the via is cleaned and coated with a non-conductive layer. In one example, the non-conductive layer is formed by anodizing the sidewall(s) of the via. In another example, the non-conductive layer may be formed by thin film deposition of a dielectric on the sidewall(s). An electrically conductive filler is then placed into the via. In the examples disclosed, the filler may be a conductive ink or a conductive epoxy.Type: GrantFiled: May 25, 2007Date of Patent: February 15, 2011Assignee: Electro Scientific Industries, Inc.Inventors: Michael Nashner, Jeff Howerton
-
Patent number: 7886429Abstract: A method is provided for producing a measuring transducer in order to transform at least one physical variable into at least one electric variable. A plurality of planar, insulating and conductive layers are respectively structured according to predefineable models which are adapted to each other and which are assembled in order to form a multi-layered arrangement.Type: GrantFiled: December 8, 2004Date of Patent: February 15, 2011Assignees: ABB AG, Stanford UniversityInventors: Peter Krippner, Fritz B. Prinz, Sangkyun Kang, Tibor Fabian
-
Patent number: 7886421Abstract: A method for manufacturing an integrated circuit device having antenna conductors is provided. The method includes the steps of providing a wafer with a plurality of integrated circuit components; forming a first antenna conductor on the surface of each integrated circuit component; forming a plurality of metal bumps above the first antenna conductor; coating an insulating layer to encapsulate the plurality of integrated circuit components and to cover the plurality of metal bumps; removing a portion of the insulating layer to expose a top portion of each metal bump; and forming a second antenna conductor on the insulating layer by screen printing.Type: GrantFiled: March 2, 2010Date of Patent: February 15, 2011Assignee: Mutual-Pak Technology Co., LtdInventors: Lu-Chen Hwan, P. C. Chen, Yu-Lin Ma
-
Patent number: 7886432Abstract: A method for connecting a first terminal array 6 provided in a connection portion 5 of a first electric component and a second terminal array 8 provided in a connection portion 7 of a second electric component to each other in such a manner that electric continuity is established between them has two steps, that is, a step of tentatively fixing the two connection portions 5 and 7 with each other whose terminal arrays 6 and 8 are positioned with respect to each other by soldering them with solder particles 3 using a paste-like anisotropic conductive adhesive 1 in which the solder particles 3 and conductive particles 4 are dispersed in a thermosetting resin 2, and a step of finally fixing the two connection portions 5 and 7 with each other with the thermosetting resin 2 that has been set thermally. This prevents positional deviation from occurring between the two terminal arrays 6 and 8 during a transport from a tentative fixing apparatus to a final fixing apparatus.Type: GrantFiled: September 13, 2007Date of Patent: February 15, 2011Assignee: Panasonic CorporationInventors: Tadahiko Sakai, Hideki Eifuku
-
Patent number: 7886431Abstract: A power distribution system for integrated circuits includes methods to damp resonance between a bypass capacitor network and a power/ground cavity of the printed circuit board that (a) does not require excessive quantities of bypass/damping components or (b) does not require high plane cavity capacitance or in the alternative can insure a Q of less than 1.4 at the transition from the bypass network to the plane cavity impedance cross-over.Type: GrantFiled: June 1, 2007Date of Patent: February 15, 2011Assignee: Teraspeed Consulting Group LLCInventors: Steve Weir, Scott McMorrow
-
Patent number: 7886434Abstract: A method for fabricating a signal controller, e.g., a filter or a switch, for a coplanar waveguide during the LIGA fabrication process of the waveguide. Both patterns for the waveguide and patterns for the signal controllers are created on a mask. Radiation travels through the mask and reaches a photoresist layer on a substrate. The irradiated portions are removed and channels are formed on the substrate. A metal is filled into the channels to form the conductors of the waveguide and the signal controllers. Micromachined quasi-lumped elements are used alone or together as filters. The switch includes a comb drive, a spring, a metal plunger, and anchors.Type: GrantFiled: June 11, 2008Date of Patent: February 15, 2011Assignee: Sandia CorporationInventor: Michael A. Forman
-
Patent number: 7886423Abstract: A method for forming micro-texture on ABS of a slider, includes steps of: positioning sliders arranged in arrays on a tray, each slider having a pole tip facing upward; loading the tray into a processing chamber, and evacuating the processing chamber to a preset pressure; introducing a mixture gas of inert gas and hydrocarbon gas into the processing chamber, and ionizing the mixture gas to produce ion beams; exposing the sliders to the ion beam for etching so as to form micro-texture with two-step structure on the ABS of the slider. The invention also discloses a method of manufacturing a slider having micro-texture.Type: GrantFiled: March 23, 2007Date of Patent: February 15, 2011Assignee: Sae Magnetics (H.K.) Ltd.Inventors: HongXin Fang, HongTao Ma, Yu Ding, Heng Qiao, BaoHua Chen
-
Patent number: 7882628Abstract: The formation of electronic assemblies is described. One embodiment includes providing a body and forming a first metal pad layer on a first surface thereof. A second metal pad layer is formed in contact with the first metal pad layer, the second metal pad layer having a denser pitch than the first metal pad layer. A dielectric layer is formed between the metal pads in the first and second metal pad layers. Vias extending through the body from a second surface thereof are formed, the vias exposing the first metal pad layer. An insulating layer is formed on via sidewalls and on the second surface, and an electrically conductive layer formed on the insulating layer and on the exposed surface of the first metal layer. Elements are coupled to the second metal pad layer and the electrically conductive layer coupled to a substrate. Other embodiments are described and claimed.Type: GrantFiled: May 30, 2007Date of Patent: February 8, 2011Assignee: Intel CorporationInventors: Sriram Muthukumar, Raul Mancera, Yoshihiro Tomita, Chi-won Hwang
-
Patent number: 7882613Abstract: A method of applying at least one magnet to a surface of a component made of a magnetic material includes placing the at least one magnet in a holding apparatus, and positioning the holding apparatus in the immediate vicinity of the component. A holding element applies a holding force to the at least one magnet to hold it in the holding apparatus. The holding element is deactivated such that the holding force is reduced, and the at least one magnet is transferred to the surface of the component. A holding apparatus for applying at least one magnet to a surface of a component made of a magnetic material includes a surface region for supporting the at least one magnet and at least one deactivatable holding element for applying a force on the at least one magnet.Type: GrantFiled: February 26, 2007Date of Patent: February 8, 2011Assignee: ThyssenKrupp Aufzugswerke GmbHInventors: Frank Barthelmie, Jochen Schulze, Nis-Anton Möllgaard, Uwe Resag
-
Patent number: 7882627Abstract: First, a unilayer wiring board is fabricated, which has wiring layers formed in desired shapes on both sides of an insulating base member; and a metal bump formed on the wiring layer on one side of the insulating base member. Then, a desired number of unilayer boards are prepared and stacked up. On that case, the board disposed in the uppermost layer is prepared without having a metal bump. The boards are positioned and stacked up in such a manner that a metal bump of one of adjacent boards is connected to a corresponding wiring layer of the other board. Thereafter, resin is filled into gaps between the stacked boards, and insulating layers are formed on both sides of a multilayer board obtained through the above steps, in such a manner as to cover the entire surface except pad areas defined at predetermined positions on the wiring layers.Type: GrantFiled: January 4, 2008Date of Patent: February 8, 2011Assignee: Shinko Electric Industries Co., Ltd.Inventors: Tetsuya Koyama, Tsuyoshi Kobayashi, Hiroyuki Kato, Yoshihiro Machida
-
Patent number: 7882614Abstract: A method for providing a power inductor comprises forming a first magnetic core material having first and second ends and an inner cavity that extends from the first end to the second end; forming a first notch in the first magnetic core material that projects inwardly towards the inner cavity from one of the first and second ends; and passing a first conductor through the inner cavity that is received by the first notch.Type: GrantFiled: March 3, 2006Date of Patent: February 8, 2011Assignee: Marvell World Trade Ltd.Inventor: Sehat Sutardja
-
Patent number: 7882635Abstract: A method for producing an ink-jet head includes forming a buffer layer on an upper surface of a vibration plate, and forming a piezoelectric precursor layer on an entire upper surface of a surface layer, the piezoelectric precursor layer being converted into a piezoelectric sheet. The buffer layer is formed of a material with which mutual diffusion between the piezoelectric precursor layer and the buffer layer is hardly caused as compared with mutual diffusion between the piezoelectric precursor layer and the vibration plate with which no buffer layer is provided. A stack, in which the buffer layer and the piezoelectric precursor layer are formed, is heated at a predetermined temperature, and the piezoelectric precursor layer is calcinated to form the piezoelectric sheet. It is possible to suppress the deterioration of the performance of the piezoelectric member.Type: GrantFiled: September 25, 2008Date of Patent: February 8, 2011Assignee: Brother Kogyo Kabushiki KaishaInventors: Hiroaki Wakayama, Kazuo Kobayashi
-
Patent number: 7882629Abstract: A dead end electrical connector assembly including a dead end connector member, a collet, wedges and an outer sleeve. The dead end connector member has a first end section and a second end section. The second end section includes a threaded section. The first end section is adapted to be connected to another member and includes a general bolt head section adapted to be turned by a powered tool to axially rotate the dead end connector member. The front end of the collet includes a threaded section adapted to be threaded onto the threaded section of the dead end connector member. The wedges are inserted directly between the collet and a core member of a cable conductor. The second end section of the dead end connector member is adapted to push the wedges into the collet.Type: GrantFiled: March 3, 2008Date of Patent: February 8, 2011Assignee: Hubbell IncorporatedInventor: Christopher G. Chadbourne
-
Patent number: 7877871Abstract: An image forming apparatus comprises an exposure unit forming an electrostatic latent image on a photo conductor based on image information, a developing unit developing the electrostatic latent image by toner made of formation material of a circuitry layer, and an electrostatic transferring unit transferring a toner image on the photo conductor onto a substrate. The toner image is transferred so as to cover at least a part of a conductor layer formed on the substrate. At this time, excessive charges caused in the conductor layer accompanying the start of the transfer of the toner image are removed. Alternatively, charges of which polarity is reverse to that of the toner are added to the conductor layer. These allow the circuitry layer to be formed to have a desired pattern favorably and securely on the conductor layer.Type: GrantFiled: August 27, 2008Date of Patent: February 1, 2011Assignees: Kabushiki Kaisha Toshiba, Toshiba TEC CorporationInventors: Hideo Aoki, Naoko Yamaguchi, Chiaki Takubo, Toshiaki Yamauchi, Koji Imamiya, Hiroshi Hashizume