Abstract: In one embodiment, a computer boot method allows choosing a predetermined data block alignment for a cache that has multiple cross processor interactions. A cache RAM column of a cache as RAM system is loaded with a tag to prevent unintended cache line evictions, and boot code is executed, with the preloaded cache RAM appearing to the executing boot code stream as a memory store.

Abstract: A system and method for providing online data backup for a computer system. In which the computer system includes an intermediate block data container. The computer system may utilize the intermediate block data container to manage data block release during the online data backup process. When the data storage driver receives a request to write a block into a data area that has already been copied by the backup procedure, then the required write is performed without limitations. If the incoming write request is directed to an area not yet backed-up, then the write process is suspended and the current state of the given data area is copied to the intermediate data storage container. When the copy procedure is completed, the system will allow the write procedure to be executed. Thus, the content of the data block at the moment the backup procedure commenced is stored in the intermediate block container. The content will be copied from the intermediate block data container by the backup procedure when required.

Abstract: A data storage system wherein a data controlling director examines the contents of the tag to determine whether requested read data exists in a local cache memory having this data controlling director or in some other local memory cache, or in a disk drive coupled to this data controlling director; and if the requested read data does exist in the local cache memory having this data controlling director, or in the disk drive coupled to director; the data controlling director sends a copy to the local cache memory of the read request receiving director; updates its tag to show a shared copy will reside in the requesting director's local cache memory; and also sends a message to the read requesting director indicating the data is available for storage in the local cache memory on said one of the plurality of first director/memory boards having the read request receiving director.

Abstract: A cache storage device is provided between a client and a storage device so that an area to be accessed by the client can be locked or excluded in advance.

Abstract: An application specific device for erasing data from a long-term storage device includes a power supply, a control circuit, and an interface to the storage device. The control circuit controls the long-term storage device to irretrievably remove data from the storage device. The storage device may be, for example, a hard disk drive or compact flash memory. The application specific device is physically small, is operating system independent, and has simple interface that is useable by non-computer professionals.

Abstract: A computer system includes a processor which may initialize a secure execution mode by executing a security initialization instruction. Further, the processor may operate in the secure execution mode by executing a secure operating system code segment. The computer system also includes a system memory configured to store data in a plurality of locations. The computer system also includes a memory controller which may selectively clear the data from a programmed range of the memory locations of the system memory when enabled in response to a reset of the processor.

Abstract: In one embodiment, a data processing system (10) includes a first master, storage circuitry (35) coupled to the first master (12) for use by the first master (12), a first control storage circuit (38) which stores a first prefetch limit (60), a prefetch buffer (42), and prefetch circuitry (40) coupled to the first control storage circuit, to the prefetch buffer, and to the storage circuitry. In one embodiment, the prefetch circuitry (40) selectively prefetches a predetermined number of lines from the storage circuitry into the prefetch buffer (42) based on whether or not a prefetch counter, initially set to a value indicated by the first prefetch limit, has expired. In one embodiment, the first prefetch limit may therefore be used to control how many prefetches occur between misses in the prefetch buffer.

Abstract: A value is hashed and then a lookup operation is performed in a content addressable memory based on the hashed value to generate a content addressable memory result, which is used in performing an operation. In one implementation, the content addressable memory result includes an address, and the operation performed includes retrieving a record from memory, comparing a key value stored in the record to the first value to identify the correct record, and then updating a statistics value in the record. In one embodiment, an original value is masked to generate the value which is hashed. In one implementation, the value corresponds to a masked or original flow identification value associated with a flow of packets.

Abstract: A file level striping method adds an option for indicating whether or not to support file level striping to a file creation interface in a file system, extends an inode structure to include a last disk ID field, initializes the last disk ID when the file is created in the file system, allocates a physical block based on the last disk ID when the physical block allocation is requested at the time of file I/O request in the file system, and modifies the last disk ID value to reflect the physical block allocation made by a volume manager. An apparatus using the file level striping method includes a number of disks for storing information actually, the volume manager for logically grouping a number of disks and a file system for creating files on said logical volume and performing I/O operations.

Abstract: The management of transactions received by a coherency controller is disclosed. A method of an embodiment of the invention is performed by a coherency controller of a plurality of coherency controllers of a node that has a plurality of sub-nodes. The coherency controller receives a transaction from one of the sub-nodes of the node. The transaction may relate to another sub-node of the node. However, the coherency controller nevertheless processes the transaction without having to send the transaction to another coherency controller of the node, even though the sub-node from which the transaction was received is different than the sub-node to which the transaction relates. The plurality of coherency controllers is thus shared by all of the plurality of sub-nodes of the node.

Abstract: A method, system, and apparatus for controlling the behavior of an application through a device or device subtype in a logical volume manager. The present invention allows for creating device types or subtypes to be used when creating a logical volume. The device type or device subtype specified during the creation of the logical volume signals to an application that the application may perform a particular behavior. The use of alternate device types and subtypes when creating a logical volume inform an application that the application can behave in a new way defined by the device type and subtype.

Abstract: Disclosed is a method and system for performing periodic replication using a log and a change map. According to one embodiment, a first region and a second region of a primary data volume are identified and a plurality of write operations to the primary data volume are tracked by tracking write operations to the first region utilizing a storage replication log and tracking write operations to the second region utilizing a storage replication change map. Thereafter, data associated with the plurality of write operations is replicated from the primary data volume to a secondary data volume utilizing at least one of the storage replication log and the storage replication change map.

Abstract: There is provided a storage management system capable of utilizing division management with enhanced flexibility and of enhancing security of the entire system, by providing functions by program products in each division unit of a storage subsystem. The storage management system has a program-product management table stored in a shared memory in the storage subsystem and showing presence or absence of the program products, which provide management functions of respective resources to respective SLPRs. At the time of executing the management functions by the program products in the SLPRs of users in accordance with instructions from the users, the storage management system is referred to and execution of the management function having no program product is restricted.

Abstract: A data processing device is disclosed. The device is provided with a plurality of data processing units; a first memory shared for storing data, to which each of the data processing units makes an access so as to perform an operation; a transfer completion time designation unit for designating a transfer completion time according to need, within which transferring the data in response to the accesses made by the data processing units should be completed; an expected transfer completion time calculation unit for calculating an expected transfer completion time needed for completing the data transfer in response to the accesses made by the data processing units, taking current access status of the first memory into consideration; and an access management unit for managing the access to the first memory based on the transfer completion time and the expected transfer completion time.

Abstract: The present invention provides a storage system and a method of controlling the storage system, in which a second site rapidly resumes system process when a first site is damaged. The storage system comprises a first site including a first storage device, a second site including a second storage device, and a third site including a third storage device, and the method of controlling the storage system comprises a step of making a logical volume of the second storage device consistent with a logical volume of the first storage device by remotely copying only the differential data between the logical volume of the first storage device and the logical volume of the second storage device from a logical volume of the third storage device to the logical volume of the second storage device when the first site is damaged.

Abstract: A memory device has a scratch control array of non-volatile memory cells that is separate from the primary array of memory cells. The scratch control array stores an instruction sequence for execution by the memory device's controller circuit. The sequence can include instructions for testing of the memory device. The execution of the instruction sequence is initiated and the control circuit fetches each instruction from the scratch control array for execution. The results are then reported and/or stored in the scratch control array.

Abstract: A method of updating a cache in an integrated circuit comprising: the cache; a processor connected to the cache via a cache bus; a memory interface connected to the cache via a first bus and to the processor via a second bus, the first bus being wider than the second bus or the cache bus; and memory connected to the memory interface via a memory bus; the method comprising the steps of: (a) following a cache miss, using the processor to issue a request for first data via a first address, the first data being that associated with the cache miss; (b) in response to the request, using the memory interface to fetch the first data from the memory, and sending the first data to the processor; (c) sending, from the memory interface and via the first bus, the first data and additional data, the additional data being that stored in the memory adjacent the first data; (d) updating the cache with the first data and the additional data via the first bus; and (e) updating flags in the cache associated with the first data a

Abstract: A hybrid centralized and distributed processing system includes a switching device that connects a storage processor to one or more servers through a host channel processor. The switching device also connects the storage processor to one or more storage devices such as disk drive arrays, and to a metadata cache and a block data cache memory. The storage processor processes access request from one or more servers in the form of a logical volume or logical block address and accesses the metadata cache to determine the physical data address. The storage processor monitors the performance of the storage system and performs automatic tuning by reallocating the logical volume, load balancing, hot spot removal, and dynamic expansion of storage volume. The storage processor also provides fault-tolerant access and provides parallel high performance data paths for fail over.

Abstract: A memory module includes a memory hub that couples signals to memory devices mounted on opposite first and second surfaces of a memory module substrate. The memory devices are mounted in mirrored configuration with mirrored terminals of memory devices on opposite surfaces being interconnected. A memory hub mounted on each module alters the configuration of address and/or command signals coupled to the memory devices depending upon whether the memory devices on the first surface of the substrate or the memory devices on the second surface of the substrate are being accessed. Alternatively, the configuration of the address and/or command signals coupled to mirrored memory devices may be altered by a register mounted on the substrate that is coupled to the memory devices or by a memory controller coupled directly to memory devices on one or more memory modules.

Abstract: A backup system and method enables a user to configure the backup, data mirroring and/or a data copying process on a fine granularity level by configuring buffer memories of backup media agents and/or restore media agents which are coupled in one or more daisy-chain configurations.