Patents Examined by Duc T Doan
  • Patent number: 7360020
    Abstract: A cache memory with improved cache-miss performance is implemented by providing cache-miss data from system memory directly to its requester. One embodiment of the invention operates as a texture cache in a graphics system. The graphics system comprises a system memory that stores texture data, coupled to a texture cache memory, which is coupled to at least one requester. The texture cache memory is divided into a cache tags unit and a data cache unit. The data cache unit is configured to receive at least two cache address inputs, and has at least two data output ports each coupled to a respective first input of a respective multiplexer. A respective second input of each multiplexer is configured to receive cache-miss data from the system memory. The select input of each multiplexer is configured to receive a respective hit/miss indicator signal associated with the respective cache address input. In case of a cache-miss, cache-miss data from system memory bypasses the data cache unit and is output directly.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: April 15, 2008
    Assignee: Sun Microsystems, Inc.
    Inventor: Brian D. Emberling
  • Patent number: 7360045
    Abstract: Provided is a Method and Computer Apparatus being capable of safely and reliably making a backup copy of data stored on the Hard Disk Drive (HDD). A user places a PC in a hibernation state by inputting a particular key operation under a typical OS environment. The working state data is stored on the HDD just before the backup copy of data is created. During the process of backup, an OS in a hidden partition of the HDD is booted so as to execute a program for making a dead copy of the HDD. When the dead copy processing by the copy program from the HDD to the backup HDD is completed, the PC system's operation is resumed and an OS is booted so as to recover from the hibernation state to the original state.
    Type: Grant
    Filed: April 1, 2003
    Date of Patent: April 15, 2008
    Assignee: Lenovo Singapore Pte. Ltd.
    Inventor: Yasunori Maezawa
  • Patent number: 7337281
    Abstract: A channel adapter connected to a host has a local cache memory. The channel adapter duplexes and writes the write-data in the local cache memory in response to a data-write request from the host. Then, the channel adapter sends the write-completion to the host and transfers all of the write-data within the local cache memory to the main cache memory in asynchronous timing. The channel adapter manages directory information of the data within the local cache memory. In response to a data-read request from the host, the channel adapter checks whether the read-data hits or not in the local cache memory based on the directory information. If the read-data hits, the read-data is transferred from the local cache memory to the host.
    Type: Grant
    Filed: February 3, 2004
    Date of Patent: February 26, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Yonggen Jin, Youichi Gotoh, Shinichi Nakayama
  • Patent number: 7337283
    Abstract: A user operates an input device to set information necessary for reserving a volume and a port while looking at a screen for reservation management displayed on a display device Next, a storage management program retrieves reservable volumes and ports using a volume retrieval subprogram of a policy basis. At this point, when a policy concerning performance is inputted, the storage management program inquires of a performance analysis program of a storage performance management server whether the performance is satisfied. When the volume and the port are found, the storage management program stores reservation information in a reservation management DB using a reservation subprogram. When the volume and the port are not found, the storage management program judges whether an alternative volume for the reserved volume is present using a volume adjustment subprogram.
    Type: Grant
    Filed: November 5, 2004
    Date of Patent: February 26, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Tomoko Susaki, Takeshi Arisaka, Takeshi Saito
  • Patent number: 7325109
    Abstract: In one embodiment, the present invention provides a method for mirroring data representing a file system. The data is stored on a primary storage server and is mirrored on a secondary storage server. In the method the file system is mirrored without comparing blocks used to that represent the file system at the primary storage server, and the secondary storage server.
    Type: Grant
    Filed: October 24, 2003
    Date of Patent: January 29, 2008
    Assignee: Network Appliance, Inc.
    Inventors: Nitin Muppalaneni, Abhijeet P. Gole, Michael L. Federwisch, Mark Smith
  • Patent number: 7318135
    Abstract: A system includes a storage device, a backup storage device, and an intermediate storage device. Backup is on-line and copies data blocks from the storage device into the backup storage device, optionally through the intermediate storage device. When a write is directed to a data storage block has not yet been backed up, that data storage block is copied from the storage device to the intermediate storage device, the write is executed on the identified data storage block, and the data storage block is copied from the intermediate storage device to the backup storage device. In case of an error accessing a block on the storage device, the block is marked as invalid. The system suspends a write command to the storage device during the backup if the intermediate storage device has reached a selected capacity; and copies a selected amount of data from the intermediate storage device to the backup storage device.
    Type: Grant
    Filed: May 11, 2006
    Date of Patent: January 8, 2008
    Assignee: Acronis Inc.
    Inventors: Alexander G. Tormasov, Serguei M. Beloussov, Maxim V. Tsypliaev, Maxim V. Lyadvinsky
  • Patent number: 7318124
    Abstract: Determining a cache hit ratio of a caching device analytically and precisely.
    Type: Grant
    Filed: May 17, 2005
    Date of Patent: January 8, 2008
    Assignee: International Business Machines Corporation
    Inventors: Toshiyuki Hama, Ryo Hirade
  • Patent number: 7310705
    Abstract: The present invention relates to a multithread processor. In the multithread processor, when a cache miss occurs on a request related to an instruction in, of a plurality of caches arranged hierarchically, a cache at the lowest place in the hierarchy, with respect to the request suffering the cache miss, a cache control unit notifies an instruction identifier and a thread identifier, which are related to the instruction, to a multithread control unit. When a cache miss occurs on an instruction to be next completed, the multithread control unit makes the switching between threads on the basis of the instruction identifier and thread identifier notified from the cache control unit. This enables effective thread switching, thus enhancing the processing speed.
    Type: Grant
    Filed: November 5, 2004
    Date of Patent: December 18, 2007
    Assignee: FUJITSU Limited
    Inventors: Toshio Yoshida, Masaki Ukai, Naohiro Kiyota
  • Patent number: 7308538
    Abstract: With scope-based cache coherence, a cache can maintain scope information for a memory address. The scope information specifies caches in which data of the address is potentially cached, but not necessarily caches in which data of the address is actually cached. Appropriate scope information can be used as snoop filters to reduce unnecessary coherence messages and snoop operations in SMP systems. If a cache maintains scope information of an address, it can potentially avoid sending cache requests to caches outside the scope in case of a cache miss on the address. Scope information can be adjusted dynamically via a scope calibration operation to reflect changing data access patterns. A calibration prediction mechanism can be employed to predict when a scope calibration needs to be invoked.
    Type: Grant
    Filed: November 4, 2004
    Date of Patent: December 11, 2007
    Assignee: International Business Machines Corporation
    Inventor: Xiaowei Shen
  • Patent number: 7305526
    Abstract: Provided are a method, system, and program for transferring data directed to virtual memory addresses to a device memory. Indicator bits are set for ranges of device memory addresses in a device accessible over an Input/Output (I/O) bus indicating whether gathering is enabled for the device memory address ranges. Transfer operations are processed to transfer data to contiguous device memory addresses in the device. A determination is made as to whether the indicator bits for the contiguous device memory addresses indicate that gathering is enabled. A single bus I/O transaction is generated to transfer data for the contiguous device memory addresses over the I/O bus in response to determining that the indicator bits for the contiguous device memory addresses indicate that gathering is enabled.
    Type: Grant
    Filed: November 5, 2004
    Date of Patent: December 4, 2007
    Assignee: International Business Machines Corporation
    Inventors: Michael Thomas Benhase, Robert Alan Cargnoni, James Stephen Fields, Jr., Michael John Mayfield, Bruce Mealey
  • Patent number: 7302520
    Abstract: An apparatus for data storage includes a cluster of NFS servers. Each server has network ports for incoming file system requests and cluster traffic between servers. The apparatus includes a plurality of storage arrays in communication with the servers. The servers utilize a striped file system for storing data. A method for data storage. A method for establishing storage for a file. A method for removing a file from storage. A method for reading data in a file. A method for writing data in a file.
    Type: Grant
    Filed: December 2, 2003
    Date of Patent: November 27, 2007
    Assignee: Spinnaker Networks, LLC
    Inventors: Michael L. Kazar, Richard N. Sanzi, Jr.
  • Patent number: 7299331
    Abstract: The specification may disclose a computer system that may have two memory boards operated in a mirrored mode. The computer system may have the ability to operate in a mirrored mode with the memory boards having varying amounts of memory. This feature may allow for adding main memory to the computer system while the computer system is operational.
    Type: Grant
    Filed: January 21, 2003
    Date of Patent: November 20, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Kevin G. Depew, David F. Heinrich, Vincent Nguyen, David W. Engler
  • Patent number: 7290110
    Abstract: A system and method of squeezing slabs of memory empty are provided. A slab is a block of allocated memory space that is dedicated to holding one type of data. When it is determined that a slab of memory is to be squeezed empty, no object may be allocated from the slab. That is, new data is precluded from being placed in any unused space of the slab. Further, data is also precluded from being placed in any space in the slab that becomes unused anytime thereafter. When the slab becomes empty, the slab is de-allocated.
    Type: Grant
    Filed: September 11, 2003
    Date of Patent: October 30, 2007
    Assignee: International Business Machines Corporation
    Inventor: Zachary Merlynn Loafman
  • Patent number: 7287132
    Abstract: The present invention provides a storage system and a method of controlling the storage system, in which a second site rapidly resumes system process when a first site is damaged. The storage system comprises a first site including a first storage device, a second site including a second storage device, and a third site including a third storage device, and the method of controlling the storage system comprises a step of making a logical volume of the second storage device consistent with a logical volume of the first storage device by remotely copying only the differential data between the logical volume of the first storage device and the logical volume of the second storage device from a logical volume of the third storage device to the logical volume of the second storage device when the first site is damaged.
    Type: Grant
    Filed: September 26, 2006
    Date of Patent: October 23, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Masamitsu Takahashi, Takao Satoh, Koji Ozawa
  • Patent number: 7287129
    Abstract: There is provided a storage management system capable of utilizing division management with enhanced flexibility and of enhancing security of the entire system, by providing functions by program products in each division unit of a storage subsystem. The storage management system has a program-product management table stored in a shared memory in the storage subsystem and showing presence or absence of the program products, which provide management functions of respective resources to respective SLPRs. At the time of executing the management functions by the program products in the SLPRs of users in accordance with instructions from the users, the storage management system is referred to and execution of the management function having no program product is restricted.
    Type: Grant
    Filed: May 17, 2006
    Date of Patent: October 23, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Shuichi Yagi, Kozue Fujii, Tatsuya Murakami
  • Patent number: 7284105
    Abstract: A storage apparatus is operable as primary in a remote copy pair and comprises a remote copy component operable to establish a remote copy relationship between said primary and a secondary; a copy component operable at the primary to create a copy for download onto a portable physical storage medium for offline transport to the secondary for upload; a synchronization component for synchronizing data at said secondary with data at said primary using an online link in response to a request for synchronization from the secondary; a metadata component operable to store a dirty state indicator of a portion of a storage space at the primary after establishment of the remote copy relationship at the primary; and the metadata component being operable to limit synchronization at the secondary to the portion of storage having a dirty state indicator at the primary.
    Type: Grant
    Filed: September 10, 2003
    Date of Patent: October 16, 2007
    Assignee: International Business Machines Corporation
    Inventors: Henry Esmond Butterworth, Carlos Francisco Fuente, Robert Frederic Kern, Robert Bruce Nicholsen
  • Patent number: 7284111
    Abstract: A technique to implement an integrated multidimensional sorter (306) is to store data such that it may be retrieved in a sorted fashion. Entries are stored (407) into a memory according to time stamp value, and the time stamp value is divided (412) into multiple portions. The memory is organized as a pointer memory (505, 508, 513, and 520). An integrated multidimensional sorter may be implemented using integrated circuit technology using one or more integrated circuits (306). These integrated circuits may be used in management of network traffic, and provides quality of service (QoS) control.
    Type: Grant
    Filed: April 17, 2002
    Date of Patent: October 16, 2007
    Assignee: DinoChip, Inc.
    Inventor: Katie Sae-Koe
  • Patent number: 7277981
    Abstract: A memory device has a scratch control array of non-volatile memory cells that is separate from the primary array of memory cells. The scratch control array stores an instruction sequence for execution by the memory device's controller circuit. The sequence can include instructions for testing of the memory device. The execution of the instruction sequence is initiated and the control circuit fetches each instruction from the scratch control array for execution. The results are then reported and/or stored in the scratch control array.
    Type: Grant
    Filed: January 10, 2007
    Date of Patent: October 2, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Frankie F. Roohparvar
  • Patent number: 7275136
    Abstract: In a computer system with a non-segmented, region-based memory architecture, such as Intel IA-64 systems, two or more sub-systems share a resource, such as a virtual-to-physical address mapping and need to have overlapping regions of the virtual address space for accessing different physical addresses. Virtual addresses include a portion that is used to identify which region the issuing sub-system wants to access. For example, the region-identifying portion of virtual addresses may select a region register whose contents point to a virtual-to-physical address mapping for the corresponding region. To protect a second sub-system S2 from a first S1, whenever the S1 issues an address in a region occupied by S2, the region for the S2 is changed. This allows S1 to issue its addresses without change. In a preferred embodiment of the invention, S2 is a virtual machine monitor (VMM) and S1 is a virtual machine running on the VMM.
    Type: Grant
    Filed: July 27, 2006
    Date of Patent: September 25, 2007
    Assignee: VMware, Inc.
    Inventor: Xiaoxin Chen
  • Patent number: 7266665
    Abstract: Provided are a method, system, and article of manufacture for copying storage. Data sent from a first storage unit is synchronously copied at a second storage unit. The copied data is sent asynchronously from the second storage unit to a third storage unit.
    Type: Grant
    Filed: June 17, 2003
    Date of Patent: September 4, 2007
    Assignee: International Business Machines Corporation
    Inventors: Warren K. Stanley, William Frank Micka, Gail Andrea Spear, Sam Clark Werner, Olympia Gluck, Michael E. Factor, Robert Francis Bartfai