Abstract: The present disclosure discloses a display substrate, a production method thereof and a display device. The display substrate includes: a base substrate, a pixel defining layer located on the base substrate, and an organic functional layer located on the pixel defining layer, where the pixel defining layer has opening areas for defining light emitting areas of respective sub-pixels, and contains photo-induced deforming particles; and the organic functional layer covers the opening areas and includes a plurality of parts corresponding to the respective sub-pixels one by one, and the plurality of parts are spaced from each other.

Abstract: Methods and devices to build and use multi-functional scattering structures. The disclosed methods and devices account for multiple target functions and can be implemented using fabrication methods based on two-photon polymerization or multi-layer lithography. Exemplary devices functioning as wave splitters are also described. Results confirming the performance and benefits of the disclosed teachings are also described.

Abstract: Examples of semiconductor packages with stacked RDLs described herein may include, for example, a first RDL comprising multiple RDL layers coupled to a second RDL comprising multiple RDL layers using copper pillars and an underfill in place of a conventional substrate. The examples herein may use RDLs instead of substrates to achieve smaller design feature size (x, y dimensions reduction), thinner copper layers and less metal usage (z dimension reduction), flexibility to attach semiconductor dies and surface mount devices (SMD) on either side of the package, and less number of built-up RDL layers.

Abstract: A display panel including: a substrate including an opening area and a display area surrounding the opening area; a plurality of display elements, each including a pixel electrode, an emission layer, and an opposite electrode, the plurality of display elements being located in the display area; a thin-film encapsulation layer covering the plurality of display elements and including an organic encapsulation layer and an inorganic encapsulation layer; a plurality of grooves located between the opening area and the display area, the plurality of grooves being concave in a depth direction of the substrate and having an undercut structure; and a partition wall located between neighboring grooves among the plurality of grooves.

Abstract: An embodiment provides a display device including an insulating layer which is continuous between opposed ends of two adjacent lower electrodes from an upper part of one of the ends to an upper part of the other end, a first organic layer which is disposed over the lower electrodes and the insulating layer, a second organic layer which is disposed over the lower electrodes and the insulating layer with the first organic layer interposed therebetween and includes a light emitting layer, and a second electrode which covers the organic layer. The upper face of the insulating layer includes a recess between the two lower electrodes. The aspect ratio of the recess is 0.5 or more.

Abstract: A display device includes: a substrate; a first insulating layer disposed on the substrate and that includes an inorganic insulating material; an oxide semiconductor layer disposed on the first insulating layer; a second insulating layer disposed on the oxide semiconductor layer and that includes an inorganic insulating material; and a third insulating layer disposed on a gate electrode disposed on the second insulating layer and that includes an inorganic insulating material. The oxide semiconductor layer includes a first conductive region, a second conductive region, and a channel region located between the first conductive region and the second conductive region, and a value in the channel region of the oxide semiconductor layer of HC according to equation (1) is less than 30%.

Abstract: An OLED display substrate, a manufacturing method thereof and a display device are provided. The OLED display substrate includes a TFT array layer, a first electrode, a pixel definition layer, an OEL layer and a second electrode arranged on a base substrate. The pixel definition layer is configured to define a plurality of subpixel regions. A reflection structure surrounds each subpixel region and is capable of reflecting light beams from the OEL layer and beyond an escaping cone in such a manner as to enable at least parts of the light beams to enter the escaping cone.

Abstract: The present application discloses an array substrate having a plurality of first thin film transistors and a plurality of second thin film transistors. Each of the plurality of first thin film transistors includes a silicon active layer. The array substrate includes a base substrate; a silicon layer having a plurality of silicon active layers respectively for the plurality of first thin film transistors; and a UV absorption layer on a side of the silicon layer distal to the base substrate, and including a plurality of UV absorption blocks. Each of the plurality of UV absorption blocks is on a side of the one of the plurality of silicon active layers distal to the base substrate, and is insulated from the one of the plurality of silicon active layers.

Abstract: The present disclosure provides an electronic device including a plurality of first electrodes, a second electrode, a functional layer disposed between each first electrode and the second electrode, and an insulating layer having a slope portion on the first electrode, wherein the functional layer is continuously disposed so as to cover the first electrode, a neighboring first electrode, and the insulating layer covering the first electrode and the neighboring first electrode, the functional layer on the first electrode has a layer thickness smaller than a height from an upper surface of the first electrode to an upper surface of the insulating layer, and the functional layer on the slope portion of the insulating layer has a layer thickness of 20 nm or more in a direction perpendicular to a slope surface of the slope portion.

Abstract: A semiconductor device includes a substrate, a gate structure, semimetallic source/drain structures, and source/drain contacts. The gate structure is over the substrate. The semimetallic source/drain structures are respectively on opposite sides of the gate structure, in which a band structure of each of the semimetallic source/drain structures has a valence band and a conduction band at different symmetry k-points. The source/drain contacts land on top surfaces of the semimetallic source/drain structures, respectively.

Abstract: A display panel is provided. The display panel includes a base substrate; a first conductive layer on the base substrate, and in an encapsulated area and a peripheral area of the display panel; a second conductive layer on a side of the first conductive layer away from the base substrate, and in the encapsulated area and the peripheral area; an organic insulating layer between the first conductive layer and the second conductive layer, and limited in the encapsulated area; a first inorganic insulating layer between the first conductive layer and the second conductive layer, and on a side of the organic insulating layer away from the base substrate; and a second inorganic insulating layer between the organic insulating layer and the first conductive layer. The first inorganic insulating layer covers the organic insulating layer.

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.

Abstract: Provided is a display device. The display device has a display area and a non-display area disposed around the display area and includes pixels disposed in the display area; and an intra-pixel bending area disposed along a direction of each of the pixels.

Abstract: Provided is a semi-transparent display and a method for producing a semi-transparent display. An SOI wafer is provided, the surface having at least one pixel region and at least one contact region arranged next to the pixel region, the SOI wafer comprising a silicon substrate on the rear side. At least one electromagnetic-radiation-emitting layer is deposited on the front side of the SOI wafer. At least one transparent cover layer is applied above the at least one electromagnetic-radiation-emitting layer. A wiring carrier is fastened to the assembly comprising the SOI wafer, the electromagnetic-radiation-emitting layer and the transparent cover layer. Before fastening of the wiring carrier to the assembly, the silicon substrate is removed from the assembly, producing a residual assembly, and electrically conductive connections are formed between the contact region of the SOI wafer and the wiring carrier from the rear side of the SOI wafer.

Abstract: A display substrate includes a substrate; a first pixel defining layer on the substrate, wherein the first pixel defining layer has a first container portion therein; a planarization pattern filled in the first container portion, wherein a surface of the planarization pattern distal to the substrate is flush with a surface of the first pixel defining layer distal to the substrate; a second pixel defining layer on a side of the planarization pattern distal to the substrate, wherein a second container portion is in the second pixel defining layer and penetrates through the second pixel defining layer along a stacking direction of the first pixel defining layer and the substrate, and an orthographic projection of the second container portion on the substrate falls within an orthographic projection of the first container portion on the substrate; and an organic functional layer in the second container portion.

Abstract: A power semiconductor device may include a junction termination region, bounded by a side edge of a semiconductor substrate. The junction termination region may include a substrate layer of a first dopant type, a well layer of a second dopant type, a conductive trench assembly having a first set of conductive trenches, in the junction termination region, and extending from above the substrate layer through the well layer; and a metal layer, electrically connecting the conductive trench assembly to the well layer. The metal layer may include a set of inner metal contacts, electrically connecting a set of inner regions of the well layer to a first set of trenches of the conductive trench assembly; and an outer metal contact, electrically connecting an outer region of the well layer to a second set of conductive trenches of the conductive trench assembly, wherein the outer region borders the side edge.

Abstract: Disclosed herein is an apparatus comprising: a pixel define layer (PDL) on a support and having a hole therein; a light emitting layer (EML) at least partially within the hole; and a first reflective layer on a sidewall of the hole and configured to reflect light emitted by the EML. Also disclosed herein is a display panel and a system comprising a plurality of the apparatus. Further disclosed herein is a method of making the apparatus.

Abstract: A weather forecasting system has weather forecasting logic that receives weather data from a satellite or other source, such as radar. The weather forecasting logic processes such data to identify cumulus clouds. For each cumulus cloud identified, the weather forecasting logic applies interest field tests and feeds the results into formulas derived based on measurements from current and past weather events. The model determines a score indicating the likelihood of the cumulus cloud forming precipitation and a score indicating the likelihood of the cumulus cloud forming lightning in the future within a certain time period. Based on such scores, the weather forecasting logic predicts in which geographic regions the identified cumulus cloud will produce precipitation and/or lightning during the time period. The predictions of the weather forecasting logic may then be used to provide a weather map thereby providing users with a graphical illustration of the areas.

Abstract: A display device includes: a bending region including a bending peripheral opening passing through the first interlayer insulating film and the first gate insulating film and a bending opening in the bending peripheral opening and passing through the second interlayer insulating film and the buffer layer to expose the substrate, a first sidewall of the bending peripheral opening includes a side surface of the first interlayer insulating film and a side surface of the first gate insulating film, the second interlayer insulating film covers the first sidewall of the bending peripheral opening, the bending opening includes a second sidewall including a side surface of the buffer layer and a portion of a side surface of the second interlayer insulating film arranged with the side surface of the buffer layer, and the first via layer fills the bending opening.

Abstract: The present disclosure provides an array substrate and a method for manufacturing the same, and a display device. The array substrate includes a plurality of pixel units arranged in a matrix, each the pixel unit includes a plurality of pixel regions, each pixel region is provided with a display electrode having a slit; a plurality of data lines, each of the data lines includes a plurality of data line segments, any two adjacent data line segments are electrically coupled to each other; in each of the pixel units, each of a part of the pixel regions has a display electrode whose slit is parallel to a data line segment adjacent to this display electrode in the data lines; each of another part of the pixel regions has a display electrode whose slit is non-parallel to a data line segment adjacent to this display electrode in the data lines.