Patents Examined by Eric W Jones
  • Patent number: 10263213
    Abstract: A display device including a first substrate including a display area that displays an image and a peripheral area, in which no image is displayed, surrounding the display area. The display device further includes a plurality of pixels disposed in the display area. The display device additionally includes a first metal layer disposed above the first substrate in the peripheral area, and the first metal layer including a plurality of openings. The display device further includes a sealant disposed above the first metal layer, and surrounding the plurality of pixels. The display device additionally includes a plurality of second metal layers disposed above the first substrate and below the first metal layer in the peripheral area, and respectively overlapping the openings of the first metal layer. A part of the sealant is disposed in the plurality of openings.
    Type: Grant
    Filed: December 5, 2016
    Date of Patent: April 16, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Moo Soon Ko, Young Woo Park, Il Jeong Lee, Sang-Mok Hong
  • Patent number: 10263217
    Abstract: A flexible organic light emitting display (OLED) device includes a flexible substrate having a display area, a non-display area at a periphery of the display area and a folding region; at least one organic emitting diode on the flexible substrate in the display area; an encapsulation film covering the organic emitting diode; and a dam on the flexible substrate. The dam laterally surrounds the display area and includes: a first dam in the folding region; and a second dam outside the folding region, wherein the average thickness of the first dam is smaller than the average thickness of the second dam.
    Type: Grant
    Filed: October 13, 2016
    Date of Patent: April 16, 2019
    Assignee: LG Display Co., Ltd.
    Inventors: Jae-Young Lee, Ji-Min Kim, Gi-Youn Kim, Sang-Hoon Oh, Wan-Soo Lee
  • Patent number: 10256385
    Abstract: LED packages and related methods are provided. The LED packages can include a submount having a top and bottom surface and a plurality of top electrically conductive elements on the top surface of the submount. An LED can be disposed on one of the top electrically conductive elements. The LED can emit a dominant wavelength generally between approximately 600 nm and approximately 650 nm, and more particularly between approximately 610 nm and approximately 630 nm when an electrical signal is applied to the top electrically conductive elements. A bottom thermally conductive element can be provided on the bottom surface and is not in electrical contact with the top electrically conductive elements. A lens can be disposed over the LED. The LED packages can have improved lumen performances, lower thermal resistances, improved efficiencies, and longer operational lifetimes.
    Type: Grant
    Filed: July 20, 2011
    Date of Patent: April 9, 2019
    Assignee: Cree, Inc.
    Inventors: Jeffrey Carl Britt, Yankun Fu
  • Patent number: 10256290
    Abstract: A method for treating a compound semiconductor substrate, in which method in vacuum conditions a surface of an In-containing III-As, III-Sb or III-P substrate is cleaned from amorphous native oxides and after that the cleaned substrate is heated to a temperature of about 250-550° C. and oxidized by introducing oxygen gas onto the surface of the substrate. The invention relates also to a compound semiconductor substrate, and the use of the substrate in a structure of a transistor such as MOSFET.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: April 9, 2019
    Assignee: Comptek Solutions Oy
    Inventors: Pekka Laukkanen, Jouko Lang, Marko Punkkinen, Marjukka Tuominen, Veikko Tuominen, Johnny Dahl, Juhani Vayrynen
  • Patent number: 10249502
    Abstract: Techniques for forming a metastable phosphorous P-doped silicon Si source drain contacts are provided. In one aspect, a method for forming n-type source and drain contacts includes the steps of: forming a transistor on a substrate; depositing a dielectric over the transistor; forming contact trenches in the dielectric that extend down to source and drain regions of the transistor; forming an epitaxial material in the contact trenches on the source and drain regions; implanting P into the epitaxial material to form an amorphous P-doped layer; and annealing the amorphous P-doped layer under conditions sufficient to form a crystalline P-doped layer having a homogenous phosphorous concentration that is greater than about 1.5×1021 atoms per cubic centimeter (at./cm3). Transistor devices are also provided utilizing the present P-doped Si source and drain contacts.
    Type: Grant
    Filed: January 22, 2016
    Date of Patent: April 2, 2019
    Assignee: International Business Machines Corporation
    Inventors: Oleg Gluschenkov, Zuoguang Liu, Shogo Mochizuki, Hiroaki Niimi, Tenko Yamashita, Chun-chen Yeh
  • Patent number: 10243159
    Abstract: An organic light emitting diode display includes: a substrate; a first electrode on the substrate; a second electrode opposed to the first electrode; a first light emitting unit and a second light emitting unit between the first electrode and the second electrode; and a charge generation layer between the first light emitting unit and the second light emitting unit. The first light emitting unit includes a blue fluorescent light emitting layer. The second light emitting unit includes a blue light emitting layer and a yellow light emitting layer.
    Type: Grant
    Filed: June 5, 2015
    Date of Patent: March 26, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yonghan Lee, Sungsoo Lee, Woosik Jeon
  • Patent number: 10236326
    Abstract: Provided is an organic light emitting display device including a plurality of sub pixels. Areas of emission regions of green sub pixels of the plurality of sub pixels are the same as or larger than an area of an emission region of at least one non-green sub pixel of the plurality of sub pixels. Also the organic light emitting display device includes an area of an emission region of a green sub pixel having a low luminance lifetime being the same as or larger than areas of emission regions of non-green sub pixels. Accordingly, it is possible to make the luminance lifetime of the green sub pixel and the luminance lifetimes of the non-green sub pixels uniform. Further, it is possible to minimize a color change of the organic light emitting display device.
    Type: Grant
    Filed: December 5, 2016
    Date of Patent: March 19, 2019
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Jung-Min Lee, JungChul Kim, WooChan Kim
  • Patent number: 10236332
    Abstract: The present disclosure relates to an organic light emitting diode display having high luminescence. The present disclosure suggests an organic light emitting diode display comprising: a data line, a scan line and a driving current line defining a pixel area on a substrate; an anode electrode formed within the pixel area; an additional capacitance formed by overlapping expanded portions of the anode electrode with some portions of the driving current line; a bank defining a light emitting area in the anode electrode; an organic emission layer formed on the anode electrode; and a cathode electrode formed on the organic emission layer. The present disclosure suggests high luminescence organic light emitting diode display by including an additional capacitance for increasing the anode capacitance.
    Type: Grant
    Filed: December 11, 2013
    Date of Patent: March 19, 2019
    Assignee: LG Display Co., Ltd.
    Inventors: Kimoon Jung, Soonjae Hwang, Jongsik Shim
  • Patent number: 10224386
    Abstract: An organic light-emitting diode display may have an array of pixels. The pixels may each have an organic light-emitting diode with a respective anode and may be formed from thin-film transistor circuitry formed on a substrate. A mesh-shaped path may be used to distribute a power supply voltage to the thin-film circuitry. The mesh-shaped path may have intersecting horizontally extending lines and vertically extending lines. The horizontally extending lines may be zigzag metal lines that do not overlap the anodes. The vertically extending lines may be straight vertical metal lines that overlap the anodes. The pixels may include pixels of different colors. Angularly dependent shifts in display color may be minimized by ensuring that the anodes of the differently colored pixels overlap the vertically extending lines by similar amounts.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: March 5, 2019
    Assignee: Apple Inc.
    Inventors: Warren S. Rieutort-Louis, Ting-Kuo Chang, Chieh-Wei Chen, Cheng-Ho Yu
  • Patent number: 10199605
    Abstract: An organic EL device according to one aspect of the present invention includes: a base material; a first recess provided on a top surface of the base material; a reflective layer provided along a surface of the first recess; a filling layer filled in the first recess, the filling layer including a top surface on which a second recess is provided; a first electrode provided on an upper layer side of the filling layer; an organic layer comprising a light emitting layer provided on an upper layer side of the first electrode; and a second electrode provided on an upper layer side of the organic layer. Within the organic layer, a part of a light emitting area interposed between the first electrode and the second electrode is positioned inside the second recess The reflective layer is in contact with the first electrode in a periphery of the first recess.
    Type: Grant
    Filed: November 13, 2015
    Date of Patent: February 5, 2019
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Satoshi Inoue, Katsuhiro Kikuchi, Hideki Uchida, Eiji Koike, Masanori Ohara, Yuto Tsukamoto, Yoshiyuki Isomura, Kazuki Matsunaga
  • Patent number: 10192810
    Abstract: Underfill material flow control for reduced die-to-die spacing in semiconductor packages and the resulting semiconductor packages are described. In an example, a semiconductor apparatus includes first and second semiconductor dies, each having a surface with an integrated circuit thereon coupled to contact pads of an uppermost metallization layer of a common semiconductor package substrate by a plurality of conductive contacts, the first and second semiconductor dies separated by a spacing. A barrier structure is disposed between the first semiconductor die and the common semiconductor package substrate and at least partially underneath the first semiconductor die. An underfill material layer is in contact with the second semiconductor die and with the barrier structure, but not in contact with the first semiconductor die.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: January 29, 2019
    Assignee: Intel Corporation
    Inventors: Omkar G. Karhade, Nitin A. Deshpande, Rajendra C. Dias, Edvin Cetegen, Lars D. Skoglund
  • Patent number: 10192896
    Abstract: A display device includes a substrate including a display area to display an image and a non-display area provided on at least one side of the display area, a plurality of pixels disposed on the substrate and provided in an area corresponding to the display area, a first insulating layer having an opening in a first area of the non-display area, a second insulating layer provided in the first area, first lines provided on the substrate and connected to the plurality of pixels, and second lines provided on the first and second insulating layers, and connected to the first lines. An area in which the first lines overlap with the second lines is spaced apart from an edge of the second insulating layer when viewed in a plan view.
    Type: Grant
    Filed: October 14, 2016
    Date of Patent: January 29, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Deuk Jong Kim, Keun Soo Lee
  • Patent number: 10177206
    Abstract: Disclosed is an organic light emitting display device that may include an anode electrode and an eave structure under a bank layer and spaced apart from each other, a cathode electrode on the bank layer, and an auxiliary electrode under the eave structure and electrically connected with the cathode electrode, wherein the cathode electrode extends to a contact space under the eave structure, and the extending cathode electrode is connected with the auxiliary electrode in the contact space.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: January 8, 2019
    Assignee: LG DISPLAY CO., LTD.
    Inventors: DeukSoo Jung, Yongsun Jo, YoungEun Hong, SungSoo Kim
  • Patent number: 10170558
    Abstract: A method for doping punch through stoppers (PTSs) includes forming fins in a monocrystalline substrate, forming a dielectric layer at a base portion between the fins and forming spacers on sidewalls of the fins down to a top portion of the dielectric layer. The dielectric layer is recessed to form gaps between the top portion of the dielectric layer and the spacer to expose the fins in the gaps. The fins are doped through the gaps to form PTSs in the fins.
    Type: Grant
    Filed: October 13, 2017
    Date of Patent: January 1, 2019
    Assignee: International Business Machines Corporation
    Inventors: Effendi Leobandung, Tenko Yamashita
  • Patent number: 10163835
    Abstract: A wafer-level pulling method includes securing a top holder to a plurality of chips. The method further includes securing a bottom holder to a wafer, wherein the plurality of chips are bonded to the wafer by a plurality of solder bumps. The method further includes softening the plurality of solder bumps. The method further includes stretching the plurality of softened solder bumps, wherein stretching the plurality of softened solder bumps comprises leveling the plurality of chips using a plurality of levelling devices separated from the plurality of chips, and a first levelling device of the plurality of levelling devices has a different structure from a second levelling device of the plurality of levelling devices.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: December 25, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Su-Chun Yang, Yi-Li Hsiao, Chih-Hang Tung, Chen-Hua Yu
  • Patent number: 10163756
    Abstract: An isolation structure for stacked dies is provided. A through-silicon via is formed in a semiconductor substrate. A backside of the semiconductor substrate is thinned to expose the through-silicon via. An isolation film is formed over the backside of the semiconductor substrate and the exposed portion of the through-silicon via. The isolation film is thinned to re-expose the through-silicon via, and conductive elements are formed on the through-silicon via. The conductive element may be, for example, a solder ball or a conductive pad. The conductive pad may be formed by depositing a seed layer and an overlying mask layer. The conductive pad is formed on the exposed seed layer. Thereafter, the mask layer and the unused seed layer may be removed.
    Type: Grant
    Filed: April 16, 2014
    Date of Patent: December 25, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Pin Chang, Kuo-Ching Hsu, Chen-Shien Chen, Wen-Chih Chiou, Chen-Hua Yu
  • Patent number: 10157769
    Abstract: Semiconductor devices including at least one diode over a conductive strap. The semiconductor device may include at least one conductive strap over an insulator material, at least one diode comprising a single crystalline silicon material over a conductive material, and a memory cell on the at least one diode. The at least one diode may be formed from a single crystalline silicon material. Methods of forming such semiconductor devices are also disclosed.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: December 18, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Sanh D. Tang, Ming Zhang
  • Patent number: 10147906
    Abstract: A high efficacy multi-layer seal structure formed on an organic light emitting diode device and the process for depositing the same. A thin film seal is formed over the substrate having OLED layers, and includes a first metallic layer formed over the substrate, an inorganic layer formed over the first metallic layer, and a second metallic layer formed of the inorganic layer. The metallic layers comprise one or more oxide or nitride layers, each oxide or nitride comprising a metal. The inorganic layer comprises a metal oxide, a metal nitride or a metal oxynitride. The process for forming the multi-layer seal structure includes depositing the first metallic layer over the substrate using atomic layer deposition, depositing the inorganic layer over the first metallic layer using sputtering, and then depositing the second metallic layer over the inorganic layer using atomic layer deposition.
    Type: Grant
    Filed: February 6, 2015
    Date of Patent: December 4, 2018
    Assignee: eMagin Corporation
    Inventors: Amalkumar Ghosh, Fridrich Vazan
  • Patent number: 10141379
    Abstract: An organic light emitting diode display device can include a display panel including a plurality of pixels, at least one pixel among the plurality of pixels including first to fourth sub-pixels defined at intersection regions between gate lines and data lines; and first to third color filter layers corresponding to the first sub-pixel, the third sub-pixel and the fourth sub-pixel, respectively; the second sub-pixel includes: an emission area, and first and second color filter patterns disposed in the second sub-pixel configured to absorb light incident from an outside of the organic light emitting diode display device, the first color filter pattern and a second color filter pattern are different colors; and the first color filter pattern or the second color filter pattern has a first gap between an edge of the first or second color filter pattern and an edge of the emission area.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: November 27, 2018
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Youngho Kim, SeungBeum Lee, InCheol Park, EunMi Jo
  • Patent number: 10135010
    Abstract: A display apparatus includes a substrate including at least one hole disposed in a hole area of the substrate, a thin film transistor disposed on the substrate, a light-emitting component disposed on the substrate and electrically connected to the thin film transistor, an insulating layer disposed on the substrate, a thin film encapsulation layer disposed on the substrate, and a laser blocking layer. The substrate includes a display area and a non-display area that is disposed between the display area and the hole area. The laser blocking layer is disposed on the insulating layer in the non-display area.
    Type: Grant
    Filed: October 14, 2016
    Date of Patent: November 20, 2018
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sunkwang Kim, Kinyeng Kang