Abstract: The present disclosure relates to an ultra high density transparent flat panel display. The present disclosure provides a transparent flat panel display including: a driving current line, a data line and a sensing line running in a vertical direction on a substrate; a scan line and a horizontal sensing line running in a horizontal direction on the substrate; an emission area disposed between the driving current line and the data line; and a transparent area disposed between the data line and the sensing line.

Abstract: A metal-oxide-semiconductor (MOS) capacitor is disclosed. The MOS capacitor includes a front-end-of-the-line (FEOL) field effect transistor (FET), and a plurality of middle-end-of-the-line (MEOL) conductive structures. The FEOL FET includes a source region and a drain region positioned in a semiconductor substrate, and a gate over the semiconductor substrate. The plurality of MEOL conductive structures is disposed on a top surface of the gate. At least one of the MEOL conductive structures is electrically disconnected from a back-end-of-the-line (BEOL) metal layer. A semiconductor fabrication method and a MOS capacitor circuit are also disclosed.

Abstract: A method is presented for forming a semiconductor structure. The method includes forming a plurality of fins on a first region of the semiconductor substrate, forming a bi-polymer structure, selectively removing the first polymer of the bi-polymer structure and forming deep trenches in the semiconductor substrate resulting in pillars in a second region of the semiconductor structure. The method further includes selectively removing the second polymer of the bi-polymer structure, doping the pillars, and depositing a high-k metal gate (HKMG) over the first and second regions to form the MIS capacitor in the second region of the semiconductor substrate.

Abstract: An organic light emitting display device includes a first electrode in an emission area of a subpixel; a pixel defining layer surrounding the first electrode in a non-emissive area of the subpixel; a light emitting layer on the first electrode; a second electrode on the light emitting layer; a first encapsulation layer on the second electrode; and a color filter on the first encapsulation layer in the subpixel.

Abstract: The disclosure provides an organic electroluminescent display panel, and a method for fabricating the same. The organic electroluminescent display panel includes a substrate, and a pixel defining layer and a light emitting layer arranged on the substrate, wherein the pixel defining layer includes a first pixel defining layer arranged on the substrate, and a second pixel defining layer arranged on the first pixel defining layer; the first pixel defining layer includes a plurality of first opening areas, each first opening area defines a sub-pixel light emitting area, and the light emitting layer is arranged in the first opening areas; and the second pixel defining layer includes a plurality of second opening areas, each second opening area defines a virtual pixel area, and each virtual pixel area includes at least two adjacent sub-pixel light emitting areas in the same color.

Abstract: An electronic device including a substrate, a semiconductor element disposed on the substrate, and a plurality of guard rings at least partially surrounding the semiconductor element, wherein adjacent guard rings are spaced apart by a substantially uniform distance as measured along an entire length of the guard rings, and at least one of the plurality of guard rings has a flared portion. In an embodiment, at least one of the plurality of guard rings electrically floats. In another embodiment, the plurality of guard rings are disposed at least partially below a primary surface of the substrate. In an embodiment, the electronic device is a high voltage MOSFET or an IGBT.

Abstract: A display device including a substrate including an emitting region and a non-emitting region; an auxiliary electrode disposed in the non-emitting region; a first passivation film covering the emitting region and the auxiliary electrode in the non-emitting region and including a first passivation hole exposing the auxiliary electrode; an overcoat layer disposed on the first passivation film and includes an over-hole exposing the auxiliary electrode; a first barrier layer disposed on the first passivation film and the overcoat layer and contacting the auxiliary electrode; a second passivation film disposed on the first barrier layer and including a second passivation hole exposing the first barrier layer; a bank layer disposed on the second passivation film and including a bank hole exposing the first barrier layer and having an undercut structure; an organic layer disposed on the bank layer and disconnected by the undercut structure; and a second electrode disposed on the organic layer and contacting the firs

Abstract: A method for forming a photovoltaic device includes providing a substrate. A layer is deposited to form one or more layers of a photovoltaic stack on the substrate. The depositing of the amorphous layer includes performing a high power flash deposition for depositing a first portion of the layer. A low power deposition is performed for depositing a second portion of the layer.

Abstract: Disclosed is an OLED device capable of reducing the number of manufacturing processes to apply a micro-cavity structure, and a method for manufacturing the same, wherein the OLED device may include a unit pixel having first to third subpixels, wherein each of the first to third subpixels includes a first electrode, an organic light emitting layer disposed on the first electrode, a second electrode disposed on the organic light emitting layer and formed of a transparent metal material, an encapsulation film for covering the second electrode, and a semi-transmissive electrode disposed on the encapsulation film, wherein a distance between the first electrode and the semi-transmissive electrode in the first subpixel, a distance between the first electrode and the semi-transmissive electrode in the second subpixel, and a distance between the first electrode and the semi-transmissive electrode in the third subpixel are different from one another.

Abstract: A multicolor imaging device capable of imaging two or more wavelengths with a single pixel comprises an avalanche photodiode having a material composition such that only one carrier causes substantially all of the impact ionization that occurs within the photodiode. The photodiode is arranged such that, when reverse-biased, the photodiode's gain varies with the photon energy of incident light. The photodiode, preferably a PIN avalanche photodiode or a separate absorber-multiplier photodiode, produces an output signal which can include at least two components produced in response to two different wavelengths of incident light. Circuitry receiving the output signal would typically include a means of extracting each of the components from the output signal.

Abstract: To provide a semiconductor light emitting element of which color irregularity is improved, the semiconductor light emitting element according to the present invention comprises: a support substrate; a semiconductor laminated structural body provided on the support substrate, the semiconductor laminated structural body having a first semiconductor layer, a luminescent layer, and a second semiconductor layer; a first electrode electrically connected to the first semiconductor layer; a second electrode electrically connected to the second semiconductor layer; a light shielding member covering a portion of an upper surface and side surfaces of the semiconductor laminated structural body, the light shielding member electrically separated from both of the first electrode and the second electrode; and a wavelength conversion member covering an upper surface not covered by the light shielding member of the semiconductor laminated structural body.

Abstract: An optoelectric device can comprise a substrate and at least one junction configured to provide an active region within the substrate. Additionally, the device can comprise a metal-mesh semiconductor electrical contact structure attached to a surface of the substrate. The metal-mesh semiconductor electrical contact structure can further comprise a mesh line width, a mesh opening size, and a mesh thickness.

Abstract: A semiconductor device includes a substrate having a fin projecting upwardly through an isolation structure over the substrate; a gate stack over the isolation structure and engaging the fin; and a gate spacer on a sidewall of the gate stack and in physical contact with the gate stack. The semiconductor device further includes a first dielectric layer vertically between the fin and the gate spacer and in physical contact with the sidewall of the gate stack, wherein the first dielectric layer has a laterally extending cavity. The semiconductor device further includes a second dielectric layer filling in the cavity, wherein the first and second dielectric layers include different materials.

Abstract: In an organic EL display device (electroluminescent device) including an organic EL element (electroluminescent element), a first sealing film covers the organic El element, a second sealing film is formed on the first sealing film, and a third sealing film covers the first sealing film and the second sealing film.

Abstract: Methods for fabricating semiconductor-metal-on-insulator (SMOI) structures include forming an acceptor wafer including an insulator material on a first semiconductor substrate, forming a donor wafer including a conductive material and an amorphous silicon material on a second semiconductor substrate, and bonding the amorphous silicon material of the donor wafer to the insulator material of the acceptor wafer. SMOI structures formed from such methods are also disclosed, as are semiconductor devices including such SMOI structures.

Abstract: A method for forming a photovoltaic device includes providing a substrate. A layer is deposited to form one or more layers of a photovoltaic stack on the substrate. The depositing of the amorphous layer includes performing a high power flash deposition for depositing a first portion of the layer. A low power deposition is performed for depositing a second portion of the layer.

Abstract: An organic light emitting diode display includes: a substrate; a first electrode on the substrate; a second electrode opposed to the first electrode; a first light emitting unit and a second light emitting unit between the first electrode and the second electrode; and a charge generation layer between the first light emitting unit and the second light emitting unit. The first light emitting unit includes a blue fluorescent light emitting layer. The second light emitting unit includes a blue light emitting layer and a yellow light emitting layer.

Abstract: Provided is an organic light emitting display panel with uniform luminance. A flattening layer including a contact hole is disposed on a substrate on which an auxiliary electrode is disposed. The contact hole in the flattening layer has an undercut pattern at a point contacting the auxiliary electrode. The organic light emitting layer is disconnected by the contact hole, but the common electrode is connected with the auxiliary electrode at an undercut pattern portion with a high step coverage as compared with the organic light emitting layer. Since the auxiliary electrode and the common electrode are connected with each other through the contact hole having the undercut pattern in the flattening layer, it is possible to preserve uniform luminance of the organic light emitting display panel.

Abstract: Provided is an organic light emitting display (OLED) device that includes, for example, a thin film transistor including an active layer, a gate electrode, a source electrode, and a drain electrode; a planarization layer on the thin film transistor; an anode on the planarization layer; an organic light emitting layer on the anode; a cathode on the organic light emitting layer; a first auxiliary line on the same layer and formed of the same material as the source electrode and the drain electrode; and a second auxiliary line on the same layer and formed of the same material as the anode, wherein the first auxiliary line and the second auxiliary line cross each other with the planarization layer interposed therebetween, and wherein the first auxiliary line is electrically connected with the cathode through the second auxiliary line.

Abstract: A chip package is disclosed that includes an electronic chip having a plurality of die pads formed on a top surface thereof, with a polyimide flex layer positioned thereon by way of an adhesive layer. A plurality of vias is formed through the polyimide flex layer and the adhesive layer corresponding to the die pads. A plurality of metal interconnects are formed on the polyimide flex layer each having a cover pad covering a portion of a top surface of the polyimide flex layer, a sidewall extending down from the cover pad and through the via along a perimeter thereof, and a base connected to the sidewall and forming an electrical connection with a respective die pad. Each of the base and the sidewall is formed to have a thickness that is equal to or greater than a thickness of the adhesive layer.