Abstract: The disclosure discloses an optoelectronic element comprising: an optoelectronic unit comprising a first metal layer, a second metal layer, and an outermost lateral surface; an insulating layer having a first portion overlapping the optoelectronic unit and extending beyond the lateral surface, and a second portion separated from the first portion in a cross-sectional view; and a first conductive layer formed on the insulating layer.

Abstract: A plating chuck for holding a substrate during plating processes, wherein the substrate has a notch area (3031) and a patterned region (3032) adjacent to the notch area (3031). The plating chuck comprises a cover plate (3033) configured to cover the notch area (3031) of the substrate to shield the electric field at the notch area (3031) when the substrate is being plated.

Abstract: A substrate stage includes: a base portion having a mounting surface; an annular support configured to support a substrate; an annular partition wall configured to divide the mounting surface into an outer region and an inner region in a radial direction of the substrate; a plurality of protrusions provided on the mounting surface and configured to support the substrate with a gap left between an upper end surface of the partition wall and the substrate; an outer flow path in communication with the outer region, and configured to allow a heat transfer gas supplied to a space between the substrate and the mounting surface to flow therethrough; an inner flow path in communication with the inner region, and configured to allow the heat transfer gas to flow therethrough; and an annular diffusion portion configured to diffuse the heat transfer gas along a circumferential direction of the partition wall.

Abstract: Various embodiments of the present disclosure provide a method for forming a recessed gate electrode that has high thickness uniformity. A gate dielectric layer is deposited lining a recess, and a multilayer film is deposited lining the recess over the gate dielectric layer. The multilayer film comprises a gate electrode layer, a first sacrificial layer over the gate dielectric layer, and a second sacrificial layer over the first sacrificial dielectric layer. A planarization is performed into the second sacrificial layer and stops on the first sacrificial layer. A first etch is performed into the first and second sacrificial layers to remove the first sacrificial layer at sides of the recess. A second etch is performed into the gate electrode layer using the first sacrificial layer as a mask to form the recessed gate electrode. A third etch is performed to remove the first sacrificial layer after the second etch.

Abstract: The present invention relates to an organic electroluminescent material, an organic electroluminescent device, and a method for preparing the organic electroluminescent device. Due to comprising an organic compound A with 3.0 eV>ET?2.0 eV and a compound B of M(LA)x(LB)y(LC)z, the organic electroluminescent material of the present invention has the advantages of an increased luminescence lifetime and/or a reduced operating voltage on the basis of maintaining other electronic properties at a certain level.

Abstract: A display substrate includes a substrate (10) that is divided into a plurality of subpixel areas, a drive transistor (20) and a photodetector (30) in each of the plurality of subpixel areas, and an insulation layer (40) on the photodetector (30). The drive transistor (20) includes an electrode layer that includes a source electrode (21) and a drain electrode (22). The photodetector (30) is coupled to one of the source electrode (21) and the drain electrode (22). An entirety of an orthographic projection of the insulation layer (40) on the substrate is inside an orthographic projection of the electrode layer on the substrate (10).

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first metal layer over a substrate, forming a dielectric layer over the first metal layer. The method includes forming a trench in the dielectric layer, and performing a surface treatment process on a sidewall surface of the trench to form a hydrophobic layer. The hydrophobic layer is formed on a sidewall surface of the dielectric layer. The method further includes depositing a metal material in the trench and over the hydrophobic layer to form a via structure.

Abstract: The present specification relates to a heterocyclic compound represented by Formula 1, an organic electronic device including the heterocyclic compound in an organic active layer, and a method for manufacturing the organic electronic device.

Abstract: A solid-liquid-solid phase transformation (SLSPT) approach is used for fabrication of perovskite periodic nanostructures. The pattern on a mold is replicated by perovskite through phase change of perovskite from initially solid state, then to liquid state, and finally to solid state. The LED comprising perovskite periodic nanostructure shows better performance than that with flat perovskite. Further, the perovskite periodic nanostructure from SLSPT can be applied in many optoelectronic devices, such as solar cells, light emitting diodes (LED), laser diodes, transistors, and photodetectors.

Abstract: A radio frequency (RF) energy transmission line transition for coupling RF energy between a pair of RF transmission line sections disposed on intersecting surfaces of a corresponding one of a pair of conductive members, a first one of the pair of conductive members having a wall with a jog therein for receiving an end portion of a second one of the pair of conductive members, the end portion of an electrically conductive strip of the first one of the pair of radio frequency transmission line sections being disposed on, and electrically connected to, an electrically conductive strip of a second one of the pair of radio frequency transmission line sections.

Abstract: A method for manufacturing integrated IR (IR=infrared) emitter elements having an optical filter comprises back side etching through a carrier substrate, forming adhesive spacer elements on a conductive layer on the carrier substrate, placing a filter substrate having a filter carrier substrate and a filter layer on the adhesive spacer elements, fixing the adhesive spacer elements to the carrier substrate and the filter substrate by curing, pre-dicing through the filter substrate for exposing the contact pads of the structured conductive layer, and dicing through the frame structure in the carrier substrate for separating the integrated IR emitter elements having the optical filter.

Abstract: An x-ray detector can be small and have efficient cooling. In one embodiment, the x-ray detector can comprise a thermoelectric cooler (TEC) with upper electrical connections, a support, a cap, and a silicon drift detector (SDD). A planar side of the support can be directly affixed to upper electrical connections of the TEC. The support can have a non-planar side, opposite of the planar side, with a raised structure. A bottom face of the cap can be affixed to the raised structure, forming a cavity between the cap and the non-planar side of the support. The SDD can be affixed to a top face of the cap. In another embodiment, the non-planar side of the support can face the TEC. In another embodiment, a PIN photodiode can be directly affixed to a plate and the plate directly affixed to upper electrical connections of the TEC.

Abstract: The invention relates to a method for improving ohmic contact behaviour between a contact grid and an emitter layer of a silicon solar cell. The object of the invention is to propose a method for improving contact behaviour between the contact grid and the emitter layer of silicon solar cells, which method is used after the contacting of these solar cells and thus reduces the scrap quota of solar cells with faulty contacting. In order to achieve this object, a method is proposed which has the following method steps. First a silicon solar cell (1) is provided with the emitter layer, the contact grid (5) and a back contact (3). Then the contact grid (5) is electrically contacted by a contact pin matrix (8) or contact plate connected to one terminal of a current source and the back contact (3) is electrically connected by a contact device connected to the other terminal of the current source.

Abstract: A display panel includes a display substrate, an opposite substrate, and a hydrophobic bonding portion disposed between the display substrate and the opposite substrate. The hydrophobic bonding portion is configured to bond the display substrate and the opposite substrate together, and an orthographic projection of the hydrophobic bonding portion on the display substrate is located outside a display region of the display substrate.

Abstract: Disclosed herein are selector devices and related devices and techniques. In some embodiments, a selector device may include a first electrode, a second electrode, and a selector material between the first electrode and the second electrode. The selector material may include germanium, tellurium, and sulfur.

Abstract: The structure includes a semiconductor chip connected to a substrate via one or more solder balls. The semiconductor chip includes one or more on-chip metal winding. The structure includes a first ferromagnetic core. The first ferromagnetic core is located below the semiconductor chip and above the substrate. The structure includes a second ferromagnetic core. The second ferromagnetic core is located above the semiconductor chip. The first ferromagnetic core and the second ferromagnetic core create a magnetic loop.

Abstract: An electromagnetic shielding element and, transmission line assembly and electronic structure package using the same are provided. The electromagnetic shielding element is applied to the transmission line assembly and the electronic structure package to shield electromagnetic noise. The electromagnetic shielding element includes a quantum well structure, and the quantum well structure includes at least two barrier layers and at least one carrier confined layer located between the two barrier layers. Each barrier layer has a thickness between 0.1 nm and 500 nm, and the thickness of the carrier confined layer is between 0.1 nm and 500 nm. The electromagnetic shielding element absorbs electromagnetic wave noise to suppress electromagnetic interference.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to asymmetric source and drain structures and methods of manufacture. The structure includes: at least one gate structure; a straight spacer adjacent to the at least one gate structure; and an L-shaped spacer on a side of the at least one gate structure opposing the straight spacer, the L-shaped spacer extending a first diffusion region further away from the at least one gate structure than the straight spacer extends a second diffusion region on a second side away from the at least one gate structure.

Abstract: A quantum bit device according to the present invention includes a first quantum bit substrate 10 which includes a first superconductive wiring 13 disposed to have a magnetically coupled portion with a first superconductive magnetic flux quantum bit 14 on a surface thereof, a second quantum bit substrate 11 which includes a second superconductive wiring 13 disposed to have a magnetically coupled portion with a second superconductive magnetic flux quantum bit 14 on a surface thereof, and a base substrate 12 which includes a third superconductive wiring 13 configured by two superconductive wirings extending parallel to each other on a surface thereof.

Abstract: An array substrate, a manufacturing method thereof and a display panel. After a metal layer is formed on a substrate, a protective layer is formed on the metal layer.