Abstract: Methods, apparatuses, and systems related to semiconductor processing (e.g., of a capacitor support structure) are described. An example method includes patterning a surface of a semiconductor substrate to have a first silicate material, a nitride material over the first silicate material, and a second silicate material over the nitride material. The method further includes removing the first silicate material and the second silicate material and leaving the nitride material as a support structure for a column formed from a capacitor material. The method further includes performing supercritical drying on the column, after removal of the first and second silicate materials, to reduce a probability of the column wobbling relative to otherwise drying the column after the removal of the first and second silicate materials.
Abstract: A semiconductor sensor includes a detector chip that detects green light and an interference filter that optically precedes the detector chip and is permeable to green light and impermeable and reflective to red light and near-infrared radiation. A color filter optically precedes the interference filter. The color filter has a transparency of at least 60% for green light and has an absorbing effect for red light and near-infrared radiation. The semiconductor sensor appears gray or black in the region of the interference filter independently of the angle.
Type:
Grant
Filed:
June 13, 2018
Date of Patent:
September 7, 2021
Assignee:
OSRAM Opto Semiconductors GmbH
Inventors:
Daniel Dietze, Tim Boescke, Wolfgang Zinkl
Abstract: Systems and methods for performing non-destructive sensing of a cell or tissue, in vivo or in culture, are provided. The disclosed systems and methods include fabricating and powering one or more implantable integrated circuit (IC) chips that include a network of Photovoltaic (PV) cells for energy harvesting from an optical energy source, an optical modulator integrating Quantum Dot capacitors (QD-caps) for optical data transfer using fluorescence modulation, and sensing circuitry. The IC chip disclosed herein can measure a thickness of around 10 ?m, allowing injection into small cells and diffusion through tissue, it is powered and imaged under a microscope and communicates using fluorescence modulation imaged under a microscope.
Type:
Grant
Filed:
July 20, 2018
Date of Patent:
September 7, 2021
Assignee:
THE TRUSTEES OF COLUMBIA UNIVERSITY IN THE CITY OF NEW YORK
Abstract: A display device includes a flexible substrate including a first surface and a second surface facing the first surface; a TFT array layer provided on the first surface; a display element layer provided on the TFT array layer; a first heat releasing layer provided on the second surface; a first protective layer provided on the same side as the second surface; a second heat releasing layer provided on the display element layer; and a second protective layer provided on the display element layer. The second heat releasing layer has a light transmittance of 90% or higher.
Abstract: A package module includes a core structure including a dummy member, one or more electronic components disposed around the dummy member, and an insulating material covering at least a portion of each of the dummy member and the electronic components, the core structure including a first penetration hole passing through the dummy member and the insulating material, a semiconductor chip disposed in the first penetration hole and having an active surface on which a connection pad is disposed and an inactive surface, an encapsulant covering at least a portion of each of the core structure and the semiconductor chip and filling at least a portion of the first penetration hole, and a connection structure disposed on the core structure and the active surface and including a redistribution layer electrically connected to the electronic components and the connection pad.
Abstract: A method of manufacturing a semiconductor device is disclosed. In the method, a metallic layer is formed over a substrate, the metallic layer is surface-treated with an alkaline solution, and a bottom anti-reflective coating (BARC) layer is formed on the surface-treated metallic layer.
Abstract: Provided is a method for forming a semiconductor structure. In embodiments of the invention, the method includes laterally forming a spacer on a side of the semiconductor structure. The method further includes performing a thermal anneal on the semiconductor structure. The method further includes performing an etch to remove materials formed by the thermal anneal.
Abstract: The present invention provides a switching component of a directly flat-attached active frequency selective surface (AFSS) and fabricating method thereof. The present invention utilizes P-type and N-type thin film materials to fabricate a PN diode switching component capable of adjusting a resonance frequency of the AFSS, such that the AFSS together with the switching component could be integrally fabricated into a single thin film. Therefore, by utilizing a stepwise coating method to fabricate each layer with corresponding material, an equivalent length of a metal pattern could be adjusted, thereby changing the resonance frequency of the AFSS.
Type:
Grant
Filed:
December 5, 2019
Date of Patent:
July 6, 2021
Assignee:
National Chung-Shan Institute of Science and Technology
Inventors:
Jian-Long Ruan, Shyh-Jer Huang, Yang-Kuo Kuo
Abstract: Reliability of a semiconductor module is improved. In a resin mold step of assembly of a semiconductor module, an IGBT chip, a diode chip, a control chip, a part of each of chip mounting portions are resin molded so that a back surface of each of the chip mounting portions is exposed from a back surface of a sealing body. After the resin molding, an insulating layer is bonded to the back surface of the sealing body so as to cover each back surface (exposed portion) of the chip mounting portions, and then, a TIM layer is bonded to an insulating layer. Here, a region of the TIM layer in a plan view is included in a region of the insulating layer.
Abstract: The present invention relates to an adhesive film having a thixotropic index at 110° C. of 1.5 to 7.5, which is used for fixing a first semiconductor device and a second semiconductor device, a ratio of an area of said first semiconductor device to an area of said second semiconductor device being 0.65 or less, a method for preparing a semiconductor device using the adhesive film, and a semiconductor device.
Type:
Grant
Filed:
September 23, 2016
Date of Patent:
June 1, 2021
Assignee:
LG CHEM, LTD.
Inventors:
Jung Hak Kim, Hee Jung Kim, Se Ra Kim, Kwang Joo Lee, Young Kook Kim, Seung Hee Nam
Abstract: The present disclosure relates to a method for forming a p-metal work function nitride film having a desired p-work function on a substrate, including: adjusting one or more of a temperature of a substrate, a duration of one or more temporally separated vapor phase pulses, a ratio of a tungsten precursor to a titanium precursor, or a pressure of a reaction to tune a work function of a p-metal work function nitride film to a desired p-work function, and contacting the substrate with temporally separated vapor phase pulses of the tungsten precursor, the titanium precursor, and a reactive gas to form a p-metal work function nitride film thereon having the desired p-work function.
Type:
Grant
Filed:
April 11, 2019
Date of Patent:
May 25, 2021
Assignee:
APPLIED MATERIALS, INC.
Inventors:
Guoqiang Jian, Wei Tang, Chi-Chou Lin, Paul Ma, Yixiong Yang, Mei Chang, Wenyi Liu
Abstract: A fin field-effect transistor (fin-FET) includes a substrate having a plurality of discrete fin structures thereon; a chemical oxide layer on at least a sidewall of a fin structure; a doped layer containing doping ions on the chemical oxide layer; and a doped region in the fin structure containing doping ions diffused from the doping ions in the doped layer.
Type:
Grant
Filed:
May 3, 2019
Date of Patent:
May 11, 2021
Assignees:
Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
Abstract: One silicon MOSFET transistor, which is used as the VThreshold control, and a GaN power HEMT are integrated on a single die to enable a fully integrated depletion-mode power device. GaN area is created on a silicon substrate and GaN FETs are built in the GaN area. Outside of the GaN area, silicon transistors such as switch MOSFETs are built. Front end of line or back end of line metal connections are then made to create interconnections among the GaN FET and the silicon transistor. The short physical proximity of the silicon transistor and GaN HEMT significantly reduces the parasitic resistance and inductance between them. Thus, high speed signals are able to travel from the silicon transistor to the GaN HEMT with a higher frequency and lower distortion, without creating overshoot voltage when there is large parasitic inductance. Therefore, the cascode device can operate at a higher switching frequency.
Type:
Grant
Filed:
March 15, 2019
Date of Patent:
April 27, 2021
Assignee:
International Business Machines Corporation
Abstract: Embodiments include a method for forming a carbon containing film. In an embodiment, the method comprises flowing a precursor gas into a processing chamber. For example the precursor gas comprises carbon containing molecules. In an embodiment, the method further comprises flowing a co-reactant gas into the processing chamber. In an embodiment, the method further comprises striking a plasma in the processing chamber. In an embodiment plasma activated co-reactant molecules initiate polymerization of the carbon containing molecules in the precursor gas. Embodiments may also include a method that further comprises depositing a carbon containing film onto a substrate in the processing chamber.
Type:
Grant
Filed:
April 3, 2019
Date of Patent:
April 20, 2021
Assignee:
Applied Materials, Inc.
Inventors:
Lakmal Charidu Kalutarage, Mark Saly, David Thompson, William John Durand, Kelvin Chan, Hanhong Chen, Philip Allan Kraus
Abstract: The present disclosure provides a light-emitting apparatus comprising a board having a plurality of first metal contacts and a plurality of second metal contacts on a top surface; a plurality of LEDs being bonded to the board, the each of the LEDs comprising a first cladding layer on the substrate, an active layer on the first cladding layer, a second cladding layer on the active layer, an upper surface on the second cladding layer, a first metal layer, and a second metal layer, wherein the first metal layer and the second metal layer are between the active layer and the board; an opaque layer between the adjacent LEDs and comprising a polymer mixed with a plurality of inorganic particles; and an encapsulating layer on the upper surfaces and opposite to the board, wherein the encapsulating layer does not cover a side wall of the active layer; and an underfill material between the board and the plurality of LEDs, wherein the underfill material surrounds each of the first metal layer and the second metal layer.
Abstract: The present invention relates to an electrode assembly comprising nano-scale-LED elements and a method for manufacturing the same and, more specifically, to an electrode assembly comprising nano-scale-LED elements and a method for manufacturing the same, in which the number of nano-scale-LED elements included in a unit area of the electrode assembly is increased, the light extraction efficiency of individual nano-scale-LED elements is increased so as to maximize light intensity per unit area, and at the same time, nano-scale-LED elements on a nanoscale are connected to an electrode without a fault such as an electrical short circuit.
Abstract: A method of manufacturing a flexible device includes joining a first surface of a support substrate to a back surface of a flexible substrate, the first surface being opposite to a second surface of the support substrate; forming an element layer on a front surface of the flexible substrate; and performing multidirectional oblique irradiation of an interface and its vicinity between the support substrate and the flexible substrate with laser light from the second surface of the support substrate to detach the support substrate from the flexible substrate.
Abstract: The present specification relates to a multicyclic compound and an organic light-emitting device including the same. The multicyclic compound of Chemical Formula 1 used in one or more organic material layers of the organic light emitting device provides enhanced efficiency, decreased driving voltage and enhanced lifespan property of the organic light emitting device.
Type:
Grant
Filed:
July 27, 2017
Date of Patent:
March 23, 2021
Assignee:
LG CHEM LTD.
Inventors:
Yongbum Cha, Sang Young Jeon, Sung Jae Lee, Sung Kil Hong
Abstract: A useful layer is layered onto a support by a method that includes the steps of forming an embrittlement plane by implanting light elements into a first substrate, so as to form a useful layer between such plane and one surface of the first substrate; applying the support onto the surface of the first substrate so as to form an assembly to be fractured; applying a heat treatment for embrittling the assembly to be fractured; and initiating and propagating a fracture wave into the first substrate along the embrittlement plane. The fracture wave is initiated in a central area of the embrittlement plane and the propagation speed of the wave is controlled so that the velocity thereof is sufficient to cause the interactions of the fracture wave with acoustic vibrations emitted upon the initiation and/or propagation thereof, if any, are confined to a peripheral area of the useful layer.
Type:
Grant
Filed:
August 1, 2017
Date of Patent:
March 16, 2021
Assignees:
Soitec, COMMISSARIAT Á L'ÈNERGIE ATOMIQUE ET AUX ÉNERGIES ALTERNATIVES
Abstract: A method for manufacturing a semiconductor device includes forming a hardmask layer on a substrate, and patterning the hardmask layer into a plurality of hardmask portions. The method also includes forming a liner layer on the plurality of hardmask portions, and removing a portion of the liner layer from at least one hardmask portion of the plurality of hardmask portions. The removing exposes one or more surfaces of the at least one hardmask portion. In the method, the at least one hardmask portion and a remaining portion of the liner layer are removed. A pattern of remaining ones of the plurality of hardmask portions are transferred to the substrate to form one of a plurality of patterned substrate portions and a plurality of openings in the substrate.
Type:
Grant
Filed:
April 3, 2019
Date of Patent:
March 9, 2021
Assignee:
International Business Machines Corporation
Inventors:
Juntao Li, Kangguo Cheng, ChoongHyun Lee