Abstract: Disclosed are techniques regarding aspects of implementing client configurable logic within a computer system. The computer system can be a cloud infrastructure. The techniques can include associating clock information with the client configurable logic for various purposes.

Abstract: A storage system that includes an in-line hardware accelerator, a solid-state drive (SSD) unit, a central processing unit (CPU), a volatile memory module, and an accelerator memory module that is coupled to the in-line hardware accelerator or belongs to the in-line hardware accelerator; wherein the in-line hardware accelerator is directly coupled to the SSD unit, the volatile memory and the non-volatile memory; wherein the CPU is directly coupled to the volatile memory and to the non-volatile memory; wherein the in-line hardware accelerator is configured to manage access to the SSD unit; wherein the in-line accelerator is configured to retrieve data stored in the volatile memory module and the non-volatile memory module without involving the CPU.

Abstract: The computer system responds to a first trigger event to enter a partial off state in which a boot cycle is required to return to a working state. A device plugged into a serial bus port can be charged in the partial off state. A configuration register or runtime environment controls whether the computer system enters the partial off state in response to a trigger event. The computer system stays in the partial off state until another trigger event returns the computer system to the working state. In some implementations, the computer system leaves the partial off state and enters the shutdown state after an unplug event, a predetermined amount of time after an unplug event, a predetermined amount of time after entering the partial off state, a predetermined amount of time after charging of a device is complete, or any combination of such events.

Abstract: A universal serial bus power-supplying apparatus with power-switching functions includes a power convertor, a power delivery communication controller and a plurality of switch units. The power delivery communication controller calculates a first communication time between the universal serial bus power-supplying apparatus and a first electronic apparatus. The power delivery communication controller calculates a second communication time between the universal serial bus power-supplying apparatus and a second electronic apparatus. The universal serial bus power-supplying apparatus utilizes a time difference between the first communication time and the second communication time to switch the switch units to supply power to the first electronic apparatus and the second electronic apparatus.

Abstract: The present disclosure provides a system and method for dynamically defining a specific input pin of a management controller (e.g., a baseboard management controller (BMC)) of a server system in response to a new device being plugged into the server system. The new device comprises one of a power supply unit (PSU), an automatic transfer switch (ATS), or a battery backup unit (BBU) of the server system. In some implementations, the PSU, the ATS, and the BBU are modularized into a plurality of ATS modules, a plurality of PSU modules, and a plurality of BBU modules, respectively. Each of the plurality of ATS modules, the plurality of PSU modules, and the plurality of BBU modules has substantially the same physical size.

Abstract: An electronic system includes a serial system bus interface having a root complex and an end point, a command bus and a data bus coupled to the serial system bus interface, a memory device coupled to the data bus, and a direct memory access (DMA) controller coupled to both the command bus and the data bus to directly access the memory device in response to request commands which are transmitted from the root complex to the end point. The DMA controller includes a command queue in which the request commands stand by.

Abstract: A system includes a bus system to connect a number of components in a chain-like structure. A first control device (e.g., microcontroller or microprocessor) is configured to control the components in a first mode of the system. A second control device (e.g., microcontroller or microprocessor) is configured to control a first subset of the components in a second mode of the system.

Abstract: Embodiments are generally directed to providing power savings for a neural network architecture with zero activations during inference. An embodiment of an apparatus includes one or more processors including one or more processor cores; and a memory to store data for processing including neural network processing, wherein the apparatus to perform a fast clear operation to initialize activation buffers for a neural network by updating metadata to indicate zero values, the neural network including a plurality of layers, wherein the apparatus is to compare outputs for the neural network to the metadata values and to write an output to memory only if the output is non-zero.

Abstract: Many devices may comprise interfaces, such as serial interfaces, over which configuration and/or enablement/disablement of device features may be provided to the device. Connecting a computer to individual devices for manual configuration may be cumbersome and/or time consuming. Accordingly, as provided herein, a device interfacing component (e.g., a microcontroller integrated into an interface cable) is configured to couple to a target device. The device interfacing component may receive data streams from the target device, and may match strings, within the data streams, to expressions. If a string matches an expression (e.g., “F5 for IP setup”), then a corresponding scripted response may be executed to send a response instruction (F5, wait 10 seconds, enter key, “192,168.0.1”) to the target device.

Abstract: According to an aspect of the disclosure, a resource management platform, system and method of communicating resource management information for smart energy and media resources is provided. A resource management platform can include an interface configured to communicate media management information and energy management information. The resource management platform also includes a processor configured to detect an incoming communication to alter an operating condition in response to receiving the media management information or the energy management information. The processor can further be configured to initiate an output of media content in response to detecting media management information, and initiate altering an operating status of a device in response to detecting the energy management information. The processor can also initiate storing at least a portion of the media content and the energy management information within a memory.

Abstract: A device includes a receiver to receive one or more training sequences during a training of a link, where the link connects two devices. The device may include agent logic to determine, from the one or more training sequences, a number of extension devices on the link between the two devices, and determine that the number of extension devices exceeds a threshold number. The device may include a transmitter to send a plurality of clock compensation ordered sets on the link based on determining that the number of extension devices exceeds a threshold number.

Abstract: A method is disclosed for configuring a medical imaging device. In at least one embodiment, the method includes providing an input data set specifying a clinical task, the input data set including quantified image requirements; transferring the input data set to a server; providing a configuration data set by the server depending on the input data set; transferring the configuration data set from the server to the medical imaging device within a defined time interval; and configuring the medical imaging device based on the configuration data set.

Abstract: A method and apparatus are provided for automatic routing of messages in a data processing system. An incoming message at an input/output (I/O) interface of the data processing system includes a message identifier and payload data. Match information, including an indicator or whether the message identifier of the incoming message matches an identifier of a request in a receive queue (RQ), is used to determine a destination for the incoming message. The incoming message is forwarded to the determined destination. Information, such as payload size and RQ position, may be used to determine allocation of the payload within a cache or cache hierarchy.

Abstract: A processing unit has a working memory. A direct memory access control unit includes a terminal connecting the direct memory access control unit to a bus system that connects the processing unit to the working memory and is configured to: read in, from at least two information blocks stored in the working memory and provided by the processing unit for transmission to a communication module connected to the bus system, pieces of control information characterizing respective priorities of the respective information blocks for the transmission to the communication module; ascertain a sequence for the transmission based on the respective priorities; and transmit the information blocks from the working memory to the communication module according to the ascertained sequence using a direct memory access from the working memory to the communication module.

Abstract: Systems, methods, and devices for identifying characteristics of communication cable are described. For example, a connector of a communication cable may include a set of pins. When the connector is plugged into an active device such as a transceiver, a pattern of the set of pins may be determined. This pattern may be associated with a characteristic of the communication cable (e.g., manufacture, manufacturing date, etc.).

Abstract: Systems, apparatuses, and methods for routing traffic between clients and system memory are disclosed. A computing system includes system memory and one or more clients, each capable of generating memory access requests. The computing system also includes a communication fabric for transferring traffic between the clients and the system memory. The fabric includes master units for interfacing with clients and grouping write requests with a same target together. The fabric also includes slave units for interfacing with memory controllers and for sending a single write response when each write request in a group has been serviced. When the master unit receives the single write response for the group, it sends a respective acknowledgment response for each of the multiple write requests in the group to clients that generated the multiple write requests.

Abstract: A data storage device waking up from a sleep mode rapidly is disclosed. The data storage device uses a controller to operate a non-volatile memory. The controller has a microprocessor and a volatile memory. The microprocessor loads boot code from the non-volatile memory to a not-always-on area of the volatile memory according to a script loaded on an always-on area of the volatile memory. The microprocessor executes the boot code loaded on the not-always-on area to load an in-system program from the non-volatile memory to the not-always-on area for execution of the in-system program.

Abstract: On-die termination (ODT) control enables programmable ODT latency settings. A memory device can couple to an associated memory controller via one or more buses shared by multiple memory devices organized ranks of memory. The memory controller generates a memory access command for a target rank. In response to the command, memory devices can selectively engage ODT for the memory access operation based on being in the target rank or a non-target rank, and based on whether the access command includes a Read or a Write. The memory device can engage ODT in accordance with a programmable ODT latency setting. The programmable ODT latency setting can set different ODT timing values for Read and Write transactions.

Abstract: The disclosure relates to technology for generating multi-phase signals. An apparatus includes 2{circumflex over (?)}n phase signal generation stages. The apparatus also includes a controller configured to provide a mode input of each of the 2{circumflex over (?)}n stages with an active periodic binary signal with remaining inputs of each of the 2{circumflex over (?)}n stages provided with another periodic binary signal to collectively generate a 2{circumflex over (?)}n phase signal in a first mode.

Abstract: A method is provided that inputs/outputs security information to/from an electronic device. The security information inputting method includes sensing a motion for inputting security information by a sensor module; creating an interrupt according to the security information inputting motion; and reading the security information by a security information inputting module, in response to the interrupt.