Abstract: A communication apparatus having power saving mode includes memory circuit unit and DMA module. The memory circuit unit is used for storing instruction and data information to be executed by microcontroller (or control circuit) of communication apparatus, and the DMA module is used to backup the instruction and data information and store such information into a memory of an electronic device when the communication apparatus receives a broadcast synchronization signal periodically sent from another communication device. During the power saving mode, the memory circuit unit is powered down. When leaving the power saving mode, the memory circuit unit is powered on, and the DMA module retrieves the instruction and data information from the memory of the electronic device and write such information into the memory circuit unit.

Abstract: The present application discloses a system level integrated circuit chip, comprising a fixed logic module and a Programmable Logic Module; the fixed logic module comprising a CPU module, a non-volatile memory module, a high speed data transmission module, an analogue-to-digital and/or digital-to-analogue conversion module; the Programmable Logic Module comprising a user-defined field programmable gate array and a programmable control module; the CPU module is interconnected with the user-defined field programmable gate array and the programmable control module; the non-volatile memory is interconnected with the user-defined field programmable gate array and the programmable control module; the analogue-to-digital and/or digital-to-analogue conversion module are connected with the user-defined field programmable gate array; and the high speed data transmission module is interconnected with the user-defined field programmable gate array.

Abstract: A Multi-Chip-Module (MCM) includes an MCM substrate and at least a data producing IC (DPIC) and a data-consuming IC (DCIC), both mounted on the MCM substrate and connected to one another through a high-speed bus having a fixed data rate. The DPIC is configured to send data to the DCIC by alternating between (i) first time periods during which the DPIC sends over the bus both produced data and dummy data that together have the fixed data rate of the bus, and (ii) second time periods during which the DPIC sends over the bus only dummy data at the fixed data rate, wherein a rate of the produced date and durations of the first time periods and the second time periods, are preset.

Abstract: In embodiments, at least one computer-readable medium (CRM) includes a plurality of instructions to cause a computing device, in response to execution of the instructions, to operate a power manager to: receive a request from a first operating system (OS) of a virtualized execution environment (VEE) of the computing device to suspend a first input/output (I/O) device of the computing device. The computing device has a plurality of I/O ports for receiving a plurality of I/O devices including the first I/O device. The plurality of I/O ports are virtualized for a plurality of OSes of the VEE, including the first OS. In response to the receipt, the power manager conditionally suspends the first I/O device if no other guest OS of the VEE is using the first I/O device. Other embodiments are also described and claimed.

Abstract: A method and circuit for waking up an I2C device are disclosed. The method includes determining whether a start signal is received; determining whether a next signal immediately received after the start signal is an address signal when the start signal is received; matching the next signal immediately received after the start signal with an address of the I2C device when the next signal is the address signal; and generating a wake-up signal to wake up the I2C device when the next signal immediately received after the start signal is matched with the address of the I2C device.

Abstract: Embodiments for managing High-Definition Multimedia Interface (HDMI) data. HDMI data received by at least one of a second HDMI connector of an HDMI device and the processor of the HDMI device is transmitted to a first HDMI connector of the HDMI device according to each of a plurality of modes of operation. A switching operation between the plurality of modes of operation is automatically performed based on a time schedule programmed by a user notwithstanding a priority signal embedded within the HDMI data received at the second HDMI connector or the processor is configured to override the time schedule to initiate the switching.

Abstract: A USB hub and an operating method thereof are provided. The USB hub includes a first USB connector coupled to a first device, a second USB connector coupled to a second device, a first power switch, a second power switch, a power converter, and a third power switch. The first power switch has a first end coupled to a power pin of the first USB connector. The second power switch has a first end coupled to a second end of the first power switch, and a second end coupled to a power pin of the second USB connector. The power converter has an input coupled to the second end of the first power switch. The third power switch has a first end coupled to an output of the power converter, where a second end of the third power switch is coupled to the power pin of the second USB connector.

Abstract: Optimized bus powered peripheral battery charging includes a circuit to initiate a change in an advanced configuration and power interface (ACPI) state in a controller allowing charging of a peripheral device battery, the circuit including a signal converter coupled between an input port and the controller to sense when a the peripheral device battery is coupled to an input port and to restrict the controller from changing ACPI state multiple times for a given peripheral device battery coupling; and a ground loop detector coupled in parallel to the signal converter between the input port and the controller to allow the controller to know that the peripheral device battery has maintained being coupled to the input port.

Abstract: Disclosed herein are system, apparatus, article of manufacture, method and/or computer program product embodiments, and/or combinations and sub-combinations thereof, for automatically determining the functionality and capabilities of electronic components. Some embodiments operate by transmitting a command to the display device in question (sometimes called the device under test—DUT—herein) and monitoring the device. Then, it is determined whether an action by the display device was one of a set of proper responses to the command. If the action was proper, then it is determined that the display device supports the command set associated with the command. The command set may be the Consumer Electronics Control (CEC) set, although this disclosure is not limited to that example.

Abstract: A computing system comprising a portable computer and a reader are disclosed. The portable computer is pocket-sized and comprises flash memory, and optionally a processor and a GPS chip. The reader includes a monitor, a keyboard with docking port and an optional processor and at least one input/output USB connector. A user cannot interact with the portable computer without the reader. The reader is a non-functioning “shell” without the portable computer, however, when they are connected the system becomes a fully functional personal computer. To log on, a user provides security information, for example, a password or biometrics, such as fingerprints. The credit card size and capabilities of the portable computer allows a user to easily carry virtually their entire computer in a pocket for use anywhere there is a reader. In addition, the portable computer provides security against unauthorized use, even if lost or stolen.

Abstract: Various embodiments of methods and systems for a modem-directed application processor boot flow in a portable computing device (“PCD”) are disclosed. An exemplary method includes an application processor that transitions into an idle state, such as a WFI state, for durations of time during a boot sequence that coincide with processing by a DMA engine and/or crypto engine. That is, the application processor may “sleep” while the DMA engine and/or crypto engine process workloads in response to instructions they received from the application processor.

Abstract: A first command is scheduled on a command bus, where the first command requires use of a data bus resource at a first time period after scheduling the first command. Prior to the first time period, a second command is identified according to a scheduling policy. A determination is made whether scheduling the second command on the command bus will cause a conflict in usage of the at least one data bus resource. In response to determining that scheduling the second command will cause the conflict in usage, a third lower-priority command is identified for which scheduling on the command bus will not cause the conflict in usage. The third command is scheduled on the command bus prior to scheduling the second command, even though it has lower priority than the second command.

Abstract: Described herein are several embodiments relating to modular irrigation controllers. In many implementations, the irrigation controllers are modular in that various functional components of the irrigation controller are implemented in removable modules that when inserted into position within the controller, expand the capabilities of the controller. Also described are various different types of expansion modules that may be coupled to the modular controller, having as variety of functions and features, as well as related methods of use and configuration of these modules in the controller. In some embodiments, a serial communication bus is provided between a control unit of a modular irrigation controller and an expansion module.

Abstract: Embodiments are described for recovery, via a sideband management bus, of firmware of a device such as an FPGA (Field Programmable Gate Array) card installed within an IHS (Information Handling System). A remote access controller of the IHS generates a security key for the device and transmits it to the device. The remote access controller requests the device to report the current version of the firmware in use by the device. The response from the device is authenticated based on the security key. If the current firmware version reported by the device is consistent with the master firmware version, the device is halted and the current firmware of the device is replaced with the master firmware. The device is initialized based on the master firmware used to update the device firmware.

Abstract: An apparatus for data transfer includes a first node connected to a bus to communicate bidirectionally, and second nodes connected in series to the bus. Each second node lacks an internal clock and has fixed pads including a power, a ground, and signal pads to transfer a data frame, return data pads for a return signal, select pads for a selection signal and clock pads for a clock signal. Each second node is indexed by a hop count in the frame that is incremented each time the frame is transferred in topological order. Each second node is selectable using a mode defined by a combination of the hop count, a mask field and an address field in the frame. The signal pads are used for frame transfer in a selected mode controlled by a combination of the selection, clock and return signals.

Abstract: A data storage device waking up from a sleep mode rapidly is disclosed. The data storage device uses a controller to operate a non-volatile memory. The controller has a microprocessor and a volatile memory. The microprocessor loads boot code from the non-volatile memory to a not-always-on area of the volatile memory according to a script loaded on an always-on area of the volatile memory. The microprocessor executes the boot code loaded on the not-always-on area to load an in-system program from the non-volatile memory to the not-always-on area for execution of the in-system program. The script loaded on the always-on area is loaded from the non-volatile memory, and the non-volatile memory is searched to load the script to the always-on area in response to powering on a data storage device containing the non-volatile memory from a power-off state.

Abstract: A method for restricting write access to a non-volatile memory. The method includes receiving a request to write to a protected location in the non-volatile memory and determining whether the protected location is in a write-protected state. If the protected location is not in a write-protected state, the method includes writing data indicated by the request to the protected location. If the protected location is in a write-protected state, the method includes rejecting the request. The protected location stores a validation key to validate the contents of another portion of the non-volatile memory.

Abstract: A method and system for visualizing sleep mode inner state processing are provided. In one embodiment, a method is provided that is performed in a computing device in communication with a storage system comprising a memory. The method comprises receiving information from the storage system concerning a number and duration of tasks performed by the storage system to exit a sleep mode; and displaying a visualization of the information. Other embodiments are provided.

Abstract: The invention introduces a method for executing host input-output (IO) commands, performed by a processing unit of a device side, at least including: in response to different types of host IO commands, using multiple stages of a generic framework to drive a frontend interface to interact with a host side for transmitting user data read from a storage unit to the host side, and receiving user data to be programmed into the storage unit from the host side.

Abstract: A method for operating a media agnostic universal serial bus (MAUSB) device includes a compute device having a link connection manager, a USB manager, and a state manager. The compute device establishes a link with a MAUSB device and a session with the MAUSB device. Subsequently to receipt of a sleep command for the compute device, the compute device transitions to a sleep state and terminates the link with the MAUSB device while keeping intact the session with the MAUSB device. The compute device transitions back to an active state in response to receipt of a wake command for the compute device. The compute device sends a wake request to the MAUSB device. If the MAUSB device responds to the wake request with an acceptance, then the compute device reestablishes the previous session with the MAUSB device. If instead an error is received, the compute device terminates the session.