Abstract: A method for forming field isolation regions in multilayer semiconductor devices comprises the steps of masking active regions of the substrate, forming porous silicon in the exposed field isolation regions, removing the mask and oxidizing the substrate. A light ion impurity implant is used to create pores in the substrate. Substrate oxidation proceeds by rapid thermal annealing because the increased surface area of the pores and the high reactivity of unsaturated bonds on these surfaces provides for enhanced oxidation.

Abstract: A method provides a recessed isolation is provided in a semiconductor substrate by (a) growing a first field oxide, (b) selectively removing portions of the first field oxide to leave recessed areas in the semiconductor substrate, and (c) growing a second field oxide from the recessed areas in a controlled manner, so that the surface of the semiconductor substrate is substantially planar. In one embodiment, nitride spacers are provided to limit lateral encroachment by the second field oxide from encroaching the active areas of the semiconductor substrate.

Abstract: A method of forming shallow trenches in a semiconductor substrate is provided. This method allows the thus-formed trenches to be shaped with a rounded top corner having a desired radius of curvature in accordance with actual requirements. From experiments, it is learned that the radius of curvature of the top corners of the trenches decreases linearly with the depth of a pre-trench formed by over-etching in the substrate. The relationship between radius of curvature and depth of pre-trench can be pre-established by experimentation. After that, the top corners of the shallow trenches in the substrate can be controlled to be shaped with a desired radius of curvature by adjusting the depth of the pre-trench based on the pre-established linear relationship.

Abstract: A method for forming a microelectronic structure includes the steps of forming a mask layer on a substrate, forming a trench in the exposed portion of the substrate, forming a layer of an insulating material which fills the trench and covers the mask layer, and annealing the insulating material at a temperature of at least about 1,150.degree. C. The annealing step can be performed for a period of time of about .5 hours to about 8 hours, and the annealing step can be performed in an inert atmosphere.

Abstract: There is disclosed a method for making a field oxide, by which wafer warpage is minimized when a local oxidation of silicon process is applied for a large wafer. A material layer having a compressive stress and a nitride are laminated over the back side of a wafer, so that the compressive stress of the material layer complementarily interacts with the tensile stress of the nitride.

Abstract: A polysilicon film is deposited in a trench formed in a silicon element substrate. The polysilicon film in the trench and on the silicon element substrate is anisotropically etched, so that the film remains on the side wall of the trench. The polysilicon film on the side wall is oxidized to obtain an insulating film, which buries the trench. At the same time, an oxidized film is formed on the surface of the silicon element substrate to complete a trench-mold separation area.

Abstract: In the manufacture of semiconductor devices on a single substrate, said devices comprising a source region, a drain region and a gate therebetween, forming an isolation region after formation of the gate between said devices, thereby reducing required tolerances between devices and rows of devices and minimizing space requirements on the substrate for the array. A conventional isolation region between adjacent devices can be formed first, the layers comprising the gate deposited, the gate formed by etching through the layers, and a second isolation region between rows of devices formed after the gate etch. This reduces the built-in tolerances required between rows of devices, and reduces the spacing requirements between the rows.

Abstract: A method for forming a gap in a silicon layer is described. A silicon layer is formed over a substrate. A nitride layer is formed over the silicon layer and an oxide layer is formed over the silicon layer, adjacent to the nitride layer. A portion of the oxide layer is then removed to form an exposed region of the silicon layer. Then an etchant is applied to the exposed region to form an gap of the silicon layer.

Abstract: A process for fabricating an improved planar field oxide (FOX) structure on a silicon substrate was achieved. The process involves forming recessed areas in the silicon substrate where the field oxide is require. A thin silicon oxide is formed on the surface of the recessed areas as a nucleation layer and then a thicker silicon oxide layer is selectively deposited in the recess areas by Liquid Phase Deposition (LPD). The planar FOX structure formed by LPD can be used in conjunction with a FOX structure formed by the conventional LOCal Oxidation of Silicon (LOCOS) process on the same substrate. The planar field oxide formed by LPD eliminates the bird beak structure and the lateral diffusion of the channel stop implant commonly associated with the LOCOS structure.

Abstract: A method for forming an isolation region of a semiconductor device to improve isolation characteristics between semiconductor devices. A first insulating layer is formed on a substrate, and a second insulating layer is formed on the first insulating layer. A field region of the substrate is defined by selectively removing the second insulating layer. A portion of the surface of the substrate is then exposed by selectively removing the first insulating layer using the second insulating layer as a mask. A third insulating layer is formed on the exposed portion of the substrate. Then insulating sidewalls are formed on sides of the first and second insulating layers. Next, a trench is then formed in the substrate using the second insulating layer and the insulating sidewalls as masks. Finally, a field oxide layer is formed in the trench to isolate semiconductor devices.

Abstract: A technique of bonding a thin wafer layer to a substrate. The wafer is blown dry using an inert gas to prevent it from being damaged, while still ensuring that it dries completely. The initial bonding is done by orienting crystallographic axes, and then allowing the wafers to adhere to one another slowly. The contact wave is prevented from spreading, by a divider between the two wafers. The wafers are allowed to adhere to one another slowly to form a bond. The bond is strengthened by annealing.

Abstract: A method for preparing a semiconductor member comprises process of making a porous Si substrate and then forming a non-porous Si monocrystalline layer on the porous Si substrate; primary bonding process of bonding the porous Si substrate and an insulating substrate via the non-porous Si monocrystalline layer; etching process of etching the porous Si to remove the porous Si by chemical etching after the primary bonding process; and secondary bonding process of strengthening the primary bonding after the etching process.

Abstract: A process for forming field oxide on a semiconductor substrate having reduced field oxide thinning comprises forming of an oxide layer over a semiconductor substrate, and forming a protective layer over the oxide layer. A mask is formed over the protective layer thereby forming exposed and covered regions of the protective layer. The exposed portions of the protective layer are removed to form at least first, second, and third disconnected protective structures, wherein the distance between the first and second protective structures is smaller than the distance between the second and third protective structures. The oxide layer and a portion of the substrate between the protective structures is removed to expose a portion of the substrate. A blanket polycrystalline silicon (poly) layer is formed over the substrate, and the poly layer is isotropically etched to remove the poly from between the second and third protective structures and leave a portion of the poly between the first and second structures.

Abstract: Methods of forming field oxide isolation regions in a semiconductor substrate include the steps of exposing residual polysilicon defects contained within preliminary field oxide isolation regions and then performing a cleaning step to etch and reduce the size of the exposed defects (or eliminate the defects altogether). The preliminary field oxide isolation regions are then oxidized to preferably convert any remaining polysilicon defects into silicon dioxide and then a final oxide etching step is performed to define the shapes of the final field oxide isolation regions. Preferably, a pad oxide layer is formed on a face of a semiconductor substrate and then a masking layer is formed on the pad oxide layer, opposite the face of the substrate. The masking layer is then patterned to define an opening therein which exposes an upper surface of the pad oxide layer.

Abstract: The present invention provides a method of manufacturing a high nitrogen (N) content oxynitride layer 34A 34B over field oxide regions. The oxynitride layer 34A 34B prevents subsequent etches from forming recesses in the field oxide regions 30 and planarizes the surface. The method begins by forming a field oxide region 30 an isolation area in the substrate 22. A high N content oxynitride protection layer 34A 34B (an etch barrier) is then formed surrounding (over and under) the field oxide layer 30. The high N content oxynitride protection layer 34A 34B is formed by heating (e.g., annealing) the substrate in a gas environment comprising ammonia. The high N content oxynitride layer is preferably formed by rapidly thermally annealing the substrate at temperature between about 825.degree. and 875 .degree. C. in an ammonia containing environment with a partial pressure of between about 0.5 and 1.2 kg/cm.sup.2 .

Abstract: A method for filling a trench within a substrate. There is first providing a substrate having a trench formed within the substrate. There is then formed over the substrate and within the trench a gap filling silicon oxide trench fill layer. The gap filling silicon oxide trench fill layer is formed through an ozone assisted sub-atmospheric pressure thermal chemical vapor deposition (SACVD) method. The method employs an ozone oxidant and a tetra-ethyl-ortho-silicate (TEOS) silicon source material at an ozone: TEOS volume ratio of less than about 2:1. Finally, the substrate is annealed thermally within an oxygen containing atmosphere at a temperature of greater than about 1100 degrees centigrade to form from the gap filling silicon oxide trench fill layer a densified gap filling silicon oxide trench fill layer. Through the method there is formed a densified gap filling silicon oxide trench fill layer with a limited surface sensitivity, a low etch rate and a limited shrinkage.

Abstract: A method of manufacturing semiconductor devices yielding devices having impurity regions that are more shallow and exhibit less lateral diffusion than devices manufactured in accordance with prior art techniques. First, arsenic is introduced into a substrate. After the introduction of arsenic, phosphorus is introduced to the same portion of the substrate. The introductions of arsenic and phosphorus may be accomplished using diffusion or ion implantation techniques.

Abstract: The present invention is a method for forming a shallow trench with tapered profile and round corners for the application of shallow trench isolation (STI). This invention utilizes a multiple-step dry etching process with reduced RF power and increased pressure to etch a shallow trench. This takes advantage of different degree of polymer deposition in different steps by varing the pressure and the RF power. Thus, a shallow trench with tapered profile and round corners is achieved.

Abstract: A method of forming an isolation region is provided. A silicon oxide layer (4) is formed on a wafer (2). A first silicon oxynitride (6) layer is formed on the silicon oxide layer, and a silicon nitride layer (8) is formed on the first silicon oxynitride layer. The silicon nitride layer and a portion of the silicon oxynitride layer are etched. A TEOS-oxide layer (10) is deposited on the first silicon oxynitride layer and on the silicon nitride layer. Sidewall spacers (12) are formed on the sidewalls of the silicon nitride layer. A second silicon oxynitride layer (14) is deposited on the silicon nitride layer, sidewall spacers, and the silicon oxide layer. A second silicon nitride layer (16) is deposited and formed on the second oxynitride layer. A sacrificial oxide layer (18) is deposited on the second silicon nitride layer. A portion of the sacrificial oxide layer is etched.

Abstract: According to a semiconductor device of the present invention, a field oxide film is formed so as to cover the main surface of an SOI layer and to reach the main surface of a buried oxide film. As a result, a pMOS active region of the SOI and an nMOS active region of the SOI can be electrically isolated completely. Therefore, latchup can be prevented completely. As a result, it is possible to provide a semiconductor device using an SOI substrate which can implement high integration by eliminating reduction of the breakdown voltage between source and drain, which was a problem of a conventional SOI field effect transistor, as well as by efficiently disposing a body contact region, which hampers high integration, and a method of manufacturing the same.