Patents Examined by Guillermo J Egoavil
  • Patent number: 10573461
    Abstract: An element body of a rectangular parallelepiped shape includes a first principal surface arranged to constitute a mounting surface, a second principal surface opposing the first principal surface in a first direction, a pair of side surfaces opposing each other in a second direction, and a pair of end surfaces opposing each other in a third direction. An external electrode is disposed at an end portion of the element body in the third direction. The external electrode includes a conductive resin layer. The conductive resin layer covers a region near the first principal surface of the end surface. A height of the conductive resin layer in the first direction is larger at an end portion in the second direction than at a center in the second direction, when viewed from the third direction.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: February 25, 2020
    Assignee: TDK CORPORATION
    Inventors: Shinya Onodera, Takehisa Tamura, Atsushi Takeda, Ken Morita
  • Patent number: 10559424
    Abstract: A multilayer capacitor and a board having the same provide high capacitance and low equivalent series inductance (ESL). The multilayer capacitor includes a capacitor body including an active region, including first and second internal electrodes, and first and second cover regions. Third and fourth internal electrodes are alternately disposed in the cover region adjacent to a mounting surface. First and second external electrodes respectively contact the first and second internal electrodes to provide capacitance. First and second via electrodes are disposed in the cover region, where the first via electrode connects the third internal electrode and a first band portion of the first external electrode to each other, and where the second via electrode connects the fourth internal electrode and a second band portion of the second external electrode to each other.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: February 11, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jong Pil Lee, Hyo Youn Lee, Sung Kwon An, Seung Woo Song, Taek Jung Lee, Jin Kyung Joo
  • Patent number: 10559423
    Abstract: A multilayer ceramic electronic device includes a laminated body having alternately laminated internal electrode layers and dielectric layers. The dielectric layer has a thickness of 0.5 ?m or less. The internal electrode layers contain ceramic particles. A content ratio of the ceramic particles contained in the internal electrode layer is 2 to 15% by representation of cross sectional area.
    Type: Grant
    Filed: December 26, 2017
    Date of Patent: February 11, 2020
    Assignee: TDK CORPORATION
    Inventors: Nobuyuki Koide, Toshihiko Kaneko, Yasushi Tanaka
  • Patent number: 10559425
    Abstract: A multilayer capacitor and a board having the same provide high capacitance and low equivalent series inductance (ESL). The multilayer capacitor includes a capacitor body including an active region, including first and second internal electrodes, and first and second cover regions. Third and fourth internal electrodes are alternately disposed in the cover region adjacent to a mounting surface. First and second external electrodes respectively contact the first and second internal electrodes to provide capacitance. First and second via electrodes are disposed in the cover region, where the first via electrode connects the third internal electrode and a first band portion of the first external electrode to each other, and where the second via electrode connects the fourth internal electrode and a second band portion of the second external electrode to each other.
    Type: Grant
    Filed: February 8, 2019
    Date of Patent: February 11, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jong Pil Lee, Hyo Youn Lee, Sung Kwon An, Seung Woo Song, Taek Jung Lee, Jin Kyung Joo
  • Patent number: 10556776
    Abstract: An illustrative example elevator traveling cable includes a plurality of conductors configured for conducting at least one of electrical energy and communication signals. A jacket covers the plurality of conductors. At least one load bearing member supports a weight of the traveling cable and comprises liquid crystal polymer.
    Type: Grant
    Filed: April 11, 2018
    Date of Patent: February 11, 2020
    Assignee: OTIS ELEVATOR COMPANY
    Inventors: Chen qian Zhao, Kyle B. Martin
  • Patent number: 10553361
    Abstract: A multilayer capacitor includes: a capacitor body including an active region including a plurality of first and second internal electrodes alternately exposed, respectively, through opposite end surfaces of the capacitor body in a length direction, and upper and lower cover regions disposed on upper and lower surfaces of the active region, respectively; and first and second external electrodes formed on the opposite end surfaces of the capacitor body in the length direction, respectively. The lower cover region of the capacitor body may have a space portion.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: February 4, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Soo Hwan Son, Young Ghyu Ahn, Ho Yoon Kim
  • Patent number: 10546694
    Abstract: A multilayer capacitor includes an element, a first external electrode, a second external electrode, and a plurality of internal electrodes. The plurality of internal electrodes include first internal electrodes, second internal electrodes, and a plurality of third internal electrodes. The plurality of third internal electrodes are electrically connected by a connection conductor. First capacity parts are constituted of the first internal electrodes and the third internal electrodes, and second capacity parts are constituted of the second internal electrodes and the third internal electrodes. The first capacity part and the second capacity part are electrically connected in series, and the connection conductor is disposed on at least one of the three lateral surfaces other than the lateral surface that is a mounting surface, among the four lateral surfaces.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: January 28, 2020
    Assignee: TDK CORPORATION
    Inventors: Takeru Yoshida, Hideki Kamo, Naoto Imaizumi, Keiichi Takizawa, Takuya Imaeda, Shogo Murosawa
  • Patent number: 10542626
    Abstract: A multilayer electronic component includes a capacitor body including a plurality of dielectric layers and a plurality of first and second internal electrodes and having first to sixth surfaces, the first and second internal electrodes being exposed through the third and fourth surfaces, respectively; first and second external electrodes including first and second connected portions respectively disposed on the third and fourth surfaces of the capacitor body and first and second band portions respectively extending from the first and second connected portions to portions of the first surface of the capacitor body, respectively; a first connection terminal disposed on the first band portion; and a second connection terminal disposed on the second band portion, wherein 0.05?A1/A1?0.504, where A1 is an area of the first or second connection terminal in a thickness-width direction, and A2 is an area of the first or second band portion in a width-length direction.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: January 21, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Ho Yoon Kim, Kyung Hwa Yu, Man Su Byun, Dae Heon Jeong, Min Kyoung Cheon, Soo Hwan Son
  • Patent number: 10535470
    Abstract: A multi-layer ceramic capacitor includes a multi-layer unit and a side margin. The multi-layer unit includes a capacitance forming unit and a cover. The capacitance forming unit includes ceramic layers laminated in a first direction and internal electrodes disposed between the ceramic layers and mainly containing nickel. The cover covers the capacitance forming unit from the first direction. The side margin covers the multi-layer unit from a second direction orthogonal to the first direction. The internal electrodes each include an oxidized area adjacent to the side margin and intensively including a metal element that forms an oxide together with nickel. The capacitance forming unit includes a first portion adjacent to the cover and a second portion adjacent to the first portion in the first direction and including the oxidized area having a smaller dimension in the second direction than that of the oxidized area of the first portion.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: January 14, 2020
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Kotaro Mizuno
  • Patent number: 10535972
    Abstract: An electronic component package includes: a metal plate; a metal wall that is disposed on the metal plate; a metal frame that is disposed on the metal plate so as to be opposed to the metal wall; a through hole that is formed in the metal wall; an opening hole that is formed in the metal frame so as to be opposed to the through hole; and a lead that is hermetically sealed with a sealing portion provided in the through hole, and that is inserted into the opening hole and the through hole. The metal frame includes: a side plate that is opposed to the metal wall; a bent portion that is connected to the side plate and has a round shape; and a welding portion that is connected to the bent portion and to which a lid member is to be bonded.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: January 14, 2020
    Assignees: SHINKO ELECTRIC INDUSTRIES CO., LTD., NICHIA CORPORATION
    Inventors: Shigeru Matsushita, Mikio Suyama, Eiichiro Okahisa, Kazuma Kozuru
  • Patent number: 10529482
    Abstract: A wire harness includes electric wires, and an electromagnetic wave suppression member provided at a periphery of the electric wires. The electromagnetic wave suppression member includes a restriction member and an annular magnetic core. The restriction member is provided so as to cover an outer periphery of the electric wires and includes an inner wall section that is harder than the electric wires. The magnetic core includes a nanocrystalline soft magnetic material and is provided at a periphery of the inner wall section.
    Type: Grant
    Filed: October 19, 2015
    Date of Patent: January 7, 2020
    Assignee: HITACHI METALS, LTD.
    Inventors: Taichi Oka, Takahiro Futatsumori
  • Patent number: 10530141
    Abstract: An improved access electrical box for housing electrical connections for integration with an electrical system having a conduit and a plurality of conduit wires, the electrical box comprising a plurality of box panels forming an interior space and a front opening, the electrical box further has a top opening, and a movable access panel which selectively covers and uncovers the top opening and has a wiring aperture which allows the conduit wires to be inserted into the interior space, the electric box further has an installed device having device wires, which is secured within the front opening such that the device wires extend into the interior space, the movable access panel allows a user to splice the device wires and the conduit wires through the top opening to complete the electrical connections, and is further adapted to enclose the electrical connections when the movable panel is a closed position.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: January 7, 2020
    Inventor: Richard Fioriello
  • Patent number: 10515741
    Abstract: A cable includes a conductor and a first semiconductive layer arranged in a radially outer position with respect to the conductor. An insulating layer is arranged in a radially outer position with respect to the first semiconductive layer. A second semiconductive layer is arranged in a radially outer position with respect to the insulating. A conductive screen is arranged in a radially outer position with respect to the second semiconductive layer. A heat block layer is arranged in a radially outer position with respect to the conductive screen. The heat block layer includes a layer made of a fire resistant or a flame retardant halogen-free material. A rubberized glass fiber tape is arranged in a radially outer position with respect to the heat block layer. An outer sheath is arranged in a radially outer position with respect to the rubberized glass fiber tape.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: December 24, 2019
    Assignee: Prysmian S.p.A.
    Inventors: Geir Foss-Pedersen, Oystein Edland, Yannick Van Den Nieuwendijk
  • Patent number: 10475554
    Abstract: A coaxial cable and method of construction thereof are provided. The coaxial cable includes an elongate central conductive member; a dielectric insulative layer encasing the central conductive member; an outer protective sheath, and a braided EMI shield layer including hybrid yarn sandwiched between the dielectric insulative layer and the outer protective sheath. The hybrid yarn includes an elongate nonconductive filament and an elongate continuous conductive wire filament. The wire filament is interlaced in electrical communication with itself or other wire filaments along a length of the EMI shield layer to provide protection to the central conductive member against at least one of EMI, RFI or ESD. The method includes providing a central conductive member; forming a dielectric insulative layer surrounding the central conductive member; braiding an EMI shield layer including hybrid yarn about the insulative layer, and forming an outer protective sheath about the braided EMI shield layer.
    Type: Grant
    Filed: November 27, 2017
    Date of Patent: November 12, 2019
    Assignee: Federal-Mogul Powertrain LLC
    Inventors: Jean-Michel Marchisio, Benoit Laurent
  • Patent number: 10470292
    Abstract: A device may include a temperature controlled chamber. The temperature controlled chamber may be coupled to a plurality of strengthening coated capillary tubes. The strengthening coated capillary tubes may support the temperature controlled chamber and provide thermal insulation to the temperature controlled chamber.
    Type: Grant
    Filed: August 22, 2017
    Date of Patent: November 5, 2019
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventor: Yunda Wang
  • Patent number: 10470314
    Abstract: The present disclosure describes methods of soldering on printed circuits, and, more specifically, to methods of using a copper-containing layer or copper “ink” in low-temperature soldering using established solder processes on silver-containing layers in circuit boards. The present disclosure is also directed, in part, to a solder joint having a copper-containing layer acting as a bonding layer between a traditional solder and a silver-containing layer “ink” on a printed circuit board. The low-temperature forming of the solder joint occurs at or below a temperature of 300° C. and occurs via at least one of sintering, photosintering, lasersintering, local resistive heating, or electrochemical deposition. The methods disclosed can satisfy the growing demand for creating reliable interconnection joints that can be used in next generation electronics and printed electrical circuit boards.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: November 5, 2019
    Assignee: Lockheed Martin Corporation
    Inventors: Randall Mark Stoltenberg, Nathan Khosla
  • Patent number: 10460856
    Abstract: A power distribution system comprising a bus bar, a frame member, a support block formed from a non-conductive material and having a first side and an opposite second side, one or more first fasteners extending beyond the second side and mechanically coupled to the bus bar, one or more second fasteners extending beyond the first side and mechanically coupled to the frame member, a first insulator located between the first side of the support block and the frame member, and a second insulator located between the second side of the support block and the bus bar. Other apparatus and methods are also disclosed.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: October 29, 2019
    Assignee: SIEMENS INDUSTRY, INC.
    Inventor: Jason Parkerson
  • Patent number: 10453787
    Abstract: An electronic module assembly including a via spanning multiple layers in a wafer based module is described. The electronic module assembly can include a first layer deposited upon a substrate, a second layer deposited on a top surface of the first layer, and the via spanning multiple layers. The via can include a first bottom that is formed on a top surface of the first layer and a first sidewall that upstands from the first bottom and extending at least through the second layer.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: October 22, 2019
    Assignee: THE CHARLES STARK DRAPER LABORATORY, INC.
    Inventors: Maurice S. Karpman, Nicole S. Mueller, Gary B. Tepolt, Russell Berman
  • Patent number: 10446322
    Abstract: A composite electronic component includes: a composite including a capacitor body including a plurality of dielectric layers and a plurality of internal electrodes alternately disposed with respective dielectric layers interposed therebetween, external electrodes extending from third and fourth surfaces of the capacitor body to portions of the first, second, fifth, and sixth surfaces, respectively, a discharge layer disposed between the external electrodes on the second surface of the capacitor body, and a protective layer disposed on the discharge layer; and conductive resin layers overlapping the third and fourth surfaces and portions of the first, second, fifth, and sixth surfaces, respectively. Widths of portions of the external electrodes formed on the first surface of the capacitor body are greater than widths of portions of the first and second conductive resin layers overlapping the first surface of the capacitor body.
    Type: Grant
    Filed: January 25, 2018
    Date of Patent: October 15, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Ho Yoon Kim
  • Patent number: 10438714
    Abstract: Highly uniform and thin silver nanowires are described having average diameters below 20 nm and a small standard deviation of the diameters. The silver nanowires have a high aspect ratio. The silver nanowires can be characterized by a small number of nanowires having a diameter greater than 18 nm as well as with a blue shifted narrow absorption spectrum in a dilute solution. Methods are described to allow for the synthesis of the narrow uniform silver nanowires. Transparent conductive films formed from the thin, uniform silver nanowires can have very low levels of haze and low values of ?L*, the diffusive luminosity, such that the transparent conductive films can provide little alteration of the appearance of a black background.
    Type: Grant
    Filed: January 16, 2019
    Date of Patent: October 8, 2019
    Assignee: C3Nano Inc.
    Inventors: Yongxing Hu, Ying-Syi Li, Xiqiang Yang, Jing Shun Ang, Ajay Virkar