Patents Examined by Guillermo J Egoavil
  • Patent number: 11005248
    Abstract: An improved access electrical box for housing electrical connections for integration with an electrical system having a conduit and a plurality of conduit wires, the electrical box comprising a plurality of box panels forming an interior space and a front opening, the electrical box further has a top opening, and a movable access panel which selectively covers and uncovers the top opening and has a wiring aperture which allows the conduit wires to be inserted into the interior space, the electric box further has an installed device having device wires, which is secured within the front opening such that the device wires extend into the interior space, the movable access panel allows a user to splice the device wires and the conduit wires through the top opening to complete the electrical connections, and is further adapted to enclose the electrical connections when the movable panel is a closed position.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: May 11, 2021
    Inventor: Richard Fioriello
  • Patent number: 10993323
    Abstract: A first stackable printed circuit board with at least a two sets of set of male and female connectors each arranged inline with each other, and each configured in a mirrored pin configuration is arranged along opposing sides of an equilateral geometric shape on both the top and bottom face of the first board in order to attach, by the connectors, to a second stackable printed circuit board with the same male and female connector configuration and arrangement as the first board on at least one face regardless of the axial rotation of first stackable printed circuit board about the X or Y axis by 180 degrees and/or by axial rotation about the Z axis by n/360 degrees where n is the amount of sides of the geometric shape which contain a connector set, thereby allowing for up to n*2 different connection configurations between the first and second printed circuit boards.
    Type: Grant
    Filed: January 12, 2020
    Date of Patent: April 27, 2021
    Inventors: Cody Elsing, Matthew Moseman
  • Patent number: 10984952
    Abstract: A capacitor includes a plurality of capacitor element units, a case housing the plurality of capacitor element units, a filling resin in the case, and an external connection bus bar. Each of the plurality of capacitor element units includes a capacitor element and a relay bus bar. The capacitor element has two end surfaces and a peripheral surface, and an electrode disposed on at least one of the two end surfaces. The relay bus bar includes an electrode connecting part connected to the electrode and a connection terminal disposed to face the peripheral surface. The external connection bus bar includes an internal connection terminal connected to the connection terminal and an external connection terminal being exposed from the filling resin and configured to connect to an external terminal. The plurality of capacitor element units are arrayed in the case along a first direction parallel to a bottom surface of the case.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: April 20, 2021
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Yukimitsu Tomita, Toshihisa Miura, Hiromasa Matsui
  • Patent number: 10980123
    Abstract: An electric element includes a conducting path connecting electrodes and an insulating layer covering the conducting path. The electric element includes bonding portions in which the electrodes are disposed and a line portion connecting between the bonding portions. The line portion has a curved region sandwiched by portions having an outer shape curved on both sides of the insulating layer disposed to sandwich the conducting path. The line portion includes bonding patterns including metal surfaces exposed from the insulating layer. Each of contours of the bonding patterns includes at least two linear sides. At least two sides of the contour of a first bonding pattern disposed in the curved region are parallel or substantially parallel to at least two sides of a contour of at least one of the bonding patterns adjacent in an extending direction of the line portion.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: April 13, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Lijun Zhao
  • Patent number: 10965113
    Abstract: A wire harness, in which a connection portion between a shape retaining conductor and a flexible conductor can be protected, includes a flexible conductor that is flexibly bendable, a shape retaining conductor that retains its shape, and a protective member that surrounds a connection portion between the flexible conductor and the shape retaining conductor and linearly holds the connection portion, and one end portion of the protective member is fixed to an end portion of the shape retaining conductor.
    Type: Grant
    Filed: March 22, 2018
    Date of Patent: March 30, 2021
    Assignee: Sumitomo Wiring Systems, LTD.
    Inventor: Hirokazu Nakai
  • Patent number: 10964478
    Abstract: A multilayer ceramic capacitor satisfies a relationship A>B, where B represents a coverage rate of a first organic layer disposed on a first base electrode layer located on a first end surface, A represents a coverage rate of the first organic layer disposed on the first base electrode layer located on a first main surface or a second main surface, and A represents a coverage rate of the first organic layer located on the first main surface or the second main surface. A second end surface also has a similar configuration.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: March 30, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hiroshi Asano, Nobuyasu Hamamori, Masaru Takahashi
  • Patent number: 10950386
    Abstract: A multilayer ceramic electronic component includes: a ceramic body having a hexahedral shape including at least one rounded corner and including dielectric layers and first and second internal electrodes, and first and second external electrodes. The first and second external electrodes respectively include first and second base electrode layers which at least partially contact the first and second external sides of the ceramic body, and first and second plating layers disposed to cover the first and second base electrode layers, respectively. CP/CT is equal to or greater than 1.6 and equal to or less than 2.4, where CP is a length of a rounded boundary line of the rounded corner of the ceramic body viewed in a cross-section in length and thickness directions, and CT is a thickness of one of the first and second base electrode layers at a central point in the thickness direction.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: March 16, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jang Yeol Lee, Sun Woong Kim, Jong Ho Lee, Jung Su Lee, Myung Jun Park
  • Patent number: 10937594
    Abstract: Embodiments of the invention include a microelectronic device that includes a plurality of organic dielectric layers and a capacitor formed in-situ with at least one organic dielectric layer of the plurality of organic dielectric layers. The capacitor includes first and second conductive electrodes and an ultra-high-k dielectric layer that is positioned between the first and second conductive electrodes.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: March 2, 2021
    Assignee: Intel Corporation
    Inventors: Thomas L. Sounart, Aleksandar Aleksov, Feras Eid, Georgios C. Dogiamis, Johanna M. Swan, Kristof Darmawikarta
  • Patent number: 10939542
    Abstract: A partially molded substrate and a partial molding apparatus and a method thereof, which cover and mold each of one or more conductors formed on the substrate with the insulator to prevent the sizes of the substrate from being increased due to molding, thereby efficiently preventing high voltage between the conductors on the substrate from being applied, and thereby preventing interference around the conductor.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: March 2, 2021
    Inventors: Jeong Wan Kim, Hyunki Cho
  • Patent number: 10938142
    Abstract: An electrical connection box comprising a box main body that accommodates an electrical component and a connector for connection with an electrical wire that is provided in a protruding manner on an outer surface of the box main body, the electrical connection box being mounted on a vehicle and used for connection of a plurality of on-board loads to an on-board power supply comprises a protector that is provided in a protruding manner along a protrusion direction of the connector and protects the connector.
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: March 2, 2021
    Assignees: Sumitomo Wiring Systems, Ltd., Toyota Jidosha Kabushiki Kaisha
    Inventors: Maiko Oda, Kiyofumi Kawaguchi, Tatsuya Fujisaka, Takenori Kobayashi, Junta Katayama
  • Patent number: 10917963
    Abstract: A device may include a temperature controlled chamber. The temperature controlled chamber may be coupled to a plurality of strengthening coated capillary tubes. The strengthening coated capillary tubes may support the temperature controlled chamber and provide thermal insulation to the temperature controlled chamber.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: February 9, 2021
    Assignee: Palo Alto Research Center Incorporated
    Inventor: Yunda Wang
  • Patent number: 10916868
    Abstract: An electrically conductive contact and a method of forming the same from a length of wire are disclosed. The contact has a pin section connected to a fastening section. The fastening section is adapted for press-fitting into the hole of a substrate and includes a solid tip, a neck connected to the pin section, first and second arcuate side surfaces, and first and second major surfaces through which an enlarged slot extends. Each of the first and second major surfaces is at least partially flattened.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: February 9, 2021
    Assignee: Interplex Industries, Inc.
    Inventor: Robert Martin Bogursky
  • Patent number: 10913405
    Abstract: A wire harness that includes a wire having a first wire, a second wire that is more bendable than the first wire, and a connection for electrically connecting the first wire and the second wire to each other; a tube for accommodating at least one of the first wire and the second wire; and a covering ventilation that is tubular, has a covering for surrounding the connection and a surrounding region of the connection of the wire, and is connected to the tube.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: February 9, 2021
    Assignee: SUMITOMO WIRING SYSTEMS, LTD.
    Inventor: Hikaru Omae
  • Patent number: 10916376
    Abstract: An electronic component includes a multilayer capacitor including a capacitor body and an external electrode disposed at an end of the capacitor body, and an interposer including an interposer body and an external terminal disposed at an end of the interposer body. The external terminal includes a bonding portion disposed on a first surface of the interposer body and connected to the external electrode, a mounting portion disposed on a second surface of the interposer body opposing the first surface, and a connection portion disposed on an end surface of the interposer body to connect the bonding portion and the mounting portion and having an uneven surface, and a conductive bonding agent is disposed between the external electrode and the bonding portion of the external terminals, and an adhesive extends to a portion of the uneven surface.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: February 9, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Man Su Byun, Ho Yoon Kim, Sang Soo Park, Woo Chul Shin
  • Patent number: 10905015
    Abstract: The present disclosure relates to a laminated-type chip component, and more particularly, to a laminated-type chip component which can be more stably bonded by forming a groove filled with solder in a region in which an external electrode terminal of the laminated-type chip is soldered and thereby increasing the area of soldering.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: January 26, 2021
    Assignee: LG Chem, Ltd.
    Inventors: Ga Young Woo, Young Su Son, Byeong Geon Kim
  • Patent number: 10892104
    Abstract: A multilayer ceramic capacitor includes a laminated body and first and second external electrodes respectively on both end surfaces of the laminated body. When regions where first internal electrodes or second internal electrodes are not present are regarded as side margin portions in a cross section of the laminated body as viewed from the laminating direction, the side margin portions include multiple side margin layers, and the content of Si in the side margin layer closest to the internal electrode is lower than that in the side margin layer other than the side margin layer closest to the internal electrode.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: January 12, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hideaki Tanaka, Daiki Fukunaga, Koji Moriyama
  • Patent number: 10892103
    Abstract: A multilayer ceramic capacitor includes a laminated body and first and second external electrodes respectively on both end surfaces of the laminated body. When regions where first internal electrodes or second internal electrodes are not present are regarded as side margin portions in a cross section of the laminated body as viewed from the laminating direction, the side margin portions include multiple side margin layers, and the content of Si in the side margin layer closest to the internal electrode is lower than that in the side margin layer other than the side margin layer closest to the internal electrode.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: January 12, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hideaki Tanaka, Daiki Fukunaga, Koji Moriyama
  • Patent number: 10879000
    Abstract: A multilayer ceramic electronic component includes a ceramic body including dielectric layers and first and second internal electrodes, first and second external electrode disposed on first and second external surfaces of the ceramic body to be electrically connected to the first and second internal electrodes, respectively, and an interposer including an insulating body having first and second recess regions and first and second terminal electrodes. The first and second recess regions are disposed in a central region of the insulating body in a width direction. A/B is within a range from 0.14 or more to 0.51 or less, where A is an area of each of the first and second recess regions, viewed in a cross-section in length and width directions, and B is an area of each of the first and second terminal electrodes, viewed in the cross-section in the length and width directions.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: December 29, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Gu Won Ji, Ho Yoon Kim, Heung Kil Park, Sang Soo Park, Woo Chul Shin
  • Patent number: 10855065
    Abstract: A weather-resistant junction box is disclosed. The junction box includes a back panel and a number of sidewalls arising from the back panel to create an enclosure with an open face. A removable panel is constructed and arranged to cover and close the open face. A cap with an overhang extends over the top of the enclosure, extending out and down over the top portions of its sidewalls. Internally, the enclosure is divided by one or more partitions into a driver compartment and two or more connection compartments. Each of the connection compartments includes at least one opening, or a knock-out for the opening. All of the openings or knock-outs for all of the connection compartments may be located in the same panel of the junction box.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: December 1, 2020
    Assignee: Elemental LED, Inc.
    Inventors: Andrew Lassen, David Greenspan
  • Patent number: 10854392
    Abstract: A multi-layer ceramic electronic component includes: a ceramic body including internal electrodes laminated in a first direction, a first main surface including a first flat region facing in the first direction, and a second main surface including a second flat region facing in the first direction; and a pair of external electrodes connected to the internal electrodes and facing each other in a second direction orthogonal to the first direction, a dimension of the ceramic body in the first direction being 1.1 times or more and 1.6 times or less a dimension of the ceramic body in a third direction orthogonal to the first and second directions, the first flat region being formed at a center portion of the first main surface in the second direction, the second flat region being formed at a center portion of the second main surface in the third direction.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: December 1, 2020
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Hiroaki Sato