Patents Examined by Henry Choe
  • Patent number: 11695376
    Abstract: A phase-synchronized RF power generator includes: an RF power amplifier for amplifying an RF power signal; a first directional coupler; an isolator for adjusting impedance mismatch generated by the first directional coupler, and transferring the RF power signal transferred by the first directional coupler to the output terminal; a second directional coupler for transferring part of the feedback signal transferred by the first directional coupler to be compared with a frequency of a reference signal provided by a crystal oscillator, and transferring rest of the feedback signal to a feedback loop; a digital phase shifter for adjusting a phase of the feedback signal transferred by the second directional coupler at predetermined intervals; an analog phase shifter for continuously adjusting the phase of the feedback signal discretely adjusted by the digital phase shifter; and a frequency comparator.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: July 4, 2023
    Assignee: WAVEPIA CO., LTD.
    Inventor: Sang-Hun Lee
  • Patent number: 11695375
    Abstract: An amplifier includes a semiconductor die and a substrate that is distinct from the semiconductor die. The semiconductor die includes a III-V semiconductor substrate, a first RF signal input terminal, a first RF signal output terminal, and a transistor (e.g., a GaN FET). The transistor has a control terminal electrically coupled to the first RF signal input terminal, and a current-carrying terminal electrically coupled to the first RF signal output terminal. The substrate includes a second RF signal input terminal, a second RF signal output terminal, circuitry coupled between the second RF signal input terminal and the second RF signal output terminal, and an electrostatic discharge (ESD) protection circuit. The amplifier also includes a connection electrically coupled between the ESD protection circuit and the control terminal of the transistor. The substrate may be another semiconductor die (e.g., with a driver transistor and/or impedance matching circuitry) or an integrated passive device.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: July 4, 2023
    Assignee: NXP USA, Inc.
    Inventors: Joseph Gerard Schultz, Yu-Ting David Wu, Nick Yang
  • Patent number: 11689163
    Abstract: A load-insensitive power amplifier power detector that excludes the use of couplers is disclosed. The load-insensitive power amplifier power detector may include a voltage sampling circuit in electrical communication with a collector of a power amplifier and configured to sample a first voltage from the power amplifier. The load-insensitive power amplifier power detector may include a current sampling circuit in electrical communication with the collector of the power amplifier and configured to sample an output current from the power amplifier. Further, the load-insensitive power amplifier power detector may include a current-to-voltage converter connected between the voltage sampling circuit and an output of the load-insensitive power amplifier power detector. The current-to-voltage converter may be configured to convert the output current to obtain a second voltage.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: June 27, 2023
    Assignee: Skyworks Solutions, Inc.
    Inventor: Apostolos Samelis
  • Patent number: 11689166
    Abstract: A combination amplifier can include a “main amplifier circuit” for signal amplification, and a matching “compensation amplifier circuit” to monitor distortion in the main amplifier output signal. The compensation amplifier circuit provides a compensation signal to the main amplifier circuit to compensate for and servo out distortion therein. The compensation amplifier circuit includes a passive input network and an amplifier. The passive input network can connect to both the input and output nodes of the main amplifier circuit such that the input and output signals cancel within the passive input network, leaving only the low level distortion component introduced in the main amplifier. Thus, the compensation amplifier is then only operating on the low-level distortion introduced in the main amplifier to generate the compensation signal. Because the compensation amplifier is then only operating on the very low distortion signal, any distortion it introduces into the compensation signal is negligible.
    Type: Grant
    Filed: February 4, 2021
    Date of Patent: June 27, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventor: Christopher Peter Hurrell
  • Patent number: 11689160
    Abstract: Techniques are disclosed to compensate for changes in the impedance of stage(s) preceding a trans-impedance amplifier (TIA) that is used within an RF chain. The techniques identify the changes in the source impedance value of the input stage (e.g., the mixers and LNAs) as a result of a gain state change, which alters the signal-to-transfer function (STF) of the TIA during operation and negatively impacts radio performance. The STF is maintained for changes in the source impedance value throughout different gain states without using switchable shunt components by using tunable elements to compensate for the source impedance changes, thus keeping the STF constant.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: June 27, 2023
    Assignee: Intel Corporation
    Inventor: Daniel Wimmer
  • Patent number: 11683013
    Abstract: Apparatus and methods for power amplifier bias modulation for low bandwidth envelope tracking are provided herein. In certain embodiments, a power amplifier system for a mobile device includes a power amplifier that amplifies an RF signal and a low bandwidth envelope tracker that generates a power amplifier supply voltage for the power amplifier based on an envelope of the RF signal. The envelope tracking system further includes a bias modulation circuit that modulates a bias signal of the power amplifier based on a voltage level of the power amplifier supply voltage.
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: June 20, 2023
    Assignee: Skyworks Solutions, Inc.
    Inventors: Serge Francois Drogi, Philip John Lehtola, Florinel G. Balteanu
  • Patent number: 11677363
    Abstract: A power amplifier circuit includes a first transistor configured to receive a first signal at a base, amplify the first signal, and output a second signal from a collector; and a bias circuit configured to supply a bias current to the base of the first transistor. The bias circuit includes a second transistor configured to supply a bias current to the base of the first transistor, a third transistor including a base connected to a base of the second transistor and a collector connected to a collector of the second transistor, and a fourth transistor including a base connected to an emitter of the third transistor and a collector connected to an emitter of the second transistor and configured to draw at least part of the bias current.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: June 13, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuri Honda, Fumio Harima, Mitsuhiro Toya
  • Patent number: 11677367
    Abstract: A power amplifier circuit includes a power splitter, a first amplifier configured to output a first amplified signal from a first output terminal, and a second amplifier configured to output a second amplified signal from a second output terminal. The power amplifier circuit further includes a first termination circuit connected between the first output terminal and the second output terminal, a first transmission line, a second transmission line, a second termination circuit connected between another end of the first transmission line and another end of the second transmission line, and a power combiner.
    Type: Grant
    Filed: October 28, 2021
    Date of Patent: June 13, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuri Honda, Satoshi Goto, Fumio Harima
  • Patent number: 11677357
    Abstract: Envelope tracking systems with modeling for power amplifier supply voltage filtering are provided herein. In certain embodiments, an envelope tracking system includes a supply voltage filter, a power amplifier that receives a power amplifier supply voltage through the supply voltage filter, and an envelope tracker that generates the power amplifier supply voltage. The power amplifier provides amplification to a radio frequency (RF) signal that is generated based on digital signal data, and the envelope tracker generates the power amplifier supply voltage based on an envelope signal corresponding to an envelope of the RF signal. The envelope tracking system further includes digital modeling circuitry that models the supply voltage filter and operates to digitally compensate the digital signal data for effects of the supply voltage filter, such as distortion.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: June 13, 2023
    Assignee: Skyworks Solutions, Inc.
    Inventors: Serge Francois Drogi, Florinel G. Balteanu, Shayan Farahvash
  • Patent number: 11664772
    Abstract: Various examples are directed to a frequency-compensated amplifier circuit comprising a first multi-stage amplifier comprising a first amplifier input node, a first amplifier output node, and a first amplifier intermediate node. A first feedback path between the first amplifier input node and the first amplifier output node comprises a feedback resistance. A second feedback path between the first amplifier output node and the first amplifier intermediate node comprises a first capacitor and a portion of the feedback resistance. A first switch circuit may be electrically coupled to the first capacitor and to the feedback resistance. The first switch circuit may have a first state in which the first capacitor is coupled to a first tap point of the feedback resistance and the portion of the feedback resistance has a first value.
    Type: Grant
    Filed: February 11, 2021
    Date of Patent: May 30, 2023
    Assignee: Analog Devices, Inc.
    Inventors: David James Plourde, Quan Wan
  • Patent number: 11664775
    Abstract: This switching power source 100 has: a switching output circuit 110 which drives an inductor current IL by turning on and off an upper switch 111 and a lower switch 112 and generates an output voltage VOUT from an input voltage PVDD; a lower current detection unit 210 which detects the inductor current IL flowing through the lower switch 112 during an ON-period of the lower switch 112 and acquires lower current feedback information Iinfo; an error amplifier 140 which outputs voltage feedback information Vinfo including information on an error between the output voltage VOUT (feedback voltage FB) and a reference voltage REF; an information synthesis unit 220 that generates synthesis feedback information VIinfo by synthesizing Iinfo with Vinfo; and an information holding unit 230 which samples Vinfo during the ON-period of the lower switch 112.
    Type: Grant
    Filed: April 21, 2022
    Date of Patent: May 30, 2023
    Assignee: Rohm Co., Ltd.
    Inventors: Masashi Nagasato, Seiji Takenaka, Tetsuo Tateishi
  • Patent number: 11664771
    Abstract: A power amplifier includes a first transistor with a gate to which input power is applied and a drain from which output power is provided, a bias circuit configured to apply a bias to the gate of the first transistor, and a coupler configured to distribute the input power to the gate of the first transistor and to the bias circuit. The bias circuit includes a voltage generator circuit including a second transistor with a gate to which the power distributed to the bias circuit by the coupler is applied, the voltage generator circuit being configured to generate a first DC voltage increasing in accordance with an increase in the power distributed to the bias circuit. The bias circuit includes a level shifter circuit configured to generate a second DC voltage increasing in accordance with an increase in the first DC voltage.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: May 30, 2023
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Masahiro Tanomura
  • Patent number: 11658615
    Abstract: Multi-level envelope trackers with an analog interface are provided herein. In certain embodiments, an envelope tracking system for generating a power amplifier supply voltage for a power amplifier is provided. The envelope tracking system includes a multi-level supply (MLS) DC-to-DC converter that outputs multiple regulated voltages, and an MLS modulator that controls selection of the regulated voltages over time based on an analog envelope signal corresponding to an envelope of the RF signal amplified by the power amplifier.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: May 23, 2023
    Assignee: Skyworks Solutions, Inc.
    Inventors: Florinel G. Balteanu, Serge Francois Drogi, Shayan Farahvash, David Richard Pehlke
  • Patent number: 11658410
    Abstract: An apparatus has a Radio Frequency (RF) signal generator to produce RF signals phase shifted relative to one another in accordance with RF frequency waveform parameters. Amplifier chains process the RF signals to produce channels of amplified RF signals. Each amplifier chain has amplifiers and at least one amplifier has a tunable gate voltage synchronized with the RF signals.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: May 23, 2023
    Assignee: Epirus, Inc.
    Inventors: Yiu Man So, Michael Borisov, Daniel G. Thompson, Alex Scott, Nathan Mintz, Max Mednik, Ryan Ligon, Harry B. Marr
  • Patent number: 11658622
    Abstract: A power amplifier circuit includes a lower transistor having a first terminal, a second terminal connected to ground, and a third terminal, wherein a first power supply voltage is supplied to the first terminal, and an input signal is supplied to the third terminal; a first capacitor; an upper transistor having a first terminal, a second terminal connected to the first terminal of the lower transistor via the first capacitor, and a third terminal, wherein a second power supply voltage is supplied to the first terminal, an amplified signal is outputted to an output terminal from the first terminal, and a driving voltage is supplied to the third terminal; a first inductor that connects the second terminal of the upper transistor to ground; a voltage regulator circuit; and at least one termination circuit that short-circuits an even-order harmonic or odd-order harmonic of the amplified signal to ground potential.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: May 23, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Kazuo Watanabe, Yusuke Tanaka, Satoshi Arayashiki
  • Patent number: 11652454
    Abstract: There is provided a monolithic microwave integrated circuit, MMIC, front-end module (100) comprising: a gallium nitride structure (110) supported by a silicon substrate (120); a silicon-based transmit/receive switch (130) having a transmit mode and a receive mode; a transmit amplifier (112) configured to amplify an outgoing signal to be transmitted by said MMIC front-end module, wherein said transmit amplifier is electrically connected (132) to said transmit/receive switch, wherein said transmit amplifier comprises a gallium nitride high-electron-mobility transistor, HEMT, (114) formed in said gallium nitride structure; and a receive amplifier (113) configured to amplify an incoming signal received by said MMIC front-end module, wherein said receive amplifier is electrically connected (133) to said transmit/receive switch, wherein said receive amplifier comprises a gallium nitride HEMT (115) formed in said gallium nitride structure.
    Type: Grant
    Filed: June 17, 2022
    Date of Patent: May 16, 2023
    Assignee: EPINOVATECH AB
    Inventor: Martin Andreas Olsson
  • Patent number: 11652458
    Abstract: A thermally-isolated-metal-oxide-semiconducting (TMOS) sensor has inputs coupled to first and second nodes to receive first and second bias currents, and an output coupled to a third node. A tail has a first conduction terminal coupled to the third node and a second conduction terminal coupled to a reference voltage. A control circuit applies a control signal to a control terminal of the tail transistor based upon voltages at the first and second nodes so that a common mode voltage at the first and second nodes is equal to a reference common mode voltage. A differential current integrator has a first input terminal coupled to the second node and a second input terminal coupled to the first node, and provides an output voltage indicative of an integral of a difference between a first output current at the first input terminal and a second output current at the second input terminal.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: May 16, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Calogero Marco Ippolito, Michele Vaiana, Angelo Recchia
  • Patent number: 11652451
    Abstract: A power amplifier device includes: a first power supply terminal for inputting a first power supply voltage; a first transistor for power amplification that (i) includes a first gate to which a bias voltage is applied, and (ii) is supplied with power from the first power supply terminal; a second power supply terminal for inputting a second power supply voltage lower than the first power supply voltage; a second transistor for monitoring that (i) includes a second gate to which the bias voltage is applied, (ii) is supplied with power from the first power supply terminal or the second power supply terminal, and (iii) imitates an operation of the first transistor; and a bias circuit that is supplied with power from the second power supply terminal and generates and adjusts the bias voltage according to a drain current or a source current of the second transistor.
    Type: Grant
    Filed: August 22, 2022
    Date of Patent: May 16, 2023
    Assignee: NUVOTON TECHNOLOGY CORPORATION JAPAN
    Inventors: Takashi Saji, Kaname Motoyoshi, Shingo Matsuda
  • Patent number: 11646703
    Abstract: Methods and devices to implement efficiently an AUX terminal in RF front end receivers using LNAs are described. The described methods implement a smaller number of switches resulting in an overall performance improvement by reducing the noise figure at the input of the LNA. The presented devices can be used in low/high gain and bypass modes and can accommodate an arbitrary number of bands over a wide frequency range.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: May 9, 2023
    Assignee: PSEMI CORPORATION
    Inventors: Rong Jiang, Khushali Shah
  • Patent number: 11646707
    Abstract: An analog front end circuit with pulse width modulation current compensation comprises sensing a current condition and determining if the current condition is a positive or negative current condition. An appropriate control signal is determined according to the current condition and sent to turn on a positive current electronic switch if the current condition is a negative current condition or sent to turn on a negative current electronic switch if the current condition is a positive current condition. A positive compensation current flows to offset negative parasitic current when the positive current electronic switch is turned on and a negative compensation current flows to offset positive parasitic current when the negative current electronic switch is turned on. A master control unit utilizes pulse width modulation signals of various widths associated with various current conditions to be sent to turn on the positive electronic switch or the negative electronic switch.
    Type: Grant
    Filed: February 23, 2021
    Date of Patent: May 9, 2023
    Assignee: Novatek Microelectronics Corp.
    Inventor: Yen-Cheng Cheng