Abstract: Conventional multistage amplifiers oftentimes employ trim circuits or highly matched components to combat noise and offset contributions. Having trim circuitry or highly matched components increases the overall size, cost, and power consumption, so it is desirable to have a circuit that reduces any need for better matching components or trim circuitry. Here, a multistage amplifier system is provided that generally accounts for some noise and offset contributions, reducing the need for better matching components and/or trim circuitry.

Abstract: A novel RF power amplifier integrated circuit (PA IC), unit cell, and method for amplifying RF signals are disclosed. One embodiment of a PA IC includes at least two linear arrays comprising transistor device units, and at least one linear array comprising capacitors. The transistor device units include source nodes that are jointly coupled to a source bus, and selected gate nodes that are jointly coupled to a gate bus. First electrodes of the capacitors are also jointly coupled to the source bus, and second electrodes of the capacitors are jointly coupled to the gate bus. Each linear array comprising capacitors is disposed between at least two linear arrays comprising transistor device units. In one embodiment, the PA IC includes unit cells. In some embodiments, each unit cell comprises two transistor device units and one or more capacitors. The capacitors are disposed between the transistor device units.

Abstract: Consistent with the present disclosure, a “dummy” transimpedance amplifier (dummy TIA) is provided on a substrate along with one or more other transimpedance amplifiers (TIAs) that are connected to photodiodes and output voltage signals for further processing. Typically, the dummy TIA is not connected to a photodiode and does not supply a useful output. The dummy TIA, however, is subject to the same processing and temperature variations as the other TIAs, and, as a result, the voltage on the dummy TIA inverting input will be the same or substantially the same as that of the other TIAs. Thus, by sensing the dummy TIA inverting input voltage, an appropriate photodiode bias can be obtained without direct measurement of the voltage on the inverting inputs of the other TIAs.

Abstract: An amplifier circuit, includes: a first amplifier; a second amplifier; a first capacitor connected to the first amplifier; a second capacitor having one terminal connected to the first amplifier, another terminal connected to the second input terminal; and a first switch circuit switching a connection of the output terminal, the another terminal of the first capacitor, the first input terminal and the second input terminal, and switching supplying a reference potential supply, the first switch circuit including: a first state connecting the first input terminal to the second input terminal, connecting the output terminal to the another terminal of the first capacitor, and supplying the second input terminal with the reference potential, a second state connecting the first input terminal to the another terminal of the first capacitor and providing the output terminal and the second input terminal in an open state.

Abstract: An amplifier having at least one switch controlled by an output voltage of a hysteresis block, wherein the hysteresis block is adapted to receive an input voltage signal based on an integration of an error signal, a low threshold voltage and a high threshold voltage, and is arranged to change the output voltage from a first value to a second value when the input voltage signal is higher than the high threshold voltage and to change the output voltage from the second value to the first value when the input voltage signal is lower than the low threshold voltage, and wherein the low threshold voltage is equal to Vref??VDD and the high threshold voltage is equal to Vref+?VDD, where Vref is a common mode voltage level, ? is a non-zero constant, and VDD is a power supply voltage.

Abstract: An integrated circuit includes a differential amplifier. The differential amplifier includes at least one output end. A circuit is coupled with the at least one output end of the differential amplifier. The circuit does not include a resistor-capacitor (RC) network and is configured for providing a negative impedance to the differential amplifier for adjusting a direct current (DC) gain of the integrated circuit.

Abstract: An amplifier including a first transistor including a gate coupled to an input terminal and a grounded source; a load resistor provided between a drain of the first transistor and a power supply; an output terminal coupled to a node between the drain of the first transistor and the load resistor; a feedback path coupled to the input terminal and the output terminal and including a resistor and a capacitor; a bias voltage generator applying a gate bias voltage to the gate of the first transistor in response to an enable signal; a supply resistor provided between an output node for the gate bias voltage of the bias voltage generator and the gate of the first transistor; and an enable switch lowering a resistance value between the output node for the gate bias voltage and a node in the feedback path.

Abstract: A class-D amplifier includes a differential integrator that integrates a difference between an input signal and a feedback signal to output an integration value signal, a pulse width modulation circuit that outputs a digital signal having a pulse width corresponding to a level of the integration value signal, an output buffer that drives a load based on the digital signal, a feedback section that feeds an output signal of the output buffer into the differential integrator as the feedback signal, a clamp section that performs a clamping of limiting the level of the integration value signal within a specified level range, an attenuation section that attenuates the level of the input signal to be input to the differential integrator in response to an attenuation command, and an attenuation control section that outputs the attenuation command to the attenuation section in response to the clamping performed by the clamp section.

Abstract: A circuit in accordance with an embodiment of the present invention includes an instrumentation amplifier, a dynamically adjustable low pass filter, at least one monitor and a controller. The instrumentation amplifier includes a pair of buffered operational amplifiers that accept a pair of input signals, and a differential operational amplifier that outputs an output signal indicative of a difference between the pair of input signals. The dynamically adjustable low pass filter is configured to provide band limiting of the output signal at frequencies greater than a cutoff frequency. The monitor, or monitors, is/are configured to monitor a signal upstream of the instrumentation amplifier and/or a signal downstream of the instrumentation amplifier and output a monitor signal.

Abstract: A balun amplifier is provided, which includes two input terminals, two output terminals and two modules. The first and the second input terminals receive a single-ended input signal, respectively. The first and the second output terminals provide a differential output signal. The first module is coupled to the first input terminal, the first output terminal, and the second output terminal. The second module is coupled to the second input terminal, the first output terminal, and the second output terminal. The first and the second modules receive the single-ended input signal through the first and the second input terminals respectively, amplify the single-ended input signal respectively, and convert the single-ended input signal into the differential output signal. The circuit topologies of the first and the second modules are symmetric except that types of transistors in the first and the second modules are different.

Abstract: A class D amplifier circuit includes a signal generation section that generates a first pulse width modulation signal and a second pulse width modulation signal based on an input signal. When a level of the input signal is zero, the signal generation section generates: the first pulse width modulation signal having a repeated first wide-width pulse signal portion, which has a wide width and a repeated first narrow-width pulse signal portion, which has a narrow width which is narrower than the wide width of the first wide-width pulse signal; and the second pulse width modulation signal having a repeated second narrow-width pulse signal portion, which has a narrow width and a repeated second wide-width pulse signal portion, which has a wide width which is wider than the narrow width of the second narrow-width pulse signal portion.

Abstract: Bias circuits, amplifiers and methods are provided, such as those for providing bias signals over a range of common mode inputs for an amplifier to output a constant current. One example of a bias circuit is configured to generate a bias signal having a voltage magnitude according to a reference signal. The reference signal is indicative of a common mode input level of an input signal of the amplifier circuit and the bias circuit is further configured to adjust the bias signal over a range of common mode input levels. An amplifier receiving the bias signal is configured to generate an output signal in response to an input signal and drive an output current based on the voltage magnitude of the bias signal provided by the bias circuit.

Abstract: A power amplifier system in accordance with an example embodiment can utilize a transformer having a primary winding inductively coupled to a secondary winding, where the primary winding includes a center tap between a first port and a second port, where the secondary winding includes a third port and a fourth port, where the primary winding receives a first output from a first amplifier, where the center tap receives a second output from a second amplifier.

Abstract: Systems and methods for providing an adaptive bias circuit that may include a differential amplifier, low-pass filter, and common source amplifier or common emitter amplifier. The adaptive bias circuit may generate an adaptive bias output signal depending on input signal power level. As the input power level goes up, the adaptive bias circuit may increase the bias voltage or bias current of the adaptive bias output signal. A power amplifier (e.g., a differential amplifier) may be biased according to the adaptive bias output signal in order to reduce current consumption at low power operation levels.

Abstract: Provided is a signal amplification apparatus with advanced linearization, the signal amplification apparatus including: a driving unit having a structure of a cascode amplifier including a first active element and a second active element and outputting an amplification signal in which an input signal is amplified, to an output terminal; a third active element receiving a signal diverged between the first active element and the second active element while gate and drain terminals of the third active element are shorted; a fourth active element of which gate and drain terminals are connected to a source terminal of the third active element; and a fifth active element of which gate terminal is connected to the drain terminal of the fourth active element, outputting a non-linear signal having an opposite phase to the amplification signal to the output terminal so as to cancel a third-order inter-modulation distortion component included in the input signal.

Abstract: Shared-current electronic systems (120, 130, 140, 150, 160, 170, 180, 190, 200, 210, and 220) include two or more electronic devices, such as an electronic device (Q1), a baseband processor (110), and a multiplier/up-converter (112), that are connected in dc series or dc series-parallel, that may be connected in rf series, and that either fixedly or variably share portions of a dc source voltage. Various embodiments produce separate rf outputs, variably shift the phase of a single rf output, variably shift rf power between/among rf outputs, or produce a frequency-compressed modulation. The apparatus includes means (122, 162, 162A, and/or 162B) for precisely proportioning the regulated dc source voltage to one or more of the dc series-connected electronic devices irrespective of production variations in operating parameters of the electronic devices and/or drift of the electronic devices.

Abstract: An apparatus and method for the cancellation of third order derivative distortion for ultra low power (ULP) applications are disclosed involving a first amplifier connected in parallel with a second amplifier for amplifying a received signal. The first amplifier includes at least one transistor operating in the sub-threshold region such that the first amplifier possesses a positive third derivative of a transfer function of the first amplifier, which generates a first amplified signal having in phase third order distortions. The second amplifier includes at least one differential pair of transistors operating in the sub-threshold region such that the second amplifier possesses a negative third derivative of a transfer function of the second amplifier, which generates a second amplified signal having in opposite phase third order distortions. The first and second amplified output signals are combined resulting in cancellation of third order distortions in the combined amplified signal.

Abstract: Embodiments of the invention may provide for power amplifier systems and methods. The systems and methods may include a power amplifier that generates a first differential output signal and a second differential output signal, a primary winding comprised of a plurality of primary segments, where a first end of each primary segment is connected to a first common input port and a second end of each primary segment is connected to a second common input port, where the first common input port is operative to receive the first differential output signal, and where the second common input port is operative to receive the second differential output signal, and a single secondary winding inductively coupled to the plurality of primary segments.

Abstract: An RF amplification device has amplification elements which amplify a radio frequency input signal in wireless radio communication. Transmission line transformers are coupled to one of an input electrode and an output electrode of the amplification elements and have a main line Lout arranged between the input and the output, and a sub line Lin1 arranged between an AC ground point and one of the input and the output and coupled to the main line Lout. By applying an operating voltage different from the ground voltage level to the AC ground point, the operating voltage is supplied to the output electrodes of the amplification elements via the sub line from the AC ground point. In realizing a high-performance load circuit in an RF amplification device, it is possible to avoid increase of a module height of an RF module.

Abstract: A number of identical non-uniformly distributed ultra-wideband power amplifier string building blocks are coupled together to form an ultra-wide bandwidth high-power amplifier. The non-uniform distribution results in an amplifier utilizing modular string building blocks that have input and output impedances with only real values. This permits the strings to be replicated and connected together with simple impedance matching. The internal impedance matching associated with the non-linear distribution also absorbs parasitic capacitance to permit the ultra-broadband operation. In one embodiment identical transistors are used for each cell so that the strings may be identically replicated. This permits modular re-use without reconfiguration. In one embodiment a non-uniform distributed power amplifier built using the subject building blocks provides an ultra-wideband multi-octave device suitable for electronic warfare and communications applications, especially to replace traveling wave tubes.