Abstract: Systems, methods, and apparatuses for reducing writes to the data array of a cache. A cache hierarchy includes one or more L1 caches and a L2 cache inclusive of the L2 cache(s). When a request from the L1 cache misses in the L2 cache, the L2 cache sends a fill request to memory. When the fill data returns from memory, the L2 cache delays writing the fill data to its data array. Instead, this cache line is written to the L1 cache and a clean-evict bit corresponding to the cache line is set in the L1 cache. When the L1 cache evicts this cache line, the L1 cache will write back the cache line to the L2 cache even if the cache line has not been modified.

Abstract: A processor employs a prefetch prediction module that predicts, for each prefetch request, whether the prefetch request is likely to be satisfied from (“hit”) the cache. The arbitration priority of prefetch requests that are predicted to hit the cache is reduced relative to demand requests or other prefetch requests that are predicted to miss in the cache. Accordingly, an arbiter for the cache is less likely to select prefetch requests that hit the cache, thereby improving processor throughput.

Abstract: Method and system for processing a read request are provided. The first adapter receives the read request from a client to read data using a logical object managed by a second adapter. The first adapter is configured to generate a vendor unique command descriptor block for the second adapter to obtain the data and write the data at a location specified by the read request. The second adapter is configured to retrieve the data from a storage location specified by the logical object and writing the data at the location specified by the read request; and notifies the first adapter after writing the data.

Abstract: A mechanism is provided for tape writing of small transactions. A first file is written as a plurality of fixed-length data sets (DS), the DS number of the final DS in the plurality of DS is stored in memory as #N(DS#N) and the WP number as #M(WP#M), and the final first file and the second file in the DS following the final DS(DS#N, WP#M) containing the first file are packed and written in sequential DS units, and are stored as DS#N, DS#N+1, etc. and WP#M+1 in sequential order in DS containing the second file. The remaining first, second, or third file is packed and DS#N with WP#M is overwritten as DS#N with WP#M+2, and the remaining #N in the DS numbers of the second file and the third file in the subsequent DS are written as DS#N+1, N+2, etc. with WP#M+2, and the DS#N, #N+1, #N+2, etc. with WP#M+2 are stored.

Abstract: An access instruction which includes a logical block address (LBA) is received. A first-level table is accessed to obtain a first-level table entry associated with the LBA. From the first-level table entry, a location associated with a second-level table on solid state storage media is determined. The second-level table is accessed at the determined location to obtain a second-level table entry associated with the LBA. From the second-level table entry, a physical block address corresponding to the logical block address is determined.

Abstract: A non-overwrite storage system, such as a log-structured file system, that includes a non-volatile storage having multiple storage segments, a volatile storage having an unsafe free segments list (UFSL), and a controller for managing storage resources of the non-volatile storage. The controller can be configured to copy page data from used segment(s) of the non-volatile storage, write the copied page data to free segment(s) of the non-volatile storage, index the UFSL with indications of the used segment(s), and thereafter prevent reuse of the used segment(s) while the indications of the used segment(s) remain indexed in the UFSL. In some implementations, the non-overwrite storage system may be associated with flash storage system, and a flash controller can be configured perform a flush track cache operation to clear the indications of the used segment(s) from the UFSL, to enable reuse of segment(s) that were previously indexed to the UFSL.

Abstract: A method includes identifying a set of instructions to be executed as a transaction that is to access a section of memory, prior to executing the set of instructions as the transaction, facilitating a non-speculative access to a data cache, the data cache comprising a plurality of cache lines, each cache line comprising a lock to lock a respective portion of the memory, determining if the section of memory is available for the transaction in view of locks of the plurality of cache lines, and in response to a determination that the section of memory is not available, causing the non-speculative access to the data cache to be repeated.

Abstract: In one embodiment, a system includes a database operative to maintain a social graph; and a cache layer comprising a plurality of data shards, the data shards being divided among a plurality of cache nodes of a cache layer, wherein each data shard is operative to: maintain at least a portion of the social graph; receive a request to store associations between a first graph node and a second graph node of the social graph, wherein the first and second graph nodes are identified by a first and second unique identifier, respectively, the first and second graph nodes each corresponding to a particular data shard of the plurality of data shards; and update, responsive to the request, the data shard corresponding to the first graph node and the data shard corresponding to the second graph node.

Abstract: A data storage device flushes newly written data in response to certain events such that, when the device has acknowledged newly written data, the device cannot return old data of the referenced logical block address to the host in any case. If the data of the logical block address has been corrupted, the device returns an uncorrectable error, not old data. A “force map entry flush” flushes modified map entries to NAND when an upper page is programmed. After a power failure and restoration, a storage device is able to analysis map entries to determine whether there is some host data in the uncorrectable die, then prevent return of old data to a host.

Abstract: In one aspect, data is stored in a solid state memory which includes first and second memory layers. A first assessment is executed to determine whether received data is hot data or cold data. Received data which is assessed as hot data during the first assessment is stored in the first memory layer, and received data which is first assessed as cold data during the first assessment is stored in the second memory layer. Further, a second assessment is executed to determine whether the data stored in the first memory layer is hot data or cold data. Data which is then assessed as cold data during the second assessment is migrated from the first memory layer to the second memory layer.

Abstract: A technique includes identifying a dependency between a first persistent memory region and at least one other persistent memory region. The technique includes using a process having access to the first persistent memory region to selectively perform garbage collection for the first persistent memory region based at least in part on whether the process has access to the other persistent memory region(s) from which the first persistent memory region depends.

Abstract: In an embodiment, a memory controller may determine that one or more neighboring memory cells associated with a target memory cell in a memory device are to be refreshed. The controller may generate a command associated with refreshing the one or more neighboring memory cells. The controller may transfer the command from the memory controller to the memory device containing the target memory cell. The command may direct the memory device to refresh the neighboring memory cells and/or return one or more addresses associated with the neighboring memory cells.

Abstract: A die-stacked memory device implements an integrated QoS manager to provide centralized QoS functionality in furtherance of one or more specified QoS objectives for the sharing of the memory resources by other components of the processing system. The die-stacked memory device includes a set of one or more stacked memory dies and one or more logic dies. The logic dies implement hardware logic for a memory controller and the QoS manager. The memory controller is coupleable to one or more devices external to the set of one or more stacked memory dies and operates to service memory access requests from the one or more external devices. The QoS manager comprises logic to perform operations in furtherance of one or more QoS objectives, which may be specified by a user, by an operating system, hypervisor, job management software, or other application being executed, or specified via hardcoded logic or firmware.

Abstract: An example method to allocate a virtual disk for a virtual machine in a virtualized computing system includes allocating a plurality of virtual machine disk file (VMDK) candidates in a virtual machine file system (VMFS) volume, selecting a subset of VMDK candidates from the plurality of VMDK candidates for having performance scores indicative of higher I/O throughputs associated with the one or more physical hard disks than rest of the plurality of VMDK candidates, and configuring the virtual disk based on the subset of the VMDK candidates. The VMFS volume is supported by one or more physical hard disks in a storage system in the virtualized computing system.

Abstract: An information storage device includes a storage unit to which a storage region is assigned, a first management information storage unit that stores address information indicating an address range of the storage region in association with identification information identifying the storage region, and a processor that executes a procedure that includes acquiring the address information corresponding to the identification information from the first management information storage unit and accesses the storage region corresponding to the address information and rewriting the identification information stored in the first management information storage unit.

Abstract: A Flash-based storage system, card, and/or module comprises a Flash controller configured to encrypt the data pages of a page stripe by shuffling the data pages, including loading each data page into a data shuffling buffer in a sequential order relative to other data pages in the page stripe, and thereafter unloading each data page in a non-sequential order relative to other data pages in the page stripe. The Flash controller is also configured to scramble the data pages of the page stripe by performing a bitwise logical operation on the data pages that are unloaded from the data shuffling buffer. A user key and one or more system keys are used to perform the shuffling and scrambling. The Flash controller is further configured to flush the user key by bypassing the system's backup power supply and performing an emergency system shutdown without backing up system data.

Abstract: Described are methods, systems, and apparatus for reducing storage system polling when collecting and providing storage system state data. A plurality of poll requests for storage system state data is received. For each poll request of the plurality of poll requests, a poll request arrival time associated with the poll request is stored. A first poll is initiated to collect first storage system state data for a first poll request of the plurality of poll requests. A first poll start time associated with the first poll is stored. The first poll is completed, forming the first storage system state data. For each poll request of the plurality of poll requests, the first storage system state data is provided for the poll request provided that the poll request arrival time is before the first poll start time.

Abstract: According to one embodiment, a communication device includes a data storage device and following units. The reception unit receives data from another communication device. The data storage device includes a data area controlled by a file system and a temporary area beyond control of the file system. The processing unit operates in one of first and second start modes, the processing unit being started faster in the second start mode than in the first start mode. The processing unit operating in the second start mode writes the received data to the temporary area, copies the received data in the temporary area to the data area after completion of data reception, and erases the received data in the temporary area after copying.

Abstract: A method is used in managing provisioning of storage in storage systems. Whether a logical object requires a slice for recovering the logical object is determined. Based on the determination, storage for the slice is provisioned. The slice is provided to the logical object.

Abstract: A die-stacked memory device implements an integrated coherency manager to offload cache coherency protocol operations for the devices of a processing system. The die-stacked memory device includes a set of one or more stacked memory dies and a set of one or more logic dies. The one or more logic dies implement hardware logic providing a memory interface and the coherency manager. The memory interface operates to perform memory accesses in response to memory access requests from the coherency manager and the one or more external devices. The coherency manager comprises logic to perform coherency operations for shared data stored at the stacked memory dies. Due to the integration of the logic dies and the memory dies, the coherency manager can access shared data stored in the memory dies and perform related coherency operations with higher bandwidth and lower latency and power consumption compared to the external devices.