Patents Examined by Hyung Sough
  • Patent number: 7308598
    Abstract: A method, an apparatus and a computer program product are provided for the compression of array redundancy data. Array redundancy data can be lengthy and take up a lot of space on a processor. This invention provides an algorithm that can compress array redundancy data for storage, and decompress and reload the array redundancy data at power-on of the processor. This compression algorithm saves a lot of space on the processor, which enables the processor to save power during operation, and function more efficiently. This algorithm also skips defective array redundancy data, which can be detrimental to the processor.
    Type: Grant
    Filed: November 4, 2004
    Date of Patent: December 11, 2007
    Assignee: International Business Machines Corporation
    Inventors: Irene Beattie, Ingemar Holm, Mack Riley
  • Patent number: 7305526
    Abstract: Provided are a method, system, and program for transferring data directed to virtual memory addresses to a device memory. Indicator bits are set for ranges of device memory addresses in a device accessible over an Input/Output (I/O) bus indicating whether gathering is enabled for the device memory address ranges. Transfer operations are processed to transfer data to contiguous device memory addresses in the device. A determination is made as to whether the indicator bits for the contiguous device memory addresses indicate that gathering is enabled. A single bus I/O transaction is generated to transfer data for the contiguous device memory addresses over the I/O bus in response to determining that the indicator bits for the contiguous device memory addresses indicate that gathering is enabled.
    Type: Grant
    Filed: November 5, 2004
    Date of Patent: December 4, 2007
    Assignee: International Business Machines Corporation
    Inventors: Michael Thomas Benhase, Robert Alan Cargnoni, James Stephen Fields, Jr., Michael John Mayfield, Bruce Mealey
  • Patent number: 7305529
    Abstract: A method or apparatus for cooperative data replication. The method in one embodiment can be performed by a computer system or several computer systems executing software instructions. The method may include modifying data in n data blocks of a data volume to create n modified data blocks. A copy of each of the n modified data blocks is created for subsequent transfer to other nodes. A first computer system transmits the n modified data block copies to n nodes, respectively, wherein each of the n nodes comprises a second computer system and a replica of the data volume prior to the modification of data in the n data blocks. Thereafter, one of the n second computer systems transmits a copy of the modified data block copy it receives to another of the n second computer systems.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: December 4, 2007
    Assignee: Symantec Corporation
    Inventors: Anand A. Kekre, Ankur P. Panchbudhe, Amol Katkar
  • Patent number: 7305522
    Abstract: A method, system, and device for enabling intervention across same-level cache memories. In a preferred embodiment, responsive to a cache miss in a first cache memory a direct intervention request is sent from the first cache memory to a second cache memory requesting a direct intervention that satisfies the cache miss. In an alternate embodiment, direct intervention is utilized to access a same-level victim cache.
    Type: Grant
    Filed: February 12, 2005
    Date of Patent: December 4, 2007
    Assignee: International Business Machines Corporation
    Inventors: Leo James Clark, James Stephen Fields, Jr., Guy Lynn Guthrie, Bradley David McCredie, William John Starke
  • Patent number: 7305523
    Abstract: A method, system, and device for enabling intervention across same-level cache memories. In a preferred embodiment, responsive to a cache miss in a first cache memory a direct intervention request is sent from the first cache memory to a second cache memory requesting a direct intervention that satisfies the cache miss.
    Type: Grant
    Filed: February 12, 2005
    Date of Patent: December 4, 2007
    Assignee: International Business Machines Corporation
    Inventors: Guy Lynn Guthrie, William John Starke, Derek Edward Williams
  • Patent number: 7302520
    Abstract: An apparatus for data storage includes a cluster of NFS servers. Each server has network ports for incoming file system requests and cluster traffic between servers. The apparatus includes a plurality of storage arrays in communication with the servers. The servers utilize a striped file system for storing data. A method for data storage. A method for establishing storage for a file. A method for removing a file from storage. A method for reading data in a file. A method for writing data in a file.
    Type: Grant
    Filed: December 2, 2003
    Date of Patent: November 27, 2007
    Assignee: Spinnaker Networks, LLC
    Inventors: Michael L. Kazar, Richard N. Sanzi, Jr.
  • Patent number: 7302542
    Abstract: A method of dynamically allocating a variable in a tracing framework, including allocating a dynamic memory in the tracing framework having a plurality of data chunks, placing at least one of the plurality of data chunks onto a free list, allocating the at least one of the plurality of data chunks on the free list to store the variable and removing the at least one of the plurality of data chunks from the free list, deallocating the at least one of the plurality of data chunks and placing the at least one of the plurality of data chunks on a dirty list, and cleaning the at least one of the plurality of data chunks on the dirty list using a cleaning procedure to place the one of the plurality of data chunks on the free list.
    Type: Grant
    Filed: November 14, 2003
    Date of Patent: November 27, 2007
    Assignee: Sun Microsystems, Inc.
    Inventor: Bryan M. Cantrill
  • Patent number: 7302536
    Abstract: Aspects of the invention provide for at least one first data portion of a first storage device in a system to be updated to a second storage and further replicating the update to a second data storage portion of the second storage device if a substantial system error fails to occur during the updating of the first data storage portion. Aspects can, for example, include facilitating restoration of a primary or secondary volume of a primary storage device or of a first or second secondary storage via secondary storage device copying, and/or alternative, alternating or internal/external application driven first and second (and/or further) secondary storage portion utilization. Aspects can also include state driven synchronization or re-synchronization of local and remote copies, or one or more of storage devices utilized can, for example, include a disk array.
    Type: Grant
    Filed: June 17, 2003
    Date of Patent: November 27, 2007
    Assignee: Hitachi, Ltd.
    Inventor: Naoki Watanabe
  • Patent number: 7299335
    Abstract: A system for obtaining translation information from a data processing system transparent to the operation of a processor core of the data processing system. In one embodiment, the processor includes a processor core and memory management circuitry. The memory management circuitry stores translation information. The data processing system includes debugging circuitry for obtaining translation information stored in the memory management circuitry and for providing that information externally.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: November 20, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventor: William C. Moyer
  • Patent number: 7299331
    Abstract: The specification may disclose a computer system that may have two memory boards operated in a mirrored mode. The computer system may have the ability to operate in a mirrored mode with the memory boards having varying amounts of memory. This feature may allow for adding main memory to the computer system while the computer system is operational.
    Type: Grant
    Filed: January 21, 2003
    Date of Patent: November 20, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Kevin G. Depew, David F. Heinrich, Vincent Nguyen, David W. Engler
  • Patent number: 7296129
    Abstract: A packetized cascade memory system including a plurality of memory assemblies, a memory bus including multiple segments, a bus repeater module and a segment level sparing module. The bus repeater module is in communication with two or more of the memory assemblies via the memory bus. The segment level sparing module provides segment level sparing for the communication bus upon segment failure.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: November 13, 2007
    Assignee: International Business Machines Corporation
    Inventors: Kevin C. Gower, Kevin W. Kark, Mark W. Kellogg, Warren E. Maule
  • Patent number: 7296120
    Abstract: Disclosed is an apparatus, method, and program product that provides atomic, multi-word load support without incurring additional memory utilization. A double-word is atomically loaded without the use of one or more additional fields and without a lock. An invalidity marker is used in connection with a cache miss time to ascertain whether a loaded double-word has been stored and loaded atomically, and is thus, valid.
    Type: Grant
    Filed: November 18, 2004
    Date of Patent: November 13, 2007
    Assignee: International Business Machines Corporation
    Inventors: Michael Joseph Corrigan, Timothy Joseph Torzewski
  • Patent number: 7293133
    Abstract: System and method for performing operations in a multi-class file system without requiring split mirrors. For one or more storage classes in the multi-class file system, operations that require stable copies of the storage classes may be performed without using split mirrors. In one embodiment, read-only data may be assigned and/or migrated to lower storage classes, and operations may be performed on the read-only storage classes without using split mirrors. In one embodiment, to perform an operation without using a split mirror, a write lock of a storage class may be examined to determine if the write-locked storage class has been written to during the operation on the storage class and, if so, the operation may be retried for the storage class. In one embodiment, the file system software may be blocked from enabling a storage class for writing for the duration of the operation on the storage class.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: November 6, 2007
    Assignee: Veritas Operating Corporation
    Inventors: John Colgrove, Par Botes, Michael Timpanaro, Charles H. Silvers, Peter Vajgel
  • Patent number: 7293009
    Abstract: Servers in a network cluster can each store a copy of a data item in local cache, providing read access to these copies through read-only entity beans. The original data item in the database can be updated through a read/write entity bean one of the cluster servers. That cluster server has access to an invalidation target, which contains identification information relating to copies of the data item stored on servers in the cluster. Once the read/write bean updates the data item in the database, an invalidate request can be sent or multicast to all cluster members, or to any read-only bean or server contained in the invalidation target. Each server or read-only bean receiving the request knows to drop any copy of the data item in local cache, and can request a current copy of the data item from the database.
    Type: Grant
    Filed: April 13, 2005
    Date of Patent: November 6, 2007
    Assignee: BEA Systems, Inc.
    Inventors: Dean Bernard Jacobs, Rob Woollen, Seth White
  • Patent number: 7293157
    Abstract: One embodiment of the present invention provides a system that logically partitions different classes of translation lookaside buffer (TLB) entries within a single caching structure. Upon receiving a request to lookup an address translation, the system applies a hash function to parameters associated with the request to determine a corresponding location in the single caching structure where a TLB entry for the request can reside. If the corresponding location contains a TLB entry for the request, the system returns data from the TLB entry to facilitate the address translation. This hash function partitions the single caching structure so that different classes of TLB entries are mapped to separate partitions of the single caching structure. In this way, the single caching structure can accommodate different classes of TLB entries at the same time.
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: November 6, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Vipul Y. Parikh, Quinn A. Jacobson
  • Patent number: 7293147
    Abstract: A virtual private volume control system, wherein in a data frame of a command issued from an OS, an ID number for identifying the OS is attached to the command; inside the disk apparatus, exclusion/priority processing is controlled, based on the ID number; thereby enhancing the transaction processing performance of a complex of servers and the disk apparatus as a whole.
    Type: Grant
    Filed: October 13, 2004
    Date of Patent: November 6, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Atsushi Tanaka, Kiyohiro Obara, Hiroaki Odawara
  • Patent number: 7290101
    Abstract: An apparatus and method implemented by a computer system of using data copies of a volume for redundancy when data of the volume is rendered corrupted or inaccessible. In one embodiment of the method a data volume is created. The data volume comprises a plurality of data blocks including a first data block. After creation of the data volume, a point-in-time (PIT) copy or a replica copy of the data volume is created, and a redirection map is created. The redirection map comprises a plurality of entries, wherein each entry of the map indicates whether memories allocated to store data of respective data blocks of the data volume and the PIT copy or the replica copy, contain identical data. Data of the data volume may become corrupt or inaccessible after creation of the PIT copy or replica copy.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: October 30, 2007
    Assignee: Symantec Corporation
    Inventors: Anand A. Kekre, Ankur P. Panchbudhe
  • Patent number: 7287110
    Abstract: A storage device for a multibus architecture includes at least one memory to store data, information, and/or addresses, along with a memory connection having a port to connect the memory to one of the buses of the multibus architecture. The memory connection, the port, and the bus have data lines to transmit data along with address lines to transmit addresses, and/or control information to control the memory and other devices connected to each specific bus within the multibus architecture. A switching device selectively connects the memory connection to one of the buses to enable a memory access to transmit data, addresses, and/or control information to or from the selected one of these buses.
    Type: Grant
    Filed: January 22, 2004
    Date of Patent: October 23, 2007
    Assignee: Micronas GmbH
    Inventors: Ralf Herz, Carsten Noeske
  • Patent number: 7287129
    Abstract: There is provided a storage management system capable of utilizing division management with enhanced flexibility and of enhancing security of the entire system, by providing functions by program products in each division unit of a storage subsystem. The storage management system has a program-product management table stored in a shared memory in the storage subsystem and showing presence or absence of the program products, which provide management functions of respective resources to respective SLPRs. At the time of executing the management functions by the program products in the SLPRs of users in accordance with instructions from the users, the storage management system is referred to and execution of the management function having no program product is restricted.
    Type: Grant
    Filed: May 17, 2006
    Date of Patent: October 23, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Shuichi Yagi, Kozue Fujii, Tatsuya Murakami
  • Patent number: 7287045
    Abstract: A backup method is provided for use with a storage system composed of a memory which stores a control program, a disk drive having an primary volume, a differential volume, and mapping information, the primary volume storing data sent from a client, the differential volume storing differential data of a snapshot of the primary volume, the mapping information managing the relation between data stored in the primary volume and differential data stored in the differential volume, and a control processor which controls read and write of data in the disk drive. The mapping information is referred to compose the data stored in the primary volume and the differential data stored in the differential volume. The composed data is sent to a backup device.
    Type: Grant
    Filed: July 26, 2004
    Date of Patent: October 23, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Nobuyuki Saika, Naohiro Fujii