Patents Examined by James Peikari
  • Patent number: 7240180
    Abstract: A method and system where a hardware platform such as a disk drive is formatted to the largest block length it is desired to read from or write to. Using commands, data can be accessed from the drive in any block length that is equal to or less than the formatted block length.
    Type: Grant
    Filed: June 12, 2003
    Date of Patent: July 3, 2007
    Assignee: International Business Machines Corporation
    Inventors: Thomas R. Forrer, Jr., Jason Eric Moore, Abel Enrique Zuzuarregui
  • Patent number: 7237071
    Abstract: A single chip, embedded symmetric multiprocessor (ESMP) having parallel multiprocessing architecture composed of identical processors includes a single program memory. Program access arbitration logic supplies an instruction to a single requesting central processing unit at a time. Shared memory access arbitration logic can supply data from separate simultaneously accessible memory banks or arbitrate among central processing units for access. The system may simulate an atomic read/modify/write instruction by prohibiting access to the one address by another central processing unit for a predetermined number of memory cycles following a read access to one of a predetermined set of addresses in said shared memory.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: June 26, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Steven R. Jahnke
  • Patent number: 7234033
    Abstract: A processing system includes a local or local storage and a number of remote or remote storage systems that store data mirroring that maintained by the local storage system. Data that is written, changed, deleted or other wise modified by the local storage system is periodically sent to the remote storage systems to update the mirroring data maintained by each.
    Type: Grant
    Filed: April 26, 2004
    Date of Patent: June 19, 2007
    Assignee: Hitachi, Ltd.
    Inventor: Naoki Watanabe
  • Patent number: 7234028
    Abstract: A multiprocessor system may include multiple processors and multiple caches associated with the processors. The system may employ a memory snarfing technique to reduce writes to the system (or main) memory. Cache-ownership capable agents, e.g., agents with write-back caches, may snarf the data (obtain the cache line) if the required cache line is in a valid state in the agent's cache.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: June 19, 2007
    Assignee: Intel Corporation
    Inventors: Samantha J. Edirisooriya, Sujat Jamil, David E. Miner, R. Frank O'Bleness, Steven J. Tu
  • Patent number: 7228394
    Abstract: A secondary storage device for a digital computer includes a housing, an attachment means coupled to an outside surface of the housing for allowing said housing to be easily attached to the computer system, a primary disk drive disposed within said housing, at least one back-up disk drive disposed within the housing, mirror circuitry disposed within the housing, and coupled to the primary disk drive, and the at least one back-up disk drive, bus connection means coupled to the mirror circuitry for connecting said secondary storage device to a main bus of the digital computer, and timing means coupled between the mirror circuitry and one of the back-up disk drives for creating mirror back-up images of the primary disk drive at pre-determined intervals.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: June 5, 2007
    Inventor: Joseph Herzig
  • Patent number: 7222369
    Abstract: A method includes storing a plurality of role data entries on a storage device coupled to a computer system, each role data entry corresponding to an assigned role of at least one of a plurality of individuals, each role corresponding to an enterprise with which the individual is associated and corresponding to a set of resources accessible through the computer system, receiving at the computer a resource request from one of the individuals, determining whether the requested resource is included in the set of accessible resources corresponding to the assigned role of the requesting individual, and selectively permitting access to the requested resource if the resource is determined to be in the set of resources corresponding to the assigned role of the requesting individual.
    Type: Grant
    Filed: November 27, 2002
    Date of Patent: May 22, 2007
    Assignee: SAP AG
    Inventors: Matthias Vering, Peter Barth, Sven Schwerin-Wenzel, Thomas Anton, Peter Bittner
  • Patent number: 7219208
    Abstract: The present invention allows a pair to be formed between a plurality of discrete volumes and the progress thereof to be managed by means of a remote operation from a management server. Management server 10 instructs respective host computers 20, 30 to generate configuration files 23, 33. Next, management server 10 instructs host computers 20, 30 to start up HORCM (Hitachi Remote Copy Module) instances 24, 34. The generation of the configuration files and the startup of the HORCM instances can be separated. In one mode, configuration files are generated and the HORCM instances are started up, while, in another mode, only configuration files are generated. In yet another mode, the HORCM instances are started up when predetermined conditions are fulfilled. A more flexible operation can thus be performed.
    Type: Grant
    Filed: July 23, 2004
    Date of Patent: May 15, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Yuichiro Nagashima, Shotaro Ohno
  • Patent number: 7219188
    Abstract: A CAM includes a plurality of CAM blocks, each including an array of CAM cells divided into a plurality of segments, each array segment for storing a number of data values that are assigned the same priority, a plurality of block priority circuits, each having inputs to receive match signals from a corresponding CAM block and having outputs to generate a block index and priority of a matching data value in the corresponding CAM block assigned the highest priority, and a global priority and index circuit having inputs to receive the block indexes and associated priorities from the block priority circuits, and having an output to generate a device index and associated priority of the highest priority matching value.
    Type: Grant
    Filed: February 6, 2004
    Date of Patent: May 15, 2007
    Assignee: NetLogic Microsystems, Inc.
    Inventor: Jose P Pereira
  • Patent number: 7216215
    Abstract: A data access method uses variable mask data and shift amount to write data into or read data from a data storage zone. The mask data and shift amount are determined according to starting and end data bit addresses in a bit range of the data to be read or written. Therefore, the data access method is applicable to various platforms with various byte endians.
    Type: Grant
    Filed: October 24, 2003
    Date of Patent: May 8, 2007
    Assignee: Via Technologies, Inc.
    Inventor: Scott Lee
  • Patent number: 7213118
    Abstract: An automated data storage library accesses data stored on storage media contained in cartridges in response to commands from an external host. The cartridges may include cartridge memory and a component in the library may include a cartridge memory interface for reading data from and/or writing data to the cartridge memory. When a cartridge is to be stored in the library, the library modifies the contents of the cartridge memory, or the contents of the storage media such that the data stored on the cartridge becomes inaccessible, thereby preventing access to the data outside of the library. To perform an authorized access, the library restores the contents of the cartridge memory or the storage media. Alternatively, the library provides a correction or correction algorithm to the drive to allow access to the data stored on the storage media without removing the access protection of the storage media.
    Type: Grant
    Filed: September 29, 2003
    Date of Patent: May 1, 2007
    Assignee: International Business Machines Corporation
    Inventors: Brian G. Goodman, Leonard G. Jesionowski, Glen A. Jaquette
  • Patent number: 7209996
    Abstract: In one embodiment, a processor is provided. The processor includes at least two cores, where each of the cores include a first level cache memory. Each of the cores are multi-threaded. In another embodiment, each of the cores includes four threads. In another embodiment a crossbar is included. A plurality of cache bank memories in communication with the at cores through the crossbar is provided. Each of the plurality of cache bank memories are in communication with a main memory interface. In another embodiment a buffer switch core in communication with each of the plurality of cache bank memories is also included. A server and a method for optimizing the utilization of a multithreaded processor core are also provided.
    Type: Grant
    Filed: October 16, 2002
    Date of Patent: April 24, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Leslie D. Kohn, Kunle A. Olukotun, Michael K. Wong
  • Patent number: 7206918
    Abstract: Apparatus and methods for addressing predicting useful in high-performance computing systems. The present invention provides novel correlation prediction tables. In one embodiment, correlation prediction tables of the present invention contain an entered key for each successor value entered into the correlation table. In a second embodiment, correlation prediction tables of the present invention utilize address offsets for both the entered keys and entered successor values.
    Type: Grant
    Filed: August 12, 2004
    Date of Patent: April 17, 2007
    Assignee: Intel Corporation
    Inventors: Wayne A. Wong, Christopher B. Wilkerson
  • Patent number: 7206912
    Abstract: A storage system includes an application server that provides an application composed of a plurality of programs, a plurality of first volumes that store data that the programs use, and a plurality of second volumes set in pair states where replicas of the plurality of first volumes are stored. A program for managing the storage system controls a computer to execute the procedures of: identifying any one of the plurality of programs; identifying a first volume that the identified program uses; obtaining every second volume set in a pair state with the first volume; and summarizing the first volume and the obtained second volume for the identified program.
    Type: Grant
    Filed: January 12, 2005
    Date of Patent: April 17, 2007
    Assignee: Hitachi, Ltd.
    Inventor: Shogo Mikami
  • Patent number: 7206863
    Abstract: This invention is a system and method for managing one or more data storage networks using a new architecture. A method for handling logical to physical mapping is included in one embodiment with the new architecture. A method for handling errors is included in another embodiment with the new architecture.
    Type: Grant
    Filed: March 26, 2004
    Date of Patent: April 17, 2007
    Assignee: EMC Corporation
    Inventors: Fernando Oliveira, Bradford B. Glade, Jeffrey A. Brown, Peter J. McCann, David Harvey, James A. Wentworth, III, Walter M. Caritj, Matthew Waxman, Lee W. VanTine
  • Patent number: 7203784
    Abstract: A recording medium holder enables a user to easily find a desired recording medium from recording mediums that the user manages. The recording medium holder includes a recording medium holding unit for holding a plurality of recording mediums, a liquid crystal displaying unit for displaying each of the plurality of recording mediums held in the recording medium holding unit by an icon, and an information displaying unit for displaying information of a recording medium that corresponds to an icon clicked in the liquid crystal displaying unit, the information including ID information, title information, index information, and other information. The information is read out from the recording medium at a first click, and from a storing unit at a second click and after.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: April 10, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shunji Harada, Noriko Sugimoto, Shoichiro Nakata
  • Patent number: 7203803
    Abstract: An electronic device (10). The device comprises an input (16I) for receiving successive data words, wherein each data word of the successive data words comprises a plurality of bits. The device also comprises a memory structure (12) comprising a plurality of memory word addresses, wherein each memory word address corresponds to a storage structure operable to store a data word having the plurality of bits. The device also comprises control circuitry (14, 16), operable during a non-overflow condition of the memory structure, for writing successive ones of received data words into respective successive ones of the memory word addresses. Finally, the device also comprises control circuitry (14, 16), operable during an overflow condition of the memory structure, for writing each data word in successive ones of received data words across multiple ones of the memory word addresses.
    Type: Grant
    Filed: February 6, 2004
    Date of Patent: April 10, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Jerome Bombal
  • Patent number: 7203796
    Abstract: A synchronous data mirroring technique includes a log forwarding process and a consistency point (CP) process. During log forwarding, a source storage server receives write requests from clients, creates a log entry for each request in nonvolatile memory, and transmits each log entry to a destination storage server at a mirror site. The destination storage server writes each log entry to a file. If a primary volume becomes inaccessible due to a failure, the file is used to produce an updated mirror volume. The CP process includes updating a primary volume based on the write requests, and updating the mirror volume to reflect the updated primary volume. The mirror volume is updated by transmitting CP data from the source storage server to the destination storage server, and using the CP data to update the mirror volume through a network administration layer and a storage layer in the destination storage server.
    Type: Grant
    Filed: October 24, 2003
    Date of Patent: April 10, 2007
    Assignee: Network Appliance, Inc.
    Inventors: Nitin Muppalaneni, Abhijeet P. Gole, Michael L. Federwisch, Mark Smith, Rajesh Sundaram
  • Patent number: 7200726
    Abstract: A source storage server receives various write requests from a set of clients, logs each request in local memory, and forwards each log entry to a destination storage server at a secondary site. At a consistency point, the source storage server saves data, modified per the requests, to a first set of mass storage devices, and also initiates a synchronization phase during which process the modified data is mirrored at the secondary site. The destination storage server uses data in the received log entries to mirror at least a portion of the modified data in a second set of mass storage devices located at the secondary site, such that said portion of the modified data does not have to be sent from the source storage server to the destination storage server at the consistency point.
    Type: Grant
    Filed: October 24, 2003
    Date of Patent: April 3, 2007
    Assignee: Network Appliance, Inc.
    Inventors: Abhijeet P. Gole, Nitin Muppalaneni
  • Patent number: 7200718
    Abstract: An information distribution system includes an interconnect and multiple data processing nodes coupled to the interconnect. Each data processing node includes mass storage and a cache. Each data processing node also includes interface logic configured to receive signals from the interconnect and to apply the signals from the interconnect to affect the content of the cache, and to receive signals from the mass storage and to apply the signals from the mass storage to affect the content of the cache. The content of the mass storage and cache of a particular node may also be provided to other nodes of the system, via the interconnect.
    Type: Grant
    Filed: April 26, 2004
    Date of Patent: April 3, 2007
    Assignee: Broadband Royalty Corporation
    Inventor: Robert C. Duzett
  • Patent number: 7197614
    Abstract: A method and apparatus for mirroring data stored in a storage device within a mass storage system by copying data stored in a first storage device to a second storage device, while simultaneously flushing the write cache. After the two storage devices are synchronized, the applications running on the server that is coupled to the storage devices are temporarily halted to insure that the data is coherent. To obtain coherency, residual data in the write cache may have to be written to both the first and second storage devices. Thereafter, the mirror is broken and the first storage device can begin to be used to store data and the second storage device can be used for other purposes such as facilitating a backup of the data. In this embodiment, since most, if not all, of the data in the write cache is flushed during the time that the first storage device is copied, execution of the applications is only halted for a very short time period.
    Type: Grant
    Filed: May 7, 2003
    Date of Patent: March 27, 2007
    Assignee: Xiotech Corporation
    Inventor: Steven Edmund Nowakowski