Patents Examined by Jeffrey Zweizig
  • Patent number: 9853486
    Abstract: A resonant wireless power receiver circuit includes an adjustable impedance matching circuit and a receiver circuit, the impedance matching circuit and the receiver circuit in combination receive a wireless power and generate a resonant output. A rectifier is coupled to the combination of the adjustable impedance matching circuit and the receiver circuit to rectify the resonant output to generate a rectified output. The impedance of the adjustable impedance matching circuit is controlled by a feedback control circuit such that the load impedance of rectified output is regulated at a pre-determined impedance value, or the voltage of the rectified output is regulated at a pre-determined voltage value.
    Type: Grant
    Filed: February 10, 2016
    Date of Patent: December 26, 2017
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Kuo-Chi Liu, Wei-Hsin Wei
  • Patent number: 9853460
    Abstract: A power conversion circuit includes multiple input-side capacitors connected in series between input terminals; series circuits composed of high-side switching elements and low-side switching elements connected in parallel to the multiple input-side capacitors; and output-side capacitors connected between nodes and a node. The circuit further includes an output-side inductor connected to the node and a controller that alternately turns on and off the high-side switching elements and the low-side switching elements. Each of the low-side switching elements and the high-side switching elements is a MOSFET and causes current to flow from the low side to the high side using a body diode. Accordingly, there is provided a power conversion circuit that has high conversion efficiency and that is capable of realizing reduction in size, a power transmission system, and a power conversion system.
    Type: Grant
    Filed: November 18, 2015
    Date of Patent: December 26, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Keiichi Ichikawa, Tatsuya Hosotani
  • Patent number: 9853640
    Abstract: A floating core network for secure isolation of a circuit from an external supply interface is described. Isolation of a core is accomplished through a dynamic current limiting network providing an isolated core voltage to the core; and an isolated supply for the corresponding core that is continuously recharged by the dynamic current limiting network. The dynamic current limiting network can include two control loops, one control loop providing a fixed gate voltage to a p-type transistor supplying current to the isolated supply and another control loop providing a fixed gate voltage to an n-type transistor sinking current from the isolated supply.
    Type: Grant
    Filed: July 7, 2015
    Date of Patent: December 26, 2017
    Assignee: Chaologix, Inc.
    Inventors: Timothy Arthur Bell, Brent Arnold Myers
  • Patent number: 9853013
    Abstract: According to one embodiment, a semiconductor device includes chips and a first selection circuit. Each of the chips has at least first and second vias for transmitting at least first and second address signals, wherein these chips are stacked to be electrically connected via the first and second vias. The first selection circuit is provided in each chip, and includes a logic circuit that selects a chip based on at least the first and second address signals, and supplies a result of operating the first and second address signals to the subsequent chip.
    Type: Grant
    Filed: August 9, 2016
    Date of Patent: December 26, 2017
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Masaru Koyanagi
  • Patent number: 9838025
    Abstract: An apparatus includes circuitry and an oscillator circuit that may be configured to generate a clock signal dependent upon a control signal. The circuitry may be configured to perform a frequency measurement of the clock signal. In response to a determination that the frequency of the clock signal is greater than a first threshold, the circuitry may also be configured to perform a phase comparison between a divided clock signal and a reference clock signal, and to adjust a value of the control signal such that the adjusted value depends upon a result of the comparison. In response to a determination that the frequency of the clock signal is less than the first threshold, the circuitry may be configured to adjust the value of the control signal such that the adjusted value depends upon a result of the measurement.
    Type: Grant
    Filed: August 10, 2016
    Date of Patent: December 5, 2017
    Assignee: Apple Inc.
    Inventors: Wei Deng, Dennis Fischette, Jr., Gin Yee
  • Patent number: 9835670
    Abstract: An isolator includes: a transmission circuit that generates an alternating current transmission signal in which a first potential is set to be a reference potential; a first insulating element to which the alternating current transmission signal is supplied; a second insulating element that generates an alternating current reception signal in which a second potential is set to be a reference potential by being alternating current-coupled to the first insulating element through an insulating film; a reception circuit that reproduces reception data based on the alternating current reception signal; an impedance control unit that controls an impedance of the first or the second insulating element to be higher than an impedance before the control; and a leakage current detection unit that detects a leakage current flowing between the first and the second insulating elements through the first or the second insulating element in which the impedance has been controlled.
    Type: Grant
    Filed: May 27, 2016
    Date of Patent: December 5, 2017
    Assignee: Renesas Electronics Corporation
    Inventor: Hirokazu Nagase
  • Patent number: 9831685
    Abstract: A wireless power transmitter according to an exemplary embodiment in the present disclosure may include a transmitting core; a transmitting coil provided on the transmitting core and transmitting power wirelessly; and a magnetic body provided on the transmitting core and allowing a virtual line which is normal to a surface of the magnetic body to form an acute angle with the transmitting core.
    Type: Grant
    Filed: May 8, 2015
    Date of Patent: November 28, 2017
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Chang Mok Han, Ki Won Chang, Isaac Nam, Sung Heum Park, Chul Gyun Park, Jae Suk Sung, Hyun Keun Lim
  • Patent number: 9821737
    Abstract: A battery combiner may be used to electrically isolate first and second batteries during conditions in which a first battery required for a mechanical drive system may experience excessive power draw. The second battery may be used to provide a switched and/or continuous power source to a control system and/or other electrical devices for reliable operation, and the combiner may join the first and second batteries together such that both are electrically charged by a single alternator during conditions when it is safe.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: November 21, 2017
    Assignee: CNH Industrial Americal LLC
    Inventors: Nathan Brooks, Steven Winkel
  • Patent number: 9825460
    Abstract: A cable drop compensation circuit includes a current detection circuit, a compensation judgment circuit, and a compensation circuit. The current detection circuit detects a load current supplied to a load by a DC output circuit, so as to generate a current detection signal. The compensation judgment circuit receives the current detection signal, and generates a judgment signal when judging the load current higher than a predetermined compensation value. When receiving the judgment signal, the compensation circuit generates a compensation signal. In response to the compensation signal, the DC output circuit raises an output voltage by a compensation voltage.
    Type: Grant
    Filed: May 7, 2015
    Date of Patent: November 21, 2017
    Assignee: GREEN SOLUTION TECHNOLOGY CO., LTD.
    Inventors: Chen-Hsung Wang, Che Wang, Shian-Sung Shiu, Zhong-Wei Liu
  • Patent number: 9819189
    Abstract: A switchable supply network for powering multiple digital islands. In one embodiment, a first digital island includes a first power collapsible circuit and a first retention circuit, and a second digital island includes a second power collapsible circuit and a second retention circuit. In a normal mode of operation, the first digital island is provided a first supply voltage and a second digital island is provided a second supply voltage higher than the first supply voltage. In a transition mode the second power collapsible circuit is powered down and the second supply voltage is lowered and provided to the second retention circuit. When the second supply voltage falls below the first supply voltage, the first power collapsible circuit is powered down. The second supply voltage is now provided only to the retention circuits, and is furthered lowered in a retention mode to a final retention voltage.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: November 14, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Chunlei Shi, Yu Pu, Kenneth David Easton, Kendrick Hoy Leong Yuen, Giby Samson
  • Patent number: 9800063
    Abstract: A power transmission device includes an AC power generator for generating an AC voltage and applying it to first and second power transmission electrodes. A controller controls the AC voltage applied to the first and second power transmission electrodes. To this end, the controller monitors the voltage on the first electrode and determines how that voltage changes at the beginning and end of each of a plurality of predetermined time intervals, monitors the voltage on the second electrode and determines how that voltage changes at the beginning and end of each of the plurality of predetermined time intervals, and determines when to cut off the application of the AC voltage to the first and second power transmission electrodes as a function of the manner in which the voltage on those electrodes changes at the beginning and end of at least one of the predetermined time intervals.
    Type: Grant
    Filed: November 20, 2015
    Date of Patent: October 24, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kazuya Kato
  • Patent number: 9787135
    Abstract: The disclosed invention is intended to prevent malfunction of an internal circuit because of unwanted power supply switching caused by a noise during operation of a semiconductor device powered by a backup power supply, while eliminating wasteful consumption of the backup power supply. A first switching transition time after coupling the main power supply terminal to the internal power supply node until decoupling the backup power supply terminal from the internal power supply node is made longer than a second switching transition time after coupling the backup power supply terminal to the internal power supply node until decoupling the main power supply terminal from the internal power supply node.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: October 10, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Tomoki Yasukawa, Akira Oizumi, Toyohiko Yoshida, Yoshinori Tokioka
  • Patent number: 9787296
    Abstract: A delay circuit includes: a plurality of delay units that are serially coupled with each other in a form of loop and sequentially delay an input signal of the delay circuit; an input control unit that selects a delay unit to receive the input signal of the delay circuit among the plurality of the delay units; and an output control unit that controls an output signal of a predetermined delay unit among the plurality of the delay units to be outputted as an output signal of the delay circuit, when the output signal of the predetermined delay unit is enabled N times, where N is an integer equal to or greater than 0.
    Type: Grant
    Filed: August 11, 2016
    Date of Patent: October 10, 2017
    Assignee: SK Hynix Inc.
    Inventors: Sung-Eun Lee, Kyung-Hoon Kim, Myeong-Jae Park, Woo-Yeol Shin, Han-Kyu Chi, Yong-Ju Kim
  • Patent number: 9780647
    Abstract: A circuit comprises a first circuit and a second circuit. The first circuit is configured to operate at a first-circuit supply voltage value, and to generate a first reference voltage value based on a voltage rated for transistors in a second circuit. The second circuit is configured to operate at a second-circuit supply voltage value, to receive a first signal and the first reference voltage value, and to clamp an input node of the second circuit based on the first reference voltage value. The second-circuit supply voltage value is less than the first-circuit supply voltage value. The first signal is configured to swing between a low voltage value and a voltage value higher than the second-circuit supply voltage value.
    Type: Grant
    Filed: October 23, 2015
    Date of Patent: October 3, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Alan Roth, Chia-Chun Chang, Eric Soenen
  • Patent number: 9768681
    Abstract: A filtering module includes a first inductor and a first capacitor. The first inductor has a first inductance varied by varying the current into the first inductor. The first capacitor is electrically connected to the first inductor. The filtering bandwidth of the filtering module is varied by varying the current into the filtering module.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: September 19, 2017
    Assignee: CHICONY POWER TECHNOLOGY CO., LTD.
    Inventors: Wen-Nan Huang, Ching-Guo Chen, Shiu-Hui Lee, Ching-Chou Tseng
  • Patent number: 9766827
    Abstract: An apparatus is provided which comprises: a first power gate transistor coupled to an ungated power supply node and a gated power supply node, the first power gate transistor having a gate terminal controllable by a first logic; and a second power gate coupled to the ungated power supply node and the gated power supply node, the second power gate transistor having a gate terminal controllable by a second logic, wherein the first power gate transistor is larger than the second power gate transistor, and wherein the second logic is operable to: weakly turn on the second power gate, fully turn on the second power gate, turn off the second power gate, and connecting the second power gate as diode.
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: September 19, 2017
    Assignee: Intel Corporation
    Inventors: Pascal A. Meinerzhagen, Stephen T. Kim, Anupama A. Thaploo, Muhammad M. Khellah
  • Patent number: 9755744
    Abstract: An LED illumination device is configured to receive coded messages by at least one of radio signals in free space, electrically conducted signals by wire, and light wave propagated signals in free space, process the coded messages, and transmit the coded messages by two or more of radio signals in free space, electrically conducted signals by wire, and light wave propagated signals in free space.
    Type: Grant
    Filed: June 20, 2016
    Date of Patent: September 5, 2017
    Assignee: SmartLabs, Inc.
    Inventors: Daniel Brian Cregg, Joseph J Dada
  • Patent number: 9748941
    Abstract: Provided is a stabilizing circuit structure using a sense field effect transistor (sense-FET). A power semiconductor module includes a depletion-mode field effect transistor (D-mode FET) and the sense FET that has same structure as the D-mode FET and varies in area. Also the power semiconductor module includes not only an enhancement-mode field effect transistor (E-mode FET), but also the stabilizing circuit including circuit elements such as a resistor, a capacitor, an inductor, or a diode.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: August 29, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Minki Kim, Hyun-Gyu Jang, Dong Yun Jung, Sang Choon Ko, Hyun Soo Lee, Chi Hoon Jun
  • Patent number: 9740230
    Abstract: A voltage-adjusting device is provided for adjusting voltages of one or more power domains in a chip. The device includes a distributing system, and a voltage-adjusting system. The distributing system obtains task information for the one or more power domains, obtains a forecasted voltage and a detected voltage for a power domain, and obtains a control system for the power domain for controlling a voltage applied on the power domain based on the forecasted voltage and the detected voltage. The forecasted voltage is a voltage required for the power domain to execute a task. Further, the voltage-adjusting system is connected to the distributing system and the one or more power domains, adjusts the voltage applied on the power domain based on the control signal such that the detected voltage reaches the forecasted voltage when the power domain executes a task.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: August 22, 2017
    Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventor: Chia-Chi Yang
  • Patent number: 9742369
    Abstract: A compensation circuit includes an amplifier coupled between a first voltage terminal and a common terminal. The amplifier has a first output terminal. A current source transistor has a current path coupled between a second voltage terminal and a second output terminal. A threshold voltage sense transistor has a current path coupled between the first and second output terminals. A gate and drain of the threshold voltage sense transistor are connected. An output transistor having a current path coupled between the first output terminal and a third output terminal has a gate coupled to the second output terminal.
    Type: Grant
    Filed: May 2, 2016
    Date of Patent: August 22, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Nitin Agarwal, Aniruddha Roy