Patents Examined by Jeffrey Zweizig
  • Patent number: 9741672
    Abstract: An integrated circuit, a method of forming an integrated circuit, and a semiconductor are disclosed for preventing unauthorized use in radiation-hard applications. In one embodiment, the integrated circuit comprises a silicon-on-insulator (SOI) structure, a radiation insensitive sub-circuit, and a radiation sensitive sub-circuit. The SOI structure comprises a silicon substrate, a buried oxide layer, and an active silicon layer. The radiation insensitive sub-circuit is formed on the active layer, and includes a partially depleted transistor. The radiation sensitive sub-circuit is formed on the active layer, and includes a fully depleted transistor, to prevent operation of the radiation sensitive sub-circuit under specified radiation conditions.
    Type: Grant
    Filed: July 6, 2016
    Date of Patent: August 22, 2017
    Assignee: International Business Machines Corporation
    Inventors: Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Kenneth P. Rodbell
  • Patent number: 9735769
    Abstract: Systems and methods for controlling current or mitigating electromagnetic or radiation interference effects using multiple different semi-conductive channel regions generating structures formed by multiple different semi-conductive electrical current or voltage control structures. One embodiment includes providing a first and second metal oxide semiconductor field effect transistor (MOSFET) sections formed on opposite sides of a metal-semiconductor field effect transistor (MESFET) such that operation of the MESFET modulates or controls current otherwise controlled by an electrical path of the MOSFET sections. A control system for determining when an embodiment of the invention is to be operated is also provided to include automated systems including sensors as well as manually operated systems. Automated systems can include radiation sensors as well as other control systems such as high voltage radio frequency transmitter or receiver systems. Methods of operation for a variety of modes are also provided.
    Type: Grant
    Filed: October 2, 2015
    Date of Patent: August 15, 2017
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Jeffrey L. Titus
  • Patent number: 9729057
    Abstract: The present disclosure describes apparatuses and techniques of fast transient response for switching power regulators. In some aspects, a capacitor is disconnected from an output of a feedback amplifier of a switching power regulator that is operating in a discontinuous mode. This can be effective to prevent a voltage of the capacitor from discharging while the switching power regulator operates in the discontinuous mode. Responsive to the switching power regulator transitioning from the discontinuous mode to a continuous mode to provide an increased amount of current, the capacitor is connected to the output of the feedback amplifier. Connecting the non-discharged capacitor can be effective to enable the switching power regulator to provide the increased amount of current to the load more quickly.
    Type: Grant
    Filed: February 9, 2016
    Date of Patent: August 8, 2017
    Assignee: Marvell International Ltd.
    Inventors: Sofjan Goenawan, Luyang Luo, Wei Lu
  • Patent number: 9728963
    Abstract: The principles described herein provide an electrical power supply system having circuitry that reduces the noise and interference of harmonic signals introduced by non-linear loads. In particular, one or more embodiments can include a power correction system that includes transformers and capacitors having parameters and configured to redirect harmonic energy in a power signal to deliver clean power to loads in a system. Additionally, the power correction system can mitigate negative effect of in-rush current passing through the electrical power supply system resulting in more efficient energy usage and reducing power failure of loads in the system. Moreover, the power correction system can include various additional features that facilitate convenient connection and/or disconnection of the power control system without disrupting the delivery of electrical power to loads in the system.
    Type: Grant
    Filed: March 12, 2015
    Date of Patent: August 8, 2017
    Assignee: TRUE POWER ELECTRIC, LLC
    Inventors: Scott C. Duncan, Collin S. Duncan, Jacob B. Duncan
  • Patent number: 9725007
    Abstract: An electric vehicle includes a voltage converter, a temperature sensor, and a control unit. The voltage converter performs bidirectional voltage conversion between an output electric path and one or both of first and second batteries, while allowing switching of an operating mode between a serial operating mode in which the first and second batteries are connected in series relative to the output electric path, and a parallel operating mode in which the first and second batteries are connected in parallel. The temperature sensor detects a temperature of each battery. The control unit switches the operating mode of the voltage converter. When the temperature of one battery is equal to or larger than a predetermined upper threshold value A, or equal to or smaller than a predetermined lower threshold value B, the control unit switches the operating mode of the voltage converter to the parallel operating mode.
    Type: Grant
    Filed: May 6, 2015
    Date of Patent: August 8, 2017
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventor: Toshiya Hashimoto
  • Patent number: 9716109
    Abstract: An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.
    Type: Grant
    Filed: March 8, 2016
    Date of Patent: July 25, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Atsushi Hirose, Masashi Tsubuku, Kosei Noda
  • Patent number: 9703310
    Abstract: Representative implementations of devices and techniques provide a reduction in the spread of a bandgap voltage of a bandgap reference circuit. The biasing current for a target bipolar device is conditioned by passing it through one or more like bipolar devices prior to biasing the target bipolar device.
    Type: Grant
    Filed: May 28, 2014
    Date of Patent: July 11, 2017
    Assignee: Infineon Technologies Austria AG
    Inventor: Yong Siang Teo
  • Patent number: 9704977
    Abstract: Energy-filtered cold electron devices use electron energy filtering through discrete energy levels of quantum wells or quantum dots that are formed through band bending of tunneling barrier conduction band. These devices can obtain low effective electron temperatures of less than or equal to 45K at room temperature, steep electrical current turn-on/turn-off capabilities with a steepness of less than or equal to 10 mV/decade at room temperature, subthreshold swings of less than or equal to 10 mV/decade at room temperature, and/or supply voltages of less than or equal to 0.1 V.
    Type: Grant
    Filed: February 3, 2015
    Date of Patent: July 11, 2017
    Assignee: BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM
    Inventors: Seong Jin Koh, Pradeep Bhadrachalam, Liang-Chieh Ma
  • Patent number: 9698673
    Abstract: A method for controlling an electronic circuit by means of the first, second and third operating parameters, comprises: determining a range of variation of the third parameter for each value of the first parameter by varying the second parameter, said ranges being different; determining a target value of the third parameter; if the target value is within one of the ranges, operating the electronic circuit by setting the third parameter to the target value; and in the opposite case, selecting the two ranges framing the target value and operating the electronic circuit by consecutively bringing the third parameter into each one of the selected ranges.
    Type: Grant
    Filed: September 5, 2014
    Date of Patent: July 4, 2017
    Assignees: Commissariat à l'Energie Atomique et aux Energies Alternatives, Université de Montpellier
    Inventors: Yeter Akgul, Edith Beigne, Pascal Benoit, Suzanne Lesecq, Diego Puschini Pascual
  • Patent number: 9696744
    Abstract: Bandgap Voltage Reference circuits configured to produce reference voltages with both voltage offset and a voltage temperature slope are disclosed. By generating the voltage offset from a temperature-independent current, the voltage offset of the reference voltage may be temperature-independent, while generating the voltage temperature slope from a temperature-dependent current allows the voltage temperature slope to vary with temperature. To ensure that the voltage offset remains independent from the voltage temperature slope, an apparatus is disclosed for orthogonal trimming of voltage offset and voltage temperature slope.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: July 4, 2017
    Assignee: Kilopass Technology, Inc.
    Inventor: Wen Fang
  • Patent number: 9697473
    Abstract: A Josephson parametric converter is provided. The Josephson parametric converter includes a multi-Josephson junction ring modulator having a first, a second, a third, and a fourth node and a first, a second, a third, and a fourth array of N Josephson junctions arranged in a ring configuration with the nodes inter-dispersed between the arrays. The first array is between the first and second nodes, the second array is between the second and third nodes, the third array is between the third and fourth nodes, and the fourth array is between the fourth and first nodes. N is an integer having a value greater than one. The Josephson parametric converter further includes a first and a second resonator formed from lumped-element capacitors that shunt the multi-Josephson junction ring modulator and respectively enable a first and a second mode of the Josephson parametric converter.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: July 4, 2017
    Assignee: International Business Machines Corporation
    Inventor: Baleegh Abdo
  • Patent number: 9694692
    Abstract: A vehicle controlling system includes a high-voltage circuit including a motor for driving a vehicle and a generator driven by an engine; an intermediate-voltage circuit including a battery and having a potential lower than the potential of the high-voltage circuit; a low-voltage circuit having a potential lower than the potential of the intermediate-voltage circuit, accessories being disposed to the low-voltage circuit; a transformer disposed between the high-voltage circuit and the intermediate-voltage circuit; and a down converter disposed between the intermediate-voltage circuit and the low-voltage circuit.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: July 4, 2017
    Assignee: MITSUBISHI JIDOSHA KOGYO KABUSHIKI KAISHA
    Inventors: Kuniaki Kaihara, Shohei Kawano, Hiroyuki Sakai, Atsushi Kodama, Yuya Suzuki
  • Patent number: 9698757
    Abstract: The ABB blocks 332, 334, 336, and 318 are configured to process the I/Q signals corresponding to the first or the second HB independently or the I/Q signals corresponding to the LB in cooperation by two. In detail, the first ABB I block 332 and the first ABB Q block 334 operate independently in the 3G/4G mode but they are configured to process the I signal (or Q signal) of the LB in the 2G mode. Likewise, the second ABB Q block 336 and the second ABB I block 318 operate independently in the 3G/4G mode but they are configured to process the Q signal (or I signal) of the LB in the 2G mode. The first ABB I/Q blocks 332 and 334 and the second ABB I/Q blocks 336 and 318 are arranged symmetrically to processing the I/Q signals cooperatively in the 2G mode.
    Type: Grant
    Filed: July 24, 2014
    Date of Patent: July 4, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byungki Han, Suseob Ahn, Jongwoo Lee
  • Patent number: 9685856
    Abstract: A bipolar output charge pump circuit having a network of switching paths for selectively connecting an input node and a reference node for connection to an input voltage, a first pair of output nodes and a second pair of output nodes, and two pairs of flying capacitor nodes, and a controller for controlling the switching of the network of switching paths. The controller is operable to control the network of switching paths when in use with two flying capacitors connected to the two pairs of flying capacitor nodes, to provide a first bipolar output voltage at the first pair of output nodes and a second bipolar output voltage at the second pair of bipolar output nodes.
    Type: Grant
    Filed: July 8, 2016
    Date of Patent: June 20, 2017
    Assignee: Cirrus Logic, Inc.
    Inventors: John P. Lesso, Peter J. Frith, John L. Pennock
  • Patent number: 9685794
    Abstract: When power transmitting electrodes of a power transmitting apparatus are respectively facing power receiving electrodes of a power receiving apparatus, a composite resonant circuit including a series resonant circuit and a parallel resonant circuit is formed through a compound capacitance formed between the power transmitting electrodes and the power receiving electrodes. In a predetermined mutually facing state in which the compound capacitance becomes maximum, the impedances of the configuration components of the composite resonant circuit are set such that a resonant frequency at which the impedance of the composite resonant circuit from a signal generator side when inputs of a load circuit is short-circuited becomes locally minimum, becomes higher than a resonant frequency at which the impedance of the composite resonant circuit as seen from the signal generator side when the inputs of the load circuit are open becomes locally maximum.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: June 20, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hironobu Takahashi, Keiichi Ichikawa, Tsuyoshi Suesada
  • Patent number: 9678525
    Abstract: A method for smoothing current consumed by an electronic device is based on a series of current copying operations and on a current source delivering a reference current. The reference current is delivered in such a manner that current consumed as seen from the power supply depends on the reference current.
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: June 13, 2017
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Nicolas Demange, Jimmy Fort, Thierry Soude
  • Patent number: 9680452
    Abstract: A technique relates to a circuit for a sum frequency generator. A first resonator is connected to a Josephson ring modulator (JRM), and the first resonator is configured to receive a first photon at a first frequency. A second resonator is connected to the JRM, and the second resonator is configured to have a first harmonic and no second harmonic. The second resonator is configured to receive a second photon at a second frequency, and the first resonator is configured to output an up-converted photon. The up-converted photon has an up-converted frequency that is a sum of the first frequency and the second frequency.
    Type: Grant
    Filed: October 17, 2016
    Date of Patent: June 13, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Baleegh Abdo
  • Patent number: 9673795
    Abstract: An integrated circuit includes a data sampler and a digital logic circuit. The data sampler provides multiple signal samples at a speed twice a symbol rate according to a local clock signal and the inverted local clock signal. The signal samples include a first symbol sample, and a second symbol sample that occurs later than the first symbol sample. The signal samples further include an interpolated sample between the first and second symbol samples. The digital logic circuit compares the first symbol sample with the interpolated sample to generate pre phase correction data, and compares the second symbol sample with the interpolated sample to generate post phase correction data. The pre phase correction data is generated earlier than the post phase correction data. The local clock signal and the inverted local clock signal have substantially a phase difference of 180 degrees.
    Type: Grant
    Filed: February 8, 2016
    Date of Patent: June 6, 2017
    Assignee: MStar Semiconductor, Inc.
    Inventors: Meng-Tse Weng, Jiunn-Yih Lee
  • Patent number: 9673788
    Abstract: A buffer provides a signal at an output node as a function of an input signal. First and second buffer stages have respective current conduction paths for asserting the output signal. An enabling element selectively enables the second buffer stage in response to assertion of an enabling signal in a state where the first and second buffer stages are both simultaneously enabled. The first buffer stage has hysteresis feedback paths from the output node for providing hysteresis in the buffer response. The hysteresis is smaller when the first and second buffer stages are both enabled than when only the first buffer stage is enabled. The response of the second buffer stage to the input signal, when enabled, is faster than the first buffer stage.
    Type: Grant
    Filed: August 11, 2016
    Date of Patent: June 6, 2017
    Assignee: NXP USA, INC.
    Inventors: Yi Zhao, Dongling Zhang
  • Patent number: 9665116
    Abstract: A proportional to absolute temperature (PTAT) generator generates a current PTAT (IPTAT) and a fractional VBE in a first regulation loop. A level shifting voltage-to-current converter is arranged as a second regulation loop and is operable to generate a current ZTC (IZTC) and/or a voltage ZTC (VZTC). Both regulation loops are nested into each other. In an embodiment, the voltage-to-current converter is operable to sum a scaled voltage PTAT (VPTAT/Y) with the fractional VBE (VBE/X) to generate the ZTC signal. In another embodiment, the voltage-to-current converter is operable to sum a delta voltage threshold (?VTH) with the fractional VBE (VBE/X) to generate the ZTC signal.
    Type: Grant
    Filed: November 16, 2015
    Date of Patent: May 30, 2017
    Assignee: TEXAS INSTRUMENTS DEUTSCHLAND GMBH
    Inventors: Matthias Arnold, Asif Qaiyum