Patents Examined by Jeffrey Zweizig
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Patent number: 9423642Abstract: The invention discloses a package structure of a driving apparatus of a display. The driving apparatus of the display includes a plurality of driving units. The package structure includes a substrate and a plurality of package units. The substrate is used to carry the plurality of driving units. The plurality of driving units is apart to each other. The plurality of package units is used to package the plurality of driving units respectively to form a plurality of driving unit package body apart to each other. A total output channel number of the driving apparatus of the display equals to a total channel number of the plurality of driving units. This package structure can avoid heat concentration on the driving apparatus of the display to achieve good cooling effect and output effectiveness of the driving apparatus of the display will be not reduced accordingly.Type: GrantFiled: March 4, 2015Date of Patent: August 23, 2016Assignee: Raydium Semiconductor CorporationInventors: Ching-Yung Chen, Po-Cheng Lin
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Patent number: 9419474Abstract: Described herein are techniques and architectures for gradually transitioning from voltage supplied by a primary power source to voltage supplied by a secondary power source. In particular implementations, a voltage control circuit is used to transition voltage across a load to be supplied by the secondary power source. The voltage control circuit may include a first circuit and a second circuit connected in parallel. The first circuit may include the primary power source connect to the load, while the second circuit may include the secondary power source connected to one or more field-effect transistors. The one or more field-effect transistors may be controlled to cause current of the secondary power source to be gradually transferred to the load. This may result in a transfer of the voltage across the load to be supplied by the secondary power source.Type: GrantFiled: October 30, 2012Date of Patent: August 16, 2016Assignee: Telect, Inc.Inventors: David Knaggs, Larry O'Neal Reeder
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Patent number: 9419020Abstract: An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.Type: GrantFiled: July 24, 2014Date of Patent: August 16, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Atsushi Hirose, Masashi Tsubuku, Kosei Noda
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Patent number: 9411352Abstract: A trimming circuit may include a code table storing unit configured to store a plurality of test codes, a test voltage generating unit configured to generate test voltages in response to the test codes output by the code table storing unit, and a trimming unit configured to exchange and compare the test voltages and a reference voltage and output first and second pass signals. The trimming circuit may include a code table temporarily storing unit configured to store a test code from among the test codes as a first test code in response to the output of the first pass signal, and store a test code from among the test codes as a second test code in response to the output of the second pass signal, and a calculating unit configured to generate an intermediate code of the first and second test codes as a trimming code.Type: GrantFiled: July 13, 2015Date of Patent: August 9, 2016Assignee: SK hynix Inc.Inventor: Moon Soo Sung
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Patent number: 9411355Abstract: Representative implementations of devices and techniques provide a configurable slope of a voltage response of a bandgap-based temperature sensor circuit. The slope and/or a translation of the voltage response may be configured by current domain operations at a strategic node.Type: GrantFiled: July 17, 2014Date of Patent: August 9, 2016Assignee: Infineon Technologies Austria AGInventor: Franco Cocetta
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Patent number: 9407158Abstract: In various embodiments a circuit is provided which may include a node at which a circuit potential may be provided; an alternating voltage providing circuit configured to provide a DC current free alternating voltage; a rectifier coupled to the alternating voltage providing circuit, the rectifier including a first rectifier terminal and a second rectifier terminal, wherein the first rectifier terminal or the second rectifier terminal may be coupled to the node; and a first output terminal and a second output terminal, wherein the first output terminal may be coupled to the first rectifier terminal to provide a first potential and wherein the second output terminal may be coupled to the second rectifier terminal to provide a second potential different from the first potential, the difference between the first potential and the second potential defining an output voltage, wherein the output voltage may be constant independent of the circuit potential.Type: GrantFiled: September 9, 2014Date of Patent: August 2, 2016Assignee: INFINEON TECHNOLOGIES AGInventor: Peter Bogner
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Patent number: 9406673Abstract: One aspect relates to a semiconductor component with a semiconductor body, a first main contact pad, a second main contact pad, a normally-on first transistor monolithically integrated in the semiconductor body and a normally-off second transistor monolithically integrated in the semiconductor body. The first transistor is a high electron mobility transistor having a first gate electrode and a first load path controllable via a first gate electrode, and the second transistor has a second gate electrode and a second load path controllable via the second gate electrode. The first load path and the second load path are electrically connected in series between the first main contact pad and the second main contact pad.Type: GrantFiled: December 23, 2013Date of Patent: August 2, 2016Assignee: Infineon Technologies Austria AGInventors: Gilberto Curatola, Oliver Haeberlen, Walter Rieger, Anthony Sanders
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Patent number: 9401763Abstract: An LED illumination device is configured to receive coded messages by at least one of radio signals in free space, electrically conducted signals by wire, and light wave propagated signals in free space, process the coded messages, and transmit the coded messages by two or more of radio signals in free space, electrically conducted signals by wire, and light wave propagated signals in free space.Type: GrantFiled: November 25, 2015Date of Patent: July 26, 2016Assignee: SMARTLABS, INC.Inventors: Daniel Brian Cregg, Joseph J. Dada
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Patent number: 9401334Abstract: An integrated circuit, a method of forming an integrated circuit, and a semiconductor are disclosed for preventing unauthorized use in radiation-hard applications. In one embodiment, the integrated circuit comprises a silicon-on-insulator (SOI) structure, a radiation insensitive sub-circuit, and a radiation sensitive sub-circuit. The SOI structure comprises a silicon substrate, a buried oxide layer, and an active silicon layer. The radiation insensitive sub-circuit is formed on the active layer, and includes a partially depleted transistor. The radiation sensitive sub-circuit is formed on the active layer, and includes a fully depleted transistor, to prevent operation of the radiation sensitive sub-circuit under specified radiation conditions.Type: GrantFiled: March 13, 2015Date of Patent: July 26, 2016Assignee: International Business Machines CorporationInventors: Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Kenneth P. Rodbell
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Patent number: 9395402Abstract: An isolator includes: a transmission circuit that generates an alternating current transmission signal in which a first potential is set to be a reference potential; a first insulating element to which the alternating current transmission signal is supplied; a second insulating element that generates an alternating current reception signal in which a second potential is set to be a reference potential by being alternating current-coupled to the first insulating element through an insulating film; a reception circuit that reproduces reception data based on the alternating current reception signal; an impedance control unit that controls an impedance of the first or the second insulating element to be higher than an impedance before the control; and a leakage current detection unit that detects a leakage current flowing between the first and the second insulating elements through the first or the second insulating element in which the impedance has been controlled.Type: GrantFiled: June 22, 2015Date of Patent: July 19, 2016Assignee: Renesas Electronics CorporationInventor: Hirokazu Nagase
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Patent number: 9391508Abstract: A bipolar output charge pump circuit having a network of switching paths for selectively connecting an input node and a reference node for connection to an input voltage, a first pair of output nodes and a second pair of output nodes, and two pairs of flying capacitor nodes, and a controller for controlling the switching of the network of switching paths. The controller is operable to control the network of switching paths when in use with two flying capacitors connected to the two pairs of flying capacitor nodes, to provide a first bipolar output voltage at the first pair of output nodes and a second bipolar output voltage at the second pair of bipolar output nodes.Type: GrantFiled: November 14, 2014Date of Patent: July 12, 2016Assignee: Cirrus Logic Inc.Inventors: John Paul Lesso, Peter John Frith, John Laurence Pennock
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Patent number: 9391197Abstract: A semiconductor device includes a substrate; a deep well region disposed in the substrate; an element region disposed in the substrate and in the deep well region; a drain region disposed in the substrate, in the deep well region, and surrounding the element region; a gate structure disposed on the surface of the substrate, adjacent to the deep well region, and surrounding the drain region; a well region disposed in the substrate, in the deep well region, and surrounding the gate structure; a source region disposed in the substrate, in the well region, and surrounding the gate structure; a body contact region disposed separately from the source region in the well region and surrounding the source region; and an annular doped region disposed separately from the deep well region in the substrate and surrounding the deep well region.Type: GrantFiled: August 11, 2015Date of Patent: July 12, 2016Assignee: UNITED MICROELECTRONICS CORPORATIONInventors: Shih Chieh Pu, Ming-Tsung Lee, Cheng-Hua Yang, Nien-Chung Li, Wen-Fang Lee, Chih-Chung Wang
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Patent number: 9385594Abstract: The present invention generally relates to a DVC having a charge-pump coupled to a MEMS device. The charge-pump is designed to control the output voltage delivered to the electrodes, such as the pull-in electrode or the pull-off electrode, that move the switching element within the MEMS device between locations spaced far from and disposed closely to the RF electrode.Type: GrantFiled: April 2, 2014Date of Patent: July 5, 2016Assignee: Cavendish Kinetics, Inc.Inventors: Robertus Petrus Van Kampen, Cong Quoc Khieu, James Douglas Huffman, Richard L. Knipe
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Patent number: 9385293Abstract: A system and method involve generating an electric field across a superconductor device having an ionic layer disposed between and separated from first and second superconductor layers by respective first and second barrier layers. The electric field may be generated by applying an input signal, such as a voltage, to the superconductor device while the device is in a superconducting state. The voltage may be below a threshold voltage for inducing ion transport within the ionic layer or may be above or below a threshold voltage for inducing ion transport from the ionic layer across an ionic layer/barrier layer interface. The ion transport may tune the potential profile and/or modulate the critical current of the superconductor device and may include quantum coherent ionic transport, Josephson tunneling, or resonant tunneling. The electric field generated across the superconductor device may alter the spin-states of the ions within the ionic layer.Type: GrantFiled: May 19, 2015Date of Patent: July 5, 2016Assignee: THE UNITED STATES OF AMERICA AS REPRESENTED BY THE SECRETARY OF THE NAVYInventors: Osama Nayfeh, Anna Leese De Escobar, Kenneth Simonsen
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Patent number: 9377793Abstract: A device for controlling a power supply for a functional block in an integrated circuit, the device comprising: a signal generator configured to provide a clock signal to the functional block, an antenna comprising a transistor, and being located proximate to the functional block, the antenna being configured to receive the clock signal from the signal generator, and wherein the transistor of the antenna receives electrical power from the same power source that delivers power to the functional block, means to measure the clock signal output from the antenna, and output a control signal, and feedback means to control the voltage of the power supply to the functional block on the basis of the control signal.Type: GrantFiled: August 8, 2013Date of Patent: June 28, 2016Assignee: ST-ERICSSON SAInventors: Miroslav Valka, Alberto Bosio, Philippe Debaud, Patrick Girard, Stephane Guilhot
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Patent number: 9377805Abstract: Embodiments may include a method, system and apparatus for providing a reference voltage supply. A series resistor is provided between a power supply and a bandgap circuit coupled to an amplifier. A shunt transistor circuit is operatively coupled to the series resistor. A programmable output voltage is provided based upon the shunt transistor circuit and a first value of the series resistor.Type: GrantFiled: September 30, 2014Date of Patent: June 28, 2016Assignee: Advanced Micro Devices, Inc.Inventors: Raymond Louis Barrett, Jr., Mark Chirachanchai
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Patent number: 9372490Abstract: A system and method for adaptive activity management of on-chip voltage regulators based upon the workload information is provided to force each on-chip regulator to operate in its most power-efficient load current. In the proposed regulator-gating technique, regulators are adaptively turned ON when the current demand is high and turned OFF when the current demand is low to improve the voltage conversion efficiency. With the proposed regulator-gating system and method, the overall voltage conversion efficiency from the battery or off-chip power supply to the output of the on-chip voltage regulators experiences an approximately 3 times improvement over the prior art techniques.Type: GrantFiled: November 20, 2014Date of Patent: June 21, 2016Assignee: University of South FloridaInventors: Selcuk Kose, Orhun Aras Uzun
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Patent number: 9350348Abstract: A power management circuit for integrated circuits operating systems where the power supply may be marginal includes a supply voltage characterization circuit and a clock synthesis circuit. The supply voltage characterization circuit determines the strength of the supply voltage applied to the IC and provides information to the synthesis circuit that is used to adjust the clock frequency of the IC to insure the IC does not draw too much current and force the IC into reset. A counter is used to determine the time between when the supply voltage reaches a first level and a second higher level, the time being representative of the slope of the supply voltage. Knowledge of the characteristics of a portion of the circuit under certain operating or benchmark conditions may be used to adjust the characterization.Type: GrantFiled: April 23, 2015Date of Patent: May 24, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Xiaoxiang Geng, Lei Zhang
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Patent number: 9350235Abstract: A voltage converting device includes first to third voltage converters, each including a capacitor, a pair of charge switches for charging the capacitor, a pair of first output switches for outputting a first output voltage through the capacitor, and a pair of second output switches for outputting a second output voltage through the capacitor. Via timing control of the switches, outputs of the first and second output voltages are substantially continuous and are prevented from floating.Type: GrantFiled: April 30, 2014Date of Patent: May 24, 2016Assignee: ILI TECHNOLOGY CORPORATIONInventors: Wei-Chung Cheng, Ching-Tsao Chen, Chih-Hsiang Chuang
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Patent number: 9343438Abstract: A semiconductor apparatus may include a plurality of core chips and a base chip. The plurality of core chips may respectively include a plurality of channels, and each of the plurality of channels may include at least two pseudo channels. Each of the plurality of core chips may include a channel selection unit that selects one or more of the pseudo channels based on a channel mode signal, a pseudo channel signal, a stack information signal, and a slice information signal.Type: GrantFiled: May 13, 2015Date of Patent: May 17, 2016Assignee: SK hynix Inc.Inventor: Hyun Sung Lee