Abstract: A method for manufacturing a vertical cavity surface emitting laser formed by laminating a plurality of layers on a substrate, includes coupling two layers of the plurality of layers by joining at room temperature or joining while heating.

Abstract: A SiOC layer and/or a SiC layer of an etch stop layer may be improved by altering the process used to form them. In a bi-layer structure, a SiOC layer and/or a SiC layer may be improved to provide better reliability. A silicon carbide (SiC) layer may be used to form a single-layer etch stop layer, while also acting as a glue layer to improve interface adhesion. Preferably, the SiC layer is formed in a reaction chamber having a flow of substantially pure trimetholsilane (3MS) streamed into and through the reaction chamber under a pressure of less than about 2 torr therein. Preferably, the reaction chamber is energized with high frequency RF power of about 100 watts or more. Preferably, the SiOC layer is formed in a reaction chamber having a flow of 3MS and CO2, and is energized with low frequency RF power of about 100 watts or more.

Abstract: A nitride LED having a laminated structure in which a substrate, a n-type cladding layer, an active layer, a p-type cladding layer, and a multi-ohmic contact layer are sequentially stacked, and a manufacturing method thereof, are provided. In the nitride LED, the multi-ohmic contact layer includes multiple layers of a first transparent film layer/silver/second transparent film layer. In the nitride LED and a manufacturing method thereof, ohmic contact characteristics with respect to the p-type cladding layer are enhanced, thereby exhibiting a good current-voltage characteristic. Also, since the transparent electrodes have a high light transmitting property, the light emitting efficiency of the device is increased.

Abstract: Thermal mixing methods of forming a substantially relaxed and low-defect SGOI substrate material are provided. The methods include a patterning step which is used to form a structure containing at least SiGe islands formed atop a Ge resistant diffusion barrier layer. Patterning of the SiGe layer into islands changes the local forces acting at each of the island edges in such a way so that the relaxation force is greater than the forces that oppose relaxation. The absence of restoring forces at the edges of the patterned layers allows the final SiGe film to relax further than it would if the film was continuous.

Abstract: Various methods and apparatuses are described in which a micro-electro-mechanical systems (MEMS) device is encapsulated with a material having a variable viscosity with a viscosity value high enough to retard foreign material from contacting the MEMS device during an electronic package assembly process. The material having the variable viscosity may be affixed to a cavity area surrounding the MEMS device prior to an epoxy being dispensed onto the electronic package assembly. The temperature and pressure conditions of the electronic package assembly process may be controlled to ensure when the epoxy is dispensed that the material having the variable viscosity has a high enough viscosity value to retard foreign material from contacting the MEMS device during the electronic package assembly process.

Abstract: An organic electroluminescent display device comprises a substrate including a display region, and a pad region in a periphery of the display region, the display region including a pixel region; a gate pad, a data pad and a power pad in the pad region, the gate pad, the data pad and the power pad electrically connected to a gate line, a data line and a power line, respectively; a first electrode in the pixel region, the first electrode connected to the driving thin film transistor; an organic electroluminescent layer on the first electrode; a second electrode over an entire surface of the substrate including the organic electroluminescent layer; a dummy pad in the pad region, the dummy pad electrically connected to at least one of the power line and the second electrode; and a ground pad in the pad region, the ground pad electrically connected to the second electrode.

Abstract: Devices, such as light-emitting devices (e.g., LEDs), and methods associated with such devices are provided. A light-emitting device designed to emit light may include an interface through which emitted light passes therethrough, wherein the interface has a dielectric function that varies spatially according to a pattern. The pattern may be arranged to provide anisotropic light emission characterized by an emission pattern on a far-field projection plane substantially parallel to the interface, wherein a first total light intensity along a first axis on the projection plane is at least 20% greater than a second total light intensity along a second axis on the projection plane.

Abstract: A method and system is disclosed for reducing or eliminating leakage between a pinned photodiode and shallow trench isolation structure fabricated therewith while optimizing the sensitivity of the photodiode. Provided is a system with an N+ region implanted in a P-type substrate; a P-type well separating the N+ region from the shallow trench isolation (STI) structure; and at least a P+ region over the N+ region, and overlapping at least part of the P-type well and a substrate portion between the N+ region and P-type well. The space between the N+ region and a damaged region adjacent the STI is greater than the distance that the depletion region between the N+ region and the P-type well, expands. The junctions of the various features are optimized to maximize a photosensitive response for the wavelength of the absorbed light as well as reducing or eliminating electrical leakage.

Abstract: Light-emitting devices, and related components, processes, systems and methods are disclosed.

Abstract: Provided is a method of fabricating a laser diode.

Abstract: Light-emitting devices, and related components, processes, systems and methods are disclosed.

Abstract: A manufacturing method of a thin film transistor of the present invention includes the steps of (i) forming an electrode formation area in which a source electrode and a drain electrode are formed by applying a droplet of an electrode raw material, (ii) applying the droplet of the electrode raw material on drop-on positions located off a forming area of a semiconductor layer and in the electrode formation area, and (iii) forming the source electrode and the drain electrode in the electrode formation area. With this arrangement, it is possible to surely prevent adherence of a splash droplet on a channel section between each electrode, in forming the source electrode and the drain electrode by applying the droplet of the electrode raw material.

Abstract: A light emitting diode. The light emitting diode comprises a lead frame, a plurality of light emitting chips in the lead frame, and a molding unit in an optical path of the light emitting chips, wherein the molding unit comprises a periodic microstructure.

Abstract: After silicon oxide film (9) is formed on the surface of a semiconductor substrate (1), the silicon oxide film (9) in a region in which a gate insulation film having a small effective thickness is formed is removed using diluted HF and after that, high dielectric constant insulation film (10) is formed on the semiconductor substrate (1). Consequently, two kinds of gate insulation films, namely, a gate insulation film (12) comprised of stacked film of high dielectric constant insulation film (10) and silicon oxide film (9) and gate insulation film (11) comprised of the high dielectric constant insulation film (10) are formed on the semiconductor substrate (1).

Abstract: Imager devices are formed with light block material between microlenses to enhance the characteristics of image acquisition. The light block material may be deposited over the lenses, and then partially removed to expose central portions of the lenses. The invention is applicable to, among other things, imager devices having pixel arrays formed with the light block material and integrated with one or more processing components in a semiconductor device.

Abstract: A low temperature process for fabricating a high-performance and reliable semiconductor device in high yield, comprising forming a silicon oxide film as a gate insulator by chemical vapor deposition using TEOS as a starting material under an oxygen, ozone, or a nitrogen oxide atmosphere on a semiconductor coating having provided on an insulator substrate; and irradiating a pulsed laser beam or an intense light thereto to remove clusters of such as carbon and hydrocarbon to thereby eliminate trap centers from the silicon oxide film. Also claimed is a process comprising implanting nitrogen ions into a silicon oxide film and annealing the film thereafter using an infrared light, to thereby obtain a silicon oxynitride film as a gate insulator having a densified film structure, a high dielectric constant, and an improved-withstand voltage.

Abstract: A method of forming a buried conductive structure in a semiconductor device includes the steps of forming a first insulating layer on a semiconductor layer; forming a sacrificial structure on at least a portion of the first insulating layer; forming a second insulating layer on at least a portion of the sacrificial structure; forming at least one opening through the second insulating layer to at least partially expose the sacrificial structure; substantially removing the sacrificial structure, leaving a cavity; and substantially filling the cavity and the at least one opening with a conductive material. The sacrificial structure may be substantially removed by etching the sacrificial structure using an isotropic etchant.

Abstract: A flat panel display includes a pixel electrode having an opening portion formed on an insulating substrate, a semiconductor layer formed over a surface of the insulating substrate, spaced apart from the pixel electrode, having source and drain regions formed to both end portions thereof, a first insulating layer formed over the surface of the insulating substrate excluding the opening portion of the pixel electrode, a gate electrode formed on the first insulating layer over the semiconductor layer, and a second insulating layer formed over the surface of the insulating substrate excluding the opening portion of the pixel electrode. The present invention provides an organic EL display manufactured with reduced mask processes which has excellent electrical characteristics and improved light transmittance.

Abstract: A thermally-enhanced ball grid array package structure is provided that includes an integrated circuit chip, a heat spreader and a substrate. The integrated circuit chip has a specified surface area. The heat spreader is coupled to the integrated circuit chip. The substrate is coupled to the heat spreader. The substrate has a specified surface area. The heat spreader covers a specified portion of the surface area of the substrate that is greater than the surface area of the integrated circuit chip. The heat spreader is operable to dissipate heat from the integrated circuit chip over the specified portion of the surface area of the substrate.

Abstract: The semiconductor thin film crystallization method comprises the step of forming a semiconductor thin film 14 over a substrate 10; the step of forming band-shaped portion 16 for blocking crystal growth of the semiconductor thin film in the semiconductor film or over the semiconductor film; and the step of causing an energy beam 18 of a continuous wave to scan in a direction intersecting the longitudinal direction of the portion for blocking crystal growth. The energy beam is caused to scan, intersecting the portion for blocking the crystal growth, whereby the crystal growth can be interrupted when the application region of the energy beam intersects the portions for blocking the crystal growth. Even when a solid semiconductor thin film which is not patterned in islands is crystallized, the semiconductor thin film of good crystals can be formed with high yields while the film is prevented from peeling.