Patents Examined by Ji H. Bae
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Patent number: 11068018Abstract: The invention concerns a computing system comprising: an island (102) comprising a group of circuits capable of operating in one of a plurality of operating modes, the island being coupled to an island control circuit (122); and a clock generation circuit (902) supplying a further clock signal to the island control circuit (122) for controlling a change of mode of the island, the clock generation circuit (902) being configured to select one of a plurality of clock frequencies for the further clock signal, the selection being based on the change of operating mode to be applied.Type: GrantFiled: April 8, 2019Date of Patent: July 20, 2021Assignee: Dolphin DesignInventors: Mathieu Louvat, Lionel Jure, Gauthier Reveret, Alexandre Charvier
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Patent number: 11054873Abstract: A method and apparatus of a device that manages a thermal profile of a device by selectively throttling central processing unit operations of the device is described. The device manages a thermal profile of the device by adjusting a throttling a central processing unit execution of a historically high energy consuming task. In this embodiment, the device monitors thermal level of the thermal profile of the device, the device is executing a plurality of tasks that utilize a plurality of processing cores of the device. If the thermal level of the device exceeds a thermal threshold, the device identifies one of the plurality of tasks as a historically high energy consuming task, and throttles this historically high energy consuming task by setting a force idle execution time for the historically high energy consuming task. The device further executes the plurality of tasks.Type: GrantFiled: August 27, 2018Date of Patent: July 6, 2021Assignee: Apple Inc.Inventor: Derek R. Kumar
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Patent number: 11048314Abstract: A system loading detecting device and method are provided. The system loading detecting device includes a processing device, a detection circuit and a controller. The detection circuit detects whether an adapter is unplugged from the system loading detecting device to generate a detection signal. When the adapter is unplugged from the system loading detecting device, the detection signal is changed from a first level to a second level. The controller is coupled to the detection circuit and the processing device. In addition, the controller receives the detection signal and determines whether to trigger the generation of a throttling signal according to the detection signal to enable a throttling mechanism to reduce system loading.Type: GrantFiled: May 13, 2019Date of Patent: June 29, 2021Assignee: QUANTA COMPUTER INC.Inventors: Ming-Tsung Ho, Chun-Jie Yu, Yu-An Huang
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Patent number: 11048540Abstract: Methods, apparatus, systems, and articles of manufacture to manage heat in a CPU are disclosed. An example apparatus includes a metric collection agent to output a metric representative of a property of the central processor unit including a first core and a second physical core, the first physical core and the second physical core mapped to first and second logical cores by a map. A policy processor is to evaluate the first metric to determine whether to change the map to remap at least one of the first and second logical cores relative to the second one of the first and the second physical cores to move a process between the first and second physical cores to adjust the property, the moving of the process between the physical cores being transparent to an application/OS layer. A mapping controller is responsive to the policy processor to change the map.Type: GrantFiled: June 29, 2018Date of Patent: June 29, 2021Assignee: Intel CorporationInventors: Igor Duarte Cardoso, John OLoughlin, Louise Daly, Abdul Halim, Adrian Hoban
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Patent number: 11048320Abstract: Computerized systems and methods are provided to intelligently and dynamically manage a data center comprising at least one server and at least one central manager. The central manager is programmed to access the at least one server on a predetermined schedule to determine whether at least one application is functioning properly by determining a functionality level. Alternatively, the central manager determines whether the at least one server is actively used by determining an activity level for the server. Based on the central manager's determinations, the system dynamically adjusts the power level of the server, resulting in reduced power consumption and a reduction in wasted resources and unnecessary processing power in the management of servers in a data center.Type: GrantFiled: December 27, 2017Date of Patent: June 29, 2021Assignee: CERNER INNOVATION, INC.Inventors: Karthikeyan Sukumaran, Sravan Kumar Anumula, Rakesh Reddy Yarragudi, Manipal Reddy Thoomukunta, Deepak Kumar Jain
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Patent number: 11042383Abstract: A system and method for boot speed optimization is discussed. Uncompressed copies of UEFI firmware volumes and OS boot loader files stored on a portion of an NVDIMM are used during a boot sequence in a computing platform. The cached copies on the NVDIMM are used during the boot sequence after a successful validation check is performed to provide faster boots of the computing platform.Type: GrantFiled: February 3, 2019Date of Patent: June 22, 2021Assignee: Insyde Software Corp.Inventors: Timothy Andrew Lewis, Trevor Western
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Patent number: 11036274Abstract: An image processing apparatus includes a human sensor, an operation unit for performing various settings, and a control unit capable of switching an operation mode between a normal mode and a sleep mode. In a case where no inputting from the operation unit occurs in a first set time, the control unit switches from the normal mode to the sleep mode. In a case where a human body is detected by the human sensor, the control unit switches from the sleep mode to the normal mode. In the normal mode, when the human sensor no longer detects a human body or the human sensor detects a human body leaving, the control unit clears a setting of the operation unit and starts counting down a second set time set for switching from the normal mode to the sleep mode.Type: GrantFiled: April 9, 2019Date of Patent: June 15, 2021Assignee: SHARP KABUSHIKI KAISHAInventor: Kazuyuki Ohnishi
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Patent number: 11026176Abstract: Device wakeups can consume a significant amount of power with respect to the device's total power battery lifetime. Aspects of a method, apparatus, and computer-readable medium are presented herein that provide a solution to the problem of battery strain by improving the manner in which a wireless device coordinates device wakeup for multiple applications or multiple operations. An apparatus receives a wakeup time interval from each of a plurality of applications. The apparatus forms a first device wakeup time interval, the first device wakeup time interval including overlapping wakeup time intervals for the plurality of applications. The apparatus schedules a device wakeup during at least the first device wakeup time interval.Type: GrantFiled: December 11, 2018Date of Patent: June 1, 2021Assignee: QUALCOMM IncorporatedInventors: Hamza Ijaz Abbasi, Ralph Akram Gholmieh, Elmira Mazloomian, Liangchi Hsu, Alan Soloway, Osama Lotfallah, Carlos Marcelo Dias Pazos
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Patent number: 11023589Abstract: A multi-phase boot operation of a virtualization manager at a virtualization host is initiated at an offload card. In a first phase of the boot, a security key stored in a tamper-resistant location of the offload card is used. In a second phase, firmware programs are measured using a security module, and a first version of a virtualization coordinator is instantiated at the offload card. The first version of the virtualization coordinator obtains a different version of the virtualization coordinator and launches the different version at the offload card. Other components of the virtualization manager (such as various hypervisor components that do not run at the offload card) are launched by the different version of the virtualization controller.Type: GrantFiled: June 7, 2019Date of Patent: June 1, 2021Assignee: Amazon Technologies, Inc.Inventors: Anthony Nicholas Liguori, Barak Wasserstrom
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Patent number: 11023029Abstract: In one embodiment, a method includes determining a plurality of hardware components of a system. The method also includes power cycling a first hardware component of the plurality of hardware components of the system according to a dynamic schedule. A period of time in which power cycling of the first hardware component takes place is shortened as the age of the first hardware component approaches the expected lifespan of the first hardware component. Also, the method includes determining whether the first hardware component experienced a power-up failure resulting from the power cycling. Moreover, the method includes outputting an indication to replace and/or repair the first hardware component in response to a determination that the first hardware component experienced the power-up failure resulting from the power cycling. Other systems, methods, ad computer program products for preventing unexpected power-up failures of individual hardware components are described in accordance with more embodiments.Type: GrantFiled: July 29, 2019Date of Patent: June 1, 2021Assignee: International Business Machines CorporationInventors: Matthew G. Borlick, Brian J. Cagno, Lokesh M. Gupta, Karl A. Nielsen, Todd C. Sorenson
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Patent number: 11010475Abstract: According to certain general aspects, the present embodiments relate to providing a secure computer architecture in which a single computer is capable of simultaneously executing two operating systems. According to certain additional aspects, the two operating systems can have different security profiles and capabilities. According to still further aspects, the secure computer architecture further provides secure video conferencing capabilities, network activity monitoring and high performance computer graphics.Type: GrantFiled: October 6, 2017Date of Patent: May 18, 2021Assignee: Janus Technologies Inc.Inventor: Sofin Raskin
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Patent number: 11003235Abstract: The invention introduces a non-transitory computer program product for adjusting operating frequencies when executed by a processing unit of a device, containing program code to: collect an interface-activity parameter comprising information about data transmissions on a host access interface and/or a flash access interface; select one from multiple frequencies according to the interface-activity parameter; and drive a clock generator to output a clock signal at the selected frequency, thereby enabling the host access interface and/or the flash access interface to operate at an operating frequency.Type: GrantFiled: January 31, 2019Date of Patent: May 11, 2021Assignee: SILICON MOTION, INC.Inventors: Chang-Wei Shen, Te-Kai Wang, Pin-Hua Chen
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Patent number: 10990301Abstract: A memory module may include a memory device and a power controller. The memory device may operate by being supplied with a first memory power supply voltage and a second memory power supply voltage. The power controller may receive a first power supply voltage and a second power supply voltage from a power source, and supply the first memory power supply voltage and the second memory power supply voltage by changing levels of the first power supply voltage and the second power supply voltage based on operation state information.Type: GrantFiled: January 31, 2018Date of Patent: April 27, 2021Assignee: SK hynix Inc.Inventor: Jung Hyun Kim
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Patent number: 10983585Abstract: The present invention relates to platform power management.Type: GrantFiled: June 28, 2016Date of Patent: April 20, 2021Assignee: Intel CorporationInventors: Ren Wang, Christian Maciocco, Sanjay Bakshi, Tsung-Yuan Charles Tai
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Patent number: 10969819Abstract: The present invention relates to a security control comprising a first controller having a first clock generator for generating a first clock signal, a separate second controller having a second clock generator for generating a second clock signal, wherein the first clock signal is output to a first input of the first controller and to a first input of the second controller, and the second clock signal is output to a second input of the first controller and to a second input of the second controller. In addition, the present invention relates to a method for operating a security control.Type: GrantFiled: February 14, 2017Date of Patent: April 6, 2021Assignee: WAGO Verwaltungsgesellschaft mbHInventors: Maxim Laschinsky, Christian Voss
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Patent number: 10969849Abstract: A method and apparatus for implementing power modes in microcontrollers (MCUs) using power profiles. In one embodiment of the method, a central processing unit (CPU) of the MCU executes a first instruction for calling a subroutine stored in a memory of the MCU, wherein the first instruction comprises a first parameter to be passed to the subroutine. Thereafter the CPU writes a first value to a first special function register (SFR) of the MCU in response to executing the first instruction, wherein the first value is related to the first parameter. The MCU operates in a first power mode in response to the CPU writing the first value to the first SFR. The CPU also executes a second instruction for calling the subroutine, wherein the second instruction comprises a second parameter to be passed to the subroutine. In response the CPU writes a second value to a second SFR of the MCU in response to executing the second instruction, wherein the second value is related to the second parameter.Type: GrantFiled: August 5, 2019Date of Patent: April 6, 2021Assignee: Renesas Electronics America Inc.Inventor: Dale Sparling
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Patent number: 10963028Abstract: According to one embodiment of the invention, a processor includes a power control unit, an interface to software during runtime that permits the software to set a plurality of power management constraint parameters for the power control unit during runtime of the processor without a reboot of the processor, and a storage element to store a respective lock bit for each of the plurality of power management constraint parameters to disable the interface from changing a respective constraint parameter when set.Type: GrantFiled: November 26, 2018Date of Patent: March 30, 2021Assignee: Intel CorporationInventors: Ryan D. Wells, Sanjeev S. Jahagirdar, Inder M. Sodhi, Jeremy J. Shrall, Stephen H. Gunther, Daniel J. Ragland, Nicholas J. Adams
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Patent number: 10955888Abstract: The present invention provides a universal serial bus (USB) device and an operating method thereof. The USB device includes a plurality of Downstream Facing Ports (DFPs) and a control circuit. When a first external device is connected to the first DFP and the second DFP is not connected to any external device, the control circuit maintains the first DFP as one of a power source port and a power sink port according to the first external device, and maintains the second DFP as other one of the power source port and the power sink port regardless of whether the second DFP is connected to a second external device later until the first external device is removed from the first DFP.Type: GrantFiled: August 15, 2018Date of Patent: March 23, 2021Assignee: VIA LABS, INC.Inventors: Tze-Shiang Wang, Chi-Yuan Kao
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Patent number: 10955894Abstract: Systems and methods for centralized power management of wireless user devices are disclosed. In embodiments, a method comprises: monitoring, by a computing device, battery charge levels for remote user devices; identifying, by the computing device, that a battery charge level of a first user device of the remote user devices is below a predetermined threshold value based on the monitoring; identifying, by the computing device, at least one in-use device from the remote user devices based on real-time data indicating that the at least one in-use device is in use by a user; and sending, by the computing device, an alert to the at least one in-use device based on the identifying the at least one in-use device, wherein the alert includes information about the first user device and information regarding the battery charge level of the first device.Type: GrantFiled: August 2, 2018Date of Patent: March 23, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Cesar Augusto Rodriguez Bravo
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Patent number: 10936325Abstract: A computer-implemented method, for booting a computer system, that provides a list with entries of startup processes. Each startup process defines a resource of the computer system. For each startup process a requirement is defined. The method further comprises fetching one of the entries of the list with entries of startup processes; determining whether the requirement is satisfied for the one of the entries of the list with entries of startup processes; fetching, in case the requirement is not fulfilled, a next one of the entries of the list with entries of startup processes; starting, in case the required resource is fulfilled, the startup process; and repeating the fetching a next one of the entries, the determining and the starting until all startup processes of the list of startup processes have been started.Type: GrantFiled: September 4, 2019Date of Patent: March 2, 2021Assignee: International Business Machines CorporationInventors: Reinhard T. Buendgen, Jakob C. Lang, Volker Boenisch, Angel Nunez Mencias