Patents Examined by Ji H. Bae
  • Patent number: 11669150
    Abstract: Computerized systems and methods are provided to intelligently and dynamically manage a data center comprising at least one server and at least one central manager. The central manager is programmed to access the at least one server on a predetermined schedule to determine whether at least one application is functioning properly by determining a functionality level. Alternatively, the central manager determines whether the at least one server is actively used by determining an activity level for the server. Based on the central manager's determinations, the system dynamically adjusts the power level of the server, resulting in reduced power consumption and a reduction in wasted resources and unnecessary processing power in the management of servers in a data center.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: June 6, 2023
    Assignee: Cerner Innovation, Inc.
    Inventors: Karthikeyan Sukumaran, Sravan Kumar Anumula, Rakesh Reddy Yarragudi, Manipal Reddy Thoomukunta, Deepak Kumar Jain
  • Patent number: 11669618
    Abstract: An information handling system may include a processor and a basic input/output system (BIOS) comprising a program of instructions comprising boot firmware configured to be the first code executed by the processor when the information handling system is booted or powered on, the BIOS configured to, during boot of the information handling system: (i) read a predefined measurement of an order of loading of BIOS drivers configured to execute during execution of the BIOS, such predefined measurement made during build of the BIOS; (ii) perform a runtime measurement of an order of loading of the BIOS drivers during actual runtime of the information handling system; (iii) compare the predefined measurement to the runtime measurement; and (iv) responsive to a mismatch between the predefined measurement and the runtime measurement, respond with a remedial action.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: June 6, 2023
    Assignee: Dell Products L.P.
    Inventors: Balasingh P. Samuel, Richard M. Tonry, Jonathan D. Samuel
  • Patent number: 11662789
    Abstract: A power supply circuit includes a power supply which supplies DC power to a load, a switch which is selectively operable to (i) cause a short-circuit to occur between a DC power supply and an input terminal of the power supply and (ii) open a connection between the DC power supply and the input terminal of the power supply, a sensor which measures a temperature and a processor configured to control the switch to open the connection in response to a decision that the DC power is not being supplied to the load even when the switch is being controlled to cause the short-circuit to occur, and control the switch to cause the short-circuit to occur after a predetermined time elapses after controlling the switch to open the connection in response to the decision. The predetermined time is set based on the temperature measured by the sensor.
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: May 30, 2023
    Assignee: CASIO COMPUTER CO., LTD.
    Inventors: Hideo Suzuki, Masanori Ishihara
  • Patent number: 11650649
    Abstract: Systems and methods for centralized power management of wireless user devices are disclosed. In embodiments, a method comprises: monitoring, by a computing device, battery charge levels for remote user devices; identifying, by the computing device, that a battery charge level of a first user device of the remote user devices is below a predetermined threshold value based on the monitoring; identifying, by the computing device, at least one in-use device from the remote user devices based on real-time data indicating that the at least one in-use device is in use by a user; and sending, by the computing device, an alert to the at least one in-use device based on the identifying the at least one in-use device, wherein the alert includes information about the first user device and information regarding the battery charge level of the first device.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: May 16, 2023
    Assignee: KYNDRYL, INC.
    Inventor: Cesar Augusto Rodriguez Bravo
  • Patent number: 11644878
    Abstract: A discrete VRM card comprises a set of VRM controllers. The set of VRM controllers comprises a VRM controller with two feedback loops. The VRM card comprises a power stage and a power-stage critical-signal multiplexer. The output of the power-stage critical-signal multiplexer determines a feedback loop with which the power stage communicates. The VRM card also comprises a configuration selector. The configuration selector determines a feedback-loop assignment for the power-stage critical-signal multiplexer and provides VRM instructions to the VRM controller.
    Type: Grant
    Filed: December 12, 2020
    Date of Patent: May 9, 2023
    Assignee: International Business Machines Corporation
    Inventors: Justin Henspeter, Michael Lee Miller, Jordan Keuseman
  • Patent number: 11644881
    Abstract: Techniques for reallocating power between a plurality of electronic components and a connection port of a computing system are described. In operation, operational state of an electronic component from amongst multiple electronic components is analysed. Based on the operational state of the electronic component, an unused power available with the electronic components is determined. Based on the availability of the unused power, a default power level associated with the connection port is increased, where the default power level is a predefined power allocated to the connection port for operation.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: May 9, 2023
    Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Chao Wen Cheng, Po Ying Chih, Yen Tang Chang
  • Patent number: 11644884
    Abstract: There is disclosed a method of controlling the frequency of a clock signal in a processor. The method selects a first clock generator to provide a processor clock signal for executing an application. If a threshold event is detected, a second clock generator is selected. The method reduces the frequency of a clock signal generated by the first clock generator while a processor clock signal is being provided for execution of an application from the second clock generator. The second clock generator generates a clock at a lower speed than the first clock generator. After a predetermined time, the first clock generator is reselected to provide the processor clock signal. The threshold detection is repeated until an optimum clock frequency is discovered.
    Type: Grant
    Filed: August 17, 2021
    Date of Patent: May 9, 2023
    Assignee: GRAPHCORE LIMITED
    Inventors: Stephen Felix, Mrudula Gore
  • Patent number: 11640193
    Abstract: A system-on-a-chip (“SoC”) in a computing device may be provided with a power delivery network (“PDN”) self-test to detect marginal PDN performance. In the self-test, a current surge may be generated on power supply connections of logic circuit blocks. Voltage monitors may measure voltage droop on the power supply connections responsive to the current surge. Voltage droop measurements may be compared with thresholds. An action, such as generation of an alert, may be performed if a voltage droop measurement exceeds a threshold.
    Type: Grant
    Filed: September 24, 2021
    Date of Patent: May 2, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Kunal Desai, Ankit Shambhu, Srinivas Maddali, Sanjeev Shukla
  • Patent number: 11637947
    Abstract: A system includes an electronic module and an integrated circuit outside the electronic module. The integrated circuit is configured to generate a digital timing signal that emulates a first synchronization signal internal to the module and not available outside the module and to generate trigger signals based on the digital timing signal. A controller is configured to independently and autonomously perform control operations of the electronic module at times triggered by the trigger signals.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: April 25, 2023
    Assignee: STMICROELECTRONICS (ROUSSET) SAS
    Inventor: Olivier Ferrand
  • Patent number: 11632169
    Abstract: The method relates to a synchronization of a magnetic locating system including a first device and a second device each including an oscillator, a time counter clocked by the oscillator, and a radiocommunication module. The locating system also includes a device for emitting and receiving alternating magnetic fields, the device being configured to allow a propagation of alternating magnetic fields between the first and second devices, the device for emitting and receiving alternating magnetic fields being connected to the oscillators of the first and second devices. The synchronizing method includes a synchronizing step that is configured to synchronize the oscillators of the first and second devices by adjusting, by servo-controlling the oscillator of the second device, the operation of the time counter of the second device to the operation of the time counter of the first device.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: April 18, 2023
    Assignee: Commissariat a l'energie atomique et aux energies alternatives
    Inventors: Vincent Josselin, Francois Bertrand, Saifeddine Aloui, Jerome Paulet
  • Patent number: 11625081
    Abstract: Centralized profile-based operational monitoring and control of remote computing devices. A controller device receives, from a first customer-premises device (CPD) associated with a first local area network, at a first time a first temperature value that quantifies a temperature of the first CPD, the first CPD having a plurality of different energy consumption operating modes. The controller device, based on an attribute of the first CPD, accesses a first CPD profile of a plurality of different CPD profiles to determine a preferred CPD temperature range. The controller device determines that the first temperature value is outside of the preferred CPD temperature range, and sends an instruction that instructs the first CPD to transition from a current energy consumption operating mode to a first reduced energy consumption operating mode based at least in part on the first temperature value.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: April 11, 2023
    Assignee: Charter Communications Operating, LLC
    Inventor: Shlomo Ovadia
  • Patent number: 11614948
    Abstract: An electronic device is provided such that a user can experience a quick launch of an application therein. The electronic device includes a housing, a display, an input unit, a processor, a non-volatile memory to store an application program, and a volatile memory to store instructions that allow the processor to load a first part of the application program in the volatile memory based on a first change of state of the electronic device, to load a second part of the application program in the volatile memory based on a second change of state of the electronic device and to display an image or text generated by the loaded first or second part. Since at least part of the application is preloaded before the second input is generated, only the remainder of the application has to be loaded in order to execute the application after the second input is generated.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: March 28, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-Hyung Jung, Chang-Gue Lee, Taejin Hyeon, Hyunsoo Kim, Minho Kim, Jong-Wu Baek
  • Patent number: 11614770
    Abstract: A configurable semiconductor device (“CSD”) is organized in four (4) quadrants able to perform user-defined logic functions via a clock fabric. The first quadrant, in one embodiment, includes a first serializer and deserializer (“SerDes”) region and a bank0 region for data processing. The second quadrant includes a second SerDes region and a bank5 region and the third quadrant contains a bank3 region and a bank4 region. The fourth quadrant includes a bank1 region and a bank2 region. The clock fabric is configured to provide a set of programmable or selectable clock signals with different clock speeds to various regions within the CSD.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: March 28, 2023
    Assignee: GOWIN SEMICONDUCTOR CORPORATION
    Inventors: Jianhua Liu, Jinghui Zhu, Ning Song, Tianping Wang, Chienkuang Chen, Diwakar Chopperla, Tianxin Wang, Zhenyu Gu, Xiaozhi Lin
  • Patent number: 11614789
    Abstract: A system and method for docking a processing unit provided. According to the method, the system dithers between the two signals provided by the two clock generators so as to clock the processing unit at an average clock frequency having a value between the frequencies of the two signals. The average clock frequency is adjusted by modifying the proportion of time spent on one clock signal vs the other clock signal.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: March 28, 2023
    Assignee: GRAPHCORE LIMITED
    Inventor: Ian Malcolm King
  • Patent number: 11604882
    Abstract: Disclosed herein are embodiments related to security in cloudlet environments. In some embodiments, for example, a computing device (e.g., a cloudlet) may include: a trusted execution environment; a Basic Input/Output System (BIOS) to request a Key Encryption Key (KEK) from the trusted execution environment; and a Self-Encrypting Storage (SES) associated with the KEK; wherein the trusted execution environment is to verify the BIOS and provide the KEK to the BIOS subsequent to verification of the BIOS, and the BIOS is to provide the KEK to the SES to unlock the SES for access by the trusted execution environment.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: March 14, 2023
    Assignee: Intel Corporation
    Inventors: Yeluri Raghuram, Susanne M. Balle, Nigel Thomas Cook, Kapil Sood
  • Patent number: 11599180
    Abstract: Battery management systems and methods for using the same to obtain battery shock and/or rollover data. An exemplary battery management system of the present disclosure comprises an accelerometer configured to obtain acceleration data, a microcontroller operably connected to the accelerometer and configured to receive the acceleration data from the accelerometer, and a data storage medium in communication with the microcontroller, the data storage medium configured to store the acceleration data therein, wherein when the battery management system is in communication with a battery, the accelerometer can obtain the acceleration data relating to the battery, and the microcontroller can operate to disconnect the battery from a load connected thereto should the acceleration data meet or exceed a threshold limit.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: March 7, 2023
    Assignee: Green Cubes Technology, LLC
    Inventors: Anthony Cooper, Vijayendra Jannu, Nagaraj Govindaiah
  • Patent number: 11599174
    Abstract: A combined data/power coupling device includes a chassis having first and second powering device connectors and a powered device connector each coupled to a data/power coupling subsystem. The data/power coupling subsystem configures each of the first and second powering device connectors to receive power from at least one powering device, configures the first powering device connector to receive data from the at least one powering device, and provides data and power received via the first powering device connector to a powered device via the powered device connector. When the data/power coupling subsystem determines that data and power are not available via the first powering device connector, it configures the second powering device connector to receive data from the at least one powering device, and provides data and power received via the second powering device connector to the powered device via the powered device connector.
    Type: Grant
    Filed: July 21, 2021
    Date of Patent: March 7, 2023
    Assignee: Dell Products L.P.
    Inventors: Shree Rathinasamy, Neal Beard, Maunish Shah
  • Patent number: 11586239
    Abstract: Electronic devices are disclosed. In some implementations, an electronic device includes a device interface to provide an interface to a host and detect link information associated with a bandwidth provided by the device interface in communicating with the host, a processor coupled to the device interface to be in communication with the host, and structured to be operable to control operations of the electronic device in response to a request received from the host through the device interface, and a clock generator coupled to provide the device interface and the processor with clock signals to be used to operate the device interface and the processor. The processor is configured to adjust frequencies of the clock signals based on the link information.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: February 21, 2023
    Assignee: SK hynix Inc.
    Inventors: Ku Ik Kwon, Kyeong Seok Kim, Su Ik Park, Yong Joon Joo
  • Patent number: 11579443
    Abstract: Eyewear including a support structure defining a region for receiving a head of a user. The support structure supports optical elements, electronic components, and a use detector. The use detector is coupled to the electronic components and is positioned to identify when the head of the user is within the region defined by the support structure. The electronic components monitor the use detector and transition from a first mode of operation to a second mode of operation when the use detector senses the head of the user in the region.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: February 14, 2023
    Assignee: Snap Inc.
    Inventors: Julio Cesar Castañeda, Rajeev Ramanath
  • Patent number: 11579918
    Abstract: Techniques for optimizing CPU usage in a host system based on VM guest OS power and performance management are provided. In one embodiment, a hypervisor of the host system can capture information from a VM guest OS that pertains to a target power or performance state set by the guest OS for a vCPU of the VM. The hypervisor can then perform, based on the captured information, one or more actions that align usage of host CPU resources by the vCPU with the target power or performance state.
    Type: Grant
    Filed: September 15, 2021
    Date of Patent: February 14, 2023
    Assignee: VMware, Inc.
    Inventors: Andrei Warkentin, Cyprien Laplace, Regis Duchesne, Ye Li, Alexander Fainkichen