Patents Examined by John B. Vigushin
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Patent number: 6370033Abstract: An electronic device has a filter function, and enables a communications device to be miniaturized and made thin at reduced cost. A pair of spiral conductive patterns are provided adjacent to each other on a printed circuit board having multiple electronic elements provided thereon, and one end of each of the spiral conductive patterns connects via through holes to a ground pattern provided on the bottom face of the printed circuit board. Then, a cavity case is electrically connected to the ground pattern, and is mounted on the printed circuit board so as to cover the top faces of the spiral conductive patterns, thereby forming a cavity resonance filter joined to the printed circuit board.Type: GrantFiled: February 2, 2000Date of Patent: April 9, 2002Assignee: Toko Kabushiki KaishaInventors: Seiichiro Saegusa, Naoshi Nakamura
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Patent number: 6359786Abstract: In a preferred embodiment, a multiconfigurable communication terminal, including: a terminal housing; electronic circuitry disposed within the housing; at least one selected functional electronic module removably disposed in the housing and releasably attached to the electronic circuitry.Type: GrantFiled: June 1, 1998Date of Patent: March 19, 2002Inventor: James S. Bianco
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Patent number: 6359340Abstract: A multichip module has at least two semiconductor chips wherein each has a row of bonding pads formed on the active surface thereof and disposed along one side edge thereof. In some embodiments, the semiconductor chips may have a plurality of bonding pads along only two mutually perpendicular side edges thereof. The semiconductor chips are mounted to a substrate in a stacking arrangement wherein the upper chip is attached to the active surface of the lower chip in a manner that no portion of the upper chip interferes with a vertical line of sight of each bonding pad of the lower chip to permit wire bonding thereof. Therefore, all semiconductor chips can be wire bonded simultaneously after stacking the chips on the substrate. This allows wire bonding of all chips to be completed in a single step so as to increase UPH (unit per hour), thereby reducing cost for manufacturing the MCM.Type: GrantFiled: July 28, 2000Date of Patent: March 19, 2002Assignee: Advanced Semiconductor Engineering, Inc.Inventors: Chun Hung Lin, Kuang-Hui Chen, Shyh-Wei Wang, Su Tao, Jian Wen Chen
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Patent number: 6356453Abstract: A package includes both a flip chip mounted active Chip component and a passive chip component. The flip chip bumps between the bond pads of the active chip component and the substrate are low impedance. Further, by mounting the active chip component as a flip chip, the area on the substrate occupied by the active chip component is approximately equal to the area of the active chip component.Type: GrantFiled: June 29, 2000Date of Patent: March 12, 2002Assignee: Amkor Technology, Inc.Inventors: Frank Juskey, Christopher Scanlan, Pat O'Brien
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Patent number: 6356455Abstract: A thin electrical circuitry structure is formed which contains conductive circuitry traces, integral capacitors and integral resistors. A first laminate structure comprises a conductive foil having a layer of embeddable dielectric material laminated thereto. A second laminate structure comprises a conductive foil having a layer of resistive material on one side, the thickness of the resistive material layer being less than that of the layer of embeddable dielectric material. The resistive material layer is circuitized to produce resistive patches, and the two structures are laminated together, embedding the resistive patches in the dielectric material layer. One of the foils is circuitized providing circuitry traces, optional inductor coils, and capacitor plates. That foil embedded in dielectric laminate to support the structure for further processing. The other foil is then circuitized providing circuitry traces, optional inductor coils and capacitor plates.Type: GrantFiled: September 23, 1999Date of Patent: March 12, 2002Assignee: Morton International, Inc.Inventor: Richard W. Carpenter
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Patent number: 6353540Abstract: A low-EMI circuit which realizes a high mounting density by converting the potential fluctuation off a power supply layer with respect to a ground layer which occurs on switching an IC device etc., into Joule's heat in the substrate without using any parts as a countermeasure against the EMI. Its structure, a circuit board using it, and a method of manufacturing the circuit board are also disclosed. Parallel plate lines in which the Q-value of the stray capacitance between solid layers viewed from the power supply layer and ground layer is equivalently reduced and which are matchedly terminated by forming a structure in which a resistor (resistor layer) and another ground layer are provided in addition to the power supply layer and the ground layer on a multilayered circuit board. A closed shield structure is also disclosed.Type: GrantFiled: July 10, 1997Date of Patent: March 5, 2002Assignee: Hitachi, Ltd.Inventors: Yutaka Akiba, Yasunori Narizuka, Hirayoshi Tanei, Naoya Kitamura
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Patent number: 6351027Abstract: A chip mounted enclosure (“CME”) comprises a base formed by an integrated circuit chip, a transducer element disposed on the integrated circuit chip, a side piece surrounding the transducer element that is coupled to the base, and a top piece coupled to the side piece. A method of making a CME comprises mounting a transducer element to a planar surface of an integrated circuit chip, where the planar surface forms a base of the CME. A side piece is fabricated to surround the transducer element. A top piece of the CME is placed on the side piece. Individual CMEs can be fabricated from a wafer assembly, where transducer elements, each respectively mounted to an integrated circuit wafer having corresponding integrated circuit chips, are individually surrounded by a side piece structure that is bonded to the integrated circuit wafer. Individual CMEs are formed by singulating the wafer assembly.Type: GrantFiled: February 29, 2000Date of Patent: February 26, 2002Assignee: Agilent Technologies, Inc.Inventors: Kirk S. Giboney, Jonathan Simon
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Patent number: 6350957Abstract: A circuit board which is formed with bump patterns subject to a narrow variation in height on the surface of the circuit board, and which permits high-density packaging of a semiconductor component thereon. In this circuit board, conductor circuits formed by electroplating are embedded in an insulating base that is formed of a resist layer and an insulating substrate, and bumps are exposed in the surface of the insulating base. The bumps and the conductor circuits are connected electrically with one another by means of pillar-shaped conductors that are formed by electroplating. Each bump is a multilayer structure in two or more layers formed by successively depositing different electrically conductive materials by electroplating.Type: GrantFiled: August 7, 2000Date of Patent: February 26, 2002Assignees: Meiko Electronics, Co., Ltd., Machine Active Contact Co., Ltd.Inventors: Noboru Shingai, Tatsuo Wada, Katsuro Aoshima
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Patent number: 6349037Abstract: An electrical machine, such as a router, switch, hub, etc., includes a housing in which a Primary Backplane and Secondary Backplane are mounted in stacked spaced relationship. A primary Bus is fabricated on the Primary Backplane and a secondary Bus is fabricated on the Secondary Backplane. Connectors with feed through elements provide mechanical support and electrical transmission between the Primary Backplane and Secondary Backplane.Type: GrantFiled: May 4, 1999Date of Patent: February 19, 2002Assignee: International Business Machines CorporationInventors: Roy Lee Draughn, Christopher Lee Durham, Robert Fung-chen Pan, Theodore Brian Vojnovich
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Patent number: 6349036Abstract: A computer functional card adapting seat comprises a base and at least one computer functional card. The base has a circuit substrate therein; At least one terminal slot is formed in the circuit substrate. Each terminal slot is connected to a circuit control unit of the circuit substrate. At least one universal serial bus inserting hole, a first inserting hole for being supplied with DC power, and a second inserting hole for being connected to a computer are installed on the base. The universal serial bus inserting hole, and first and second inserting holes are connected to the circuit control unit. Thereby, the computer functional card is formed on the base for being communicated to a computer without needing to detach the case of the computer mainframe.Type: GrantFiled: July 25, 2000Date of Patent: February 19, 2002Assignee: Jess-Link Products Co., Ltd.Inventors: Jessica Chang, Chao Jen Wang
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Patent number: 6347041Abstract: A data processing system including but not limited to a section of a first printed-circuit-board conductive element, the section of the first printed-circuit-board conductive element formed to follow at least one bent segment of a first printed-circuit-board path; a section of a second printed-circuit-board conductive element, the section of the second printed-circuit-board conductive element having at least a first part formed to follow at least one bent segment of a second printed-circuit-board path, where the at least one bent segment of the second printed-circuit-board path is substantially proximate to and has a length less than a length of the at least one bent segment of the first printed-circuit-board path; and the section of the second printed-circuit-board conductive element having at least a second part formed to follow a conductive-section-equalization feature which deviates from the second printed-circuit-board path, the at least a second part situated substantially proximate to the at least oneType: GrantFiled: January 21, 2000Date of Patent: February 12, 2002Assignee: Dell USA, L.P.Inventors: Jeffrey C. Hailey, William M. Simon
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Patent number: 6343018Abstract: A mounting structure of a card connector includes a connector body surface mounted on a wiring circuit board. An IC card can be withdrawably inserted into the connector body so that the IC card can be connected to the wiring circuit board through the connector body. The connector body includes a card insertion space which is disposed at an angle of inclination with respect to an upper surface of the wiring circuit board. A card inlet/outlet port is formed at an upper inclination end of the card insertion space such that the IC card inserted into the card insertion space through the card inlet/outlet port is retained for connection at an angle of inclination.Type: GrantFiled: January 24, 2000Date of Patent: January 29, 2002Assignee: Yamaichi Electronics Co., Ltd.Inventors: Tetsuo Takeyama, Minoru Igarashi
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Patent number: 6341071Abstract: A method and structure for reducing thermally induced strains on the solder joints that couple a ball grid array (BGA) module to a circuit card, so as to improve the fatigue life of the BGA module. The thermally induced strains arise from a mismatch in thermal expansion coefficient between the dielectric substrate of the BGA module and the dielectric board of the circuit card. The method generates void annular regions around portions of the BGA dielectric substrate to which the BGA solder balls are to be attached and/or around portions of the circuit card dielectric material to which the BGA module is to be attached. This results in the formation of dielectric islands or peninsulas that bound the solder balls of the BGA module after installation on the circuit card. The dielectric islands or peninsulas thus formed serve to increase the effective height over which the differential expansion is accommodated, thereby reducing the strains throughout the solder joints.Type: GrantFiled: March 19, 1999Date of Patent: January 22, 2002Assignee: International Business Machines CorporationInventors: Eric A. Johnson, John S. Kresge
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Patent number: 6333856Abstract: The present invention relates to an arrangement concerned with multilayer printed circuit boards that enables cavities in said board to be utilized more effectively. A substrate (14) that includes a chip (16) which is connected to the microstrips (17) of the substrate (14) by means of bonding wires (18) is placed on a bonding shelf (13) with the chip (16) orientated towards the bottom of the cavity (6). The microstrips (17) on the substrate (14) therewith come into contact with the microstrips (12) on the bonding shelf (13). The earth plane (15) of the substrate (14) is connected to the upper earth plane (2) by means of bonding wires (19). The arrangement means that the cavity (16) is utilized effectively, at the same time as the substrate (14) protects the underlying chips (7, 16) against mechanical influences.Type: GrantFiled: June 16, 2000Date of Patent: December 25, 2001Assignee: Telefonaktiebolaget LM Ericsson (publ)Inventor: Thomas Harju
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Patent number: 6330164Abstract: The present invention provides an ancillary electrical component in very close proximity to a semiconductor device, preferably mounted directly to the semiconductor device. In one preferred embodiment, the ancillary electrical component is a capacitor. In a preferred embodiment, a terminal is provided on the semiconductor device such that the capacitor can be electrically connected directly to the terminals, as by soldering or with conductive epoxy. Connecting the capacitor between terminals of a power loop provides superior noise and transient suppression. The very short path between the capacitor and the active circuit provides for extremely low inductance, allowing for the use of relatively small capacitors. The semiconductor device then is connected to an electronic device such as a PC board for further connection to other circuitry.Type: GrantFiled: July 13, 1998Date of Patent: December 11, 2001Assignee: FormFactor, Inc.Inventors: Igor Y. Khandros, David V. Pedersen, Benjamin N. Eldridge, Richard S. Roy, Gaetan Mathieu
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Patent number: 6327155Abstract: A printed circuit card assembly for preventing flame spread in an equipment assembly includes a printed circuit board having first and second sides, at least one of the first and second sides of the printed circuit board adapted for mounting a plurality of electronic components thereon; and a heat absorbing flame resistant shield facing one side of the printed circuit board for absorbing heat energy from an adjacent printed circuit card assembly thereby reducing heat transfer to the printed circuit board.Type: GrantFiled: December 16, 1999Date of Patent: December 4, 2001Assignee: Nortel Networks LimitedInventors: Mark Jeffrey Niepmann, Eric Hoyt Wong, Edward R. Champion, Jr.
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Patent number: 6327152Abstract: A structure wherein a hand held computer module can be conveniently and interchangeably coupled to accessory devices. The hand held computer module is detachably connected to a first accessory module by a first interlocking structure. The computer module includes the first interlock mechanism and the first accessory module includes the second interlock mechanism. The first and second interlock mechanisms are mated together to form a physical connection between the computer module and the first accessory module. The first accessory module also includes a third interlock mechanism which is similar to the first interlock mechanism. A second accessory module has a fourth interlock mechanism which is similar to the second interlock mechanism. The first accessory module can be detachably connected to a second accessory module by means of a second interlocking structure which includes the third and fourth interlock mechanisms.Type: GrantFiled: November 19, 1999Date of Patent: December 4, 2001Assignee: Casio Computer Co., Ltd.Inventor: Tony Pingfu Saye
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Patent number: 6324072Abstract: A microelectronic component of sandwich construction, that includes a first substrate with a first conductor track plane and a second substrate with a second conductor track plane, between which many semiconductor chips are disposed. The contacting of the second conductor track plane to the adjacent surface of the semiconductor chips is effected by fixed contacting means, in particular with the soldered connections, an electrically conductive adhesive, or electrically conductive balls. The microelectronic components of the invention are suitable in particular as power components and can be used for instance in inverters. The invention also relates to a method for producing the microelectronic component.Type: GrantFiled: March 30, 1999Date of Patent: November 27, 2001Assignee: Siemens AktiengesellschaftInventors: Leo Lorenz, Michael Kaindl, Herbert Schwarzbauer, Gerhard Münzing, Peter Stern, Manfred Brückmann
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Patent number: 6324067Abstract: A printed wiring board (PWB) and assembly are described which are suitable for high density mounting of an electronic component and which can provide a thin and light assembly. A recess is formed in one part of a PWB and components are received in this recess. The components are lower than the surface of the PWB. A conductive pad is provided to the bottom of the recess and a connecting terminal and the conductive pad are electrically connected by using a solder ball or a conductive adhesive material. The recess is formed by partially removing one or more layers of plural conductive layers and insulating layers which make up the multilayer PWB.Type: GrantFiled: April 20, 2000Date of Patent: November 27, 2001Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Tousaku Nishiyama
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Patent number: 6324069Abstract: An integrated circuit chip package according to the present invention includes an integrated circuit chip that is mounted on a substrate by a reflow process and by a plurality of solder bumps. At least one standoff is located between the circuit chip and the substrate to maintain a distance between the circuit chip and the substrate during the reflow process. A mold compound is used for underfilling air gaps between the chip and the substrate. The integrated circuit chip package is formed by placing the chip and substrate within a mold cavity and pressing a transfer mold compound into the mold cavity. Air spaces between the integrated circuit chip and the substrate are underfilled by the mold compound as it is pressed in between the integrated circuit chip, the standoffs and the substrate. Air is allowed to escape from between the chip and the substrate during the underfilling through a vent which extends through the substrate.Type: GrantFiled: December 13, 1999Date of Patent: November 27, 2001Assignee: Hestia Technologies, Inc.Inventor: Patrick O. Weber