Abstract: A system for protecting circuit board mounting devices within an enclosure. The system includes one or more protective housings that are disposed about corresponding openings through a printed circuit board. A flexible clip is attached to the printed circuit board proximate each opening. Each clip includes a retainer portion designed to receive the head of the standoff. The protective housings extend around the retainer portion, and protect the secure mounting of the circuit board to corresponding standoffs.

Abstract: Method and apparatus for affixing a circuit board with a protective chassis by affixing the circuit board substantially near the center of the long axis of the circuit board so that ends of the circuit board along the longer axis of the circuit board can flex freely uninhibited by the chassis. In the event that the circuit board-chassis unit is hit or dropped, since the mechanical shock is transmitted from the impact point on the chassis only to the approximate center of the circuit board, circuit components on the circuit board located away from the center of the circuit board will experience a reduced level of mechanical shock. Also, solder joints will experience less mechanical stress because there is less circuit board bending. This reduction in the level of mechanical shock to the circuit board increases the chances that the circuit components will not be damaged or become detached from the circuit board.

Abstract: A plate-shaped ceramic circuit substrate (6), which is adapted to be vertically mounted on a mother board, has near a lower edge (7) thereof a series of contact areas (solder pads) (1) for contacting the circuit with terminals of the mother board. For improved solderability also in case of small contact area (1), these contact areas extend down as far as the lower edge (7), and there is provided one recess (2) each which constitutes a solder deposit (3) and which extends through the circuit substrate (6) and runs from the lower face side (5) of the circuit substrate (6) upwardly into the respective contact area (1).

Abstract: A delamination resistant electronics module assembly includes a printed circuit board layer coupled to a pallet via a cured epoxy preform. The preform may include conductive epoxy, or non-conductive epoxy with conductive traces. Component wells are collectively formed by the preform and PCB layer for placement of heat generating components, such as RF components. Methods of manufacturing module assemblies include curing the epoxy preform by applying a predetermined elevated pressure and heat to a sub-assembly of the pallet, preform layer, and PCB layer.

Abstract: A retention mechanism 1 mounted on a PCB comprises a retention housing 10, a pair of board lock posts 30 extending through a bottom plate 15 of the housing and retained in the PCB and a pair of pins 20. The retention housing defines a slot 11 receiving an end of an electrical connector and comprises a rear wall 12 from which at least a stopper 13 projects. Each pin comprises a head portion 21 and a pin body 22 for inserting into a hole 33 defined in a corresponding post. The head portion comprises a planar side surface 211 and an aucute side surface 212. A distance between a longitudinal axis of the pin body and a front face 132 of the stopper is shorter than a distance between the axis and the arcuate side surface and is longer than a distance between the axis and the planar side surface.

Abstract: An integrated circuit arrangement comprising an integrated circuit package having a package board. An integrated circuit die is mounted to a surface of the package board. A spring frame is mounted to the package board surface at a pair of opposite frame bends. The spring frame has a central opening that receives the integrated circuit die. Sides of the spring frame away from the bends are raised from the package surface. A heat sink is mounted to the spring frame such that a bottom of the heat sink contacts an upper surface of the integrated circuit die as the heat sink pushes the sides of the spring frame toward the package surface.

Abstract: A system of interlocking modules for use with a programmable logic controller. The system utilizes a plurality of modules, e.g. input/output modules, that are mechanically and electrically interlinked. Modules are electrically connected to adjacent modules by plug portions The mechanical interlocking features and the plug portions are designed to permit insertion and removal of individual modules disposed between adjacent modules, without moving either of the adjacent modules. Also, the plug portions are designed to isolate the electrical connections from vibration.

Abstract: A multi-chip module includes bare IC chips mounted on respective areas of a printed wiring board. Outer electrode pads on the peripheries of the board are soldered to another printed wiring board such as a motherboard. Lead pads and the outer electrode pads are interconnected through a circuit pattern, through holes, and interstitial via holes. The circuit pattern is disposed on a die bonding surface of the bare IC chips for which insulation is not necessary.

Abstract: A high-density mounted device, in which a plurality of semiconductor devices such as semiconductor element or module boards, are mounted on a wiring board, includes an adhesive sheet which is interposed between the wiring board and the semiconductor device. The adhesive sheet has a sheet-like base board made of an adhesive member and a plurality of conductive Sections provided at predetermined pitches in the sheet-like base member. The conductive sections are electrically insulated from each other, and extend from one side of the sheet-like base member to the other side thereof, and enable electrical connection between the electrode terminals of the wiring board and the electrode terminals of the semiconductor device. The conductive sections work as heat conductive channels between the wiring board and the semiconductor device.

Abstract: An electronic package (302, FIG. 3) includes one or more capacitors (308) embedded within one or more layers (310) of the package. The embedded capacitors are discrete devices, such as integrated circuit capacitors (FIGS. 17-18) or ceramic capacitors. During the package build-up process, the capacitors are mounted (410, FIG. 4) to a package layer, and a non-conductive layer is applied (412) over the capacitors. When the build-up process is completed, the capacitor's terminals (604, 608, FIG. 6) are electrically connected to the top surface of the package. The embedded capacitor structure can be used in an integrated circuit package (1904, FIG. 19), an interposer (1906), and/or a printed circuit board (1908).

Abstract: An electrical component is provided that has a plurality of electrical leads. Further, an electromagnetic interference shield and ground cage is provided which has a plurality of conductive walls connected together to form an enclosure having an open bottom. One of the walls has a plurality of openings formed therein to allow the plurality of leads to be passed into the enclosure. The electromagnetic interference shield and ground cage further has at least two ground connection pins attached to a lower edge of the walls. One of the leads is a ground lead that is electrically coupled to the electromagnetic interference shield and ground cage at one of the openings, thus reducing the length, inductance and impedance of the ground lead.

Abstract: A printed circuit board assembly with improved bypass decoupling for BGA packages. In one embodiment, a capacitor may be interposed between a BGA package and a PCB within a perimeter of the contact pads that form a BGA footprint. The capacitor may have physical dimensions which allow a BGA package to be mounted such that there is no physical contact between the capacitor and the BGA.

Abstract: Switching noise within an LGA-packaged or PGA-packaged IC Vdd and IC Vss nodes is reduced by spreading the electrical current in the bypass path to reduce the effective current loop area, and thus reduce the energy stored in the magnetic field surrounding the current path. This result is achieved by minimizing the horizontal components of the linkage paths between the IC nodes to be bypassed and the bypass capacitor. Since effective inductance Leff seen by the bypass capacitor is proportional to magnetic energy, Leff is reduced over a broad band of frequencies. For each bypass capacitor, a pair of conductive vias is formed. A first via is coupled to the LGA package Vcc plane and to the IC Vdd node, and a second via is coupled to the LGA package Vss plane and to the IC Vss node.

Abstract: A system for connecting a combination of substrates, including chips, components, printed-circuit-boards and multiple-chip-modules to each other. The system includes a half-conductive layer forming a resistive network sandwiched between the mating substrates. The half-conductive layer has sufficient conductance to allow electrical coupling between mating electrodes on the substrates, and sufficient resistance, to stay below the maximum specified cross-talk level between non-mating electrodes. The connection system can be used to connect light emitting sources with integrated circuits, detectors to integrated circuits and two integrated circuits of the same or possibly different technology to each other. Connection of integrated circuits to printed circuit boards (PCBs) and multi-chip modules (MCMs) is also supported.

Abstract: A technique for reducing the number of layers in a multilayer circuit board is disclosed. In one embodiment, the technique is realized by forming a first plurality of electrically conductive vias in the multilayer circuit board extending from the surface of the multilayer circuit board to a first of the plurality of electrically conductive signal layers, wherein the first plurality of electrically conductive vias are arranged so as to form a channel in a second of the plurality of electrically conductive signal layers beneath the first plurality of electrically conductive vias. A first plurality of electrical signals are routed on the first of the plurality of electrically conductive signal layers. A second plurality of electrical signals are routed on the second of the plurality of electrically conductive signal layers in the channel formed in the second of the plurality of electrically conductive signal layers.

Abstract: A computer processor socket has a base with grounding and signal holes. Each hole contains a pin for electrical interconnection with a circuit board. The socket also contains a grounding device around its perimeter. The grounding device has a continuous ring of wiping members on its upper end. When a processor is mounted to the top of the socket, the wiping members extend slightly above the processor. The heatsink mounted on top of the processor engages the wiping members which are spring-biased against its lower surface. Since the wiping members extend completely around the perimeter of the socket, a continuous electrical ground interface is formed between the heatsink and the socket. The lower ends of the grounding device are electrically interconnected with the socket grounding pins which are grounded to the board.

Abstract: A header containing a semiconductor die, method of manufacture thereof and electronic device employing the same. In one embodiment, the header includes first and second contacts, and an intermediate body. The intermediate body includes an insulated section interposed between the first and second contacts and has a cavity therein. The intermediate body also includes a semiconductor die, located within the cavity, adapted to condition a signal passing through at least a portion of the header.

Abstract: A cable management apparatus includes a bracket member and a cable guide member fastened to the bracket member. The bracket member includes a stem portion and a body portion for fastening to a cabinet for housing a plurality of electronic modules. The cable guide member includes a flange portion and a shelf portion having a surface. The flange portion is angled with respect to the surface of the shelf portion to allow a plurality of cables to contact the surface of the shelf portion to route the plurality of cables within the cabinet.

Abstract: A module with electronic components mounted on a carrier and electrically interconnected in accordance with a predefined circuit. Such a module, distinguished by particular variability, ease of assembly, compactness and applicability for high currents, is characterized in that the carrier is an injection molded plastic part (1), into which flat connectors (3) for receiving the components may be inserted.

Abstract: An electronic circuit pack having a printed circuit board with a faceplate at a front of the board. The faceplate has two end regions carrying latches for holding the board into a shelf. A front wall of the faceplate has an intermediate part between the end regions, the intermediate part extending forwardly of the end regions and lying at least between the latches. Preferably, the intermediate part of the front wall extends as far as a frontal vertical plane of the shelf which is the foremost position allowable for a shelf and a circuit board combination. The intermediate part of the front wall lying in this forward position provides additional space behind it for extending the electronic circuitry of the circuit pack for a unitary shelf size. This additional space is occupied by the printed circuit board with conductors and electronic components and/or connectors for test purposes and memory cards.