Patents Examined by John D. Smith
  • Patent number: 4666786
    Abstract: A composite nickel plated sliding surface is obtained by the formation of a composite nickel plating film on a sliding surface of an automobile part such as an engine cylinder or piston by electroless nickel plating. The plating film contains at least one member of wear resistant particles having an average particle size of 0.1 to 1.0.mu. selected from SiC, TiC, WC, BC.sub.4, TiN, Al.sub.2 O.sub.3 or the like, and also at least one member of lubricating particles having an average particle size of 1 to 10.mu. selected from BN, MoS.sub.2, and Teflon. The nickel plating bath is adjusted to have a phosphorus concentration of 0.5 to 12%. When the matrix of the nickel plating film has a phosphorus concentration of 0.5 to 5%, the film hardness is improved.
    Type: Grant
    Filed: February 27, 1985
    Date of Patent: May 19, 1987
    Assignees: Aisin Seiki Kabushiki Kaisha, Toyota Jidosha Kabushiki Kaisha
    Inventors: Hideo Yano, Keiichi Kano, Hitoshi Ozawa, Shinji Kato, Yoshio Takagi
  • Patent number: 4666739
    Abstract: A process is described for the production of metal patterns on insulating substrates, especially of printed circuits, in which the substrates are provided with holes by means of electrical connections and the metal patterns are produced on the surface of the substrate with the aid of a negative mask in accordance with the subtractive process, said process being characterized by the following steps:treatment in gaseous sulfur trioxide;application of a negative mask which corresponds to the conductive pattern to be produced;through-hole-plating and subsequent plating of the conductive pattern, which is effected by the following steps in the process:activation by means of an ionogenic precious metal solution, treatment in a reducing agent solution, chemical or chemical and electrolytic deposit, in which the metal deposit takes place solely on the surface of the metal pattern which is to be produced.In addition, insulating substrates with metal patterns, especially printed circuits, are disclosed.
    Type: Grant
    Filed: May 6, 1985
    Date of Patent: May 19, 1987
    Assignee: Dr.-Ing. Max Schlotter GmbH & Co. KG
    Inventor: Jiri Roubal
  • Patent number: 4664943
    Abstract: A method of forming external electrodes at both ends of chip parts while elastically holding the chip parts.
    Type: Grant
    Filed: November 15, 1984
    Date of Patent: May 12, 1987
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Koichi Nitta, Kazuma Kabuta, Masami Yamaguchi, Tadahiro Nakagawa, Katsuyuki Moriyasu
  • Patent number: 4664942
    Abstract: Packless cementation is used to diffusion bond nickel to discrete exposed areas of tungsten or molybdenum that are in turn bonded to the surface of a ceramic body, e.g. in the preparation of a ceramic chip carrier or other premetallized ceramic device.
    Type: Grant
    Filed: February 5, 1986
    Date of Patent: May 12, 1987
    Assignee: General Electric Company
    Inventor: Dong-Sil Park
  • Patent number: 4664063
    Abstract: An apparatus for growing a compound semiconductor on a substrate by molecular beam epitaxy, includes a growth chamber, and Knudsen cells, disposed in the growth chamber, for generating molecular beams of source materials for the compound semiconductor independently. An ion gauge is disposed in the growth chamber, for measuring intensities of the molecular beams. A heater disposed in the growth chamber heats the substrate to a growth temperature of the compound semiconductor. A heating element heats the heater and the ion gauge to evaporate contamination materials including the source materials deposited on said substrate heating means and said measuring means after the growth of the compound semiconductor. An evacuater is provided to evacuate the growth chamber to a vacuum.
    Type: Grant
    Filed: June 4, 1986
    Date of Patent: May 12, 1987
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuo Ashizawa, Naoharu Sugiyama
  • Patent number: 4664944
    Abstract: An improved deposition method for producing silicon carbide high-temperature semiconductor material comprising placing a semiconductor substrate composed of silicon carbide in a fluidized bed silicon carbide deposition reactor, fluidizing the bed particles by hydrogen gas in a mildly bubbling mode through a gas distributor and heating the substrate at temperatures around 1200.degree.-1500.degree. C. thereby depositing a layer of silicon carbide on the semiconductor substrate.
    Type: Grant
    Filed: January 31, 1986
    Date of Patent: May 12, 1987
    Assignee: The United States of America as represented by the United States Department of Energy
    Inventors: George C. Hsu, Naresh K. Rohatgi
  • Patent number: 4663192
    Abstract: A process for preparing a transparent electrode substrate comprising forming, on an insulated transparent substrate film (A), a polymer compound layer (B) formed from at least one class consisting of polyurethane resin, a polyester resin and an epoxy resin, forming partly thereon a water-soluble coating layer (C), further forming conductive layer (D) having a surface electric resistance of 10 to 10.sup.4 ohm/.quadrature., and dissolving and removing the water-soluble coating layer (C) and the transparent conductive layer (D) thereon by the aid of washing.
    Type: Grant
    Filed: October 22, 1985
    Date of Patent: May 5, 1987
    Assignee: Nissha Printing Co., Ltd.
    Inventors: Hiroshi Hatakeyama, Masayuki Ogawa, Kozo Matsumura, Eiji Nakagawa
  • Patent number: 4663199
    Abstract: A method for wet metallizing articles made, or having a surface to be metallized, of an acrylic polymer containing at least 0.01 percent of acrylamide, methacrylamide, or of an acrylate ester or amide of an alkanol or alkyl amine have a terminal basic nitrogen group, e.g., an amino, substituted amino, or basic nitrogen heterocyclic group.
    Type: Grant
    Filed: March 7, 1986
    Date of Patent: May 5, 1987
    Assignee: Rohm GmbH
    Inventors: Ralf Liebler, Manfred Munzer, Peter Quis, Petrus E. J. Legierse
  • Patent number: 4663191
    Abstract: A process of forming a patterned silicide layer overlying a processed semiconductor substrate, the substrate having insulator regions and insulator-free regions on an exposed surface thereof, comprising the steps of:co-depositing silicon and a refractory metal on the exposed surface of the substrate to form a metal rich silicide thereon;annealing the metal rich silicide such that it reacts with the underlying insulator-free regions to form a reacted silicide without reacting with the underlying insulator regions; andexposing the substrate to a wet etchant which removes the unreacted portions of the metal rich silicide without removing the reacted silicide.
    Type: Grant
    Filed: October 25, 1985
    Date of Patent: May 5, 1987
    Assignee: International Business Machines Corporation
    Inventors: Kwangwoo Choi, Stanley Roberts
  • Patent number: 4661375
    Abstract: The height of solder bumps (10) on a bonding pad (24) of a semiconductor chip (12) is increased by successively immersing the chip in molten solder alloys having progressively lower melting points.
    Type: Grant
    Filed: March 7, 1986
    Date of Patent: April 28, 1987
    Assignee: AT&T Technologies, Inc.
    Inventor: Donald A. Thomas
  • Patent number: 4661384
    Abstract: Activation baths containing an organometallic compound based on elements of sub-group 1 or 8 of the periodic table with a "guest/host" interrelationship are outstandingly suitable for electroless metallization of preferably non-metallic substrates. Activators of palladium compounds and cyclic crown ethers are particularly suitable.
    Type: Grant
    Filed: June 20, 1985
    Date of Patent: April 28, 1987
    Assignee: Bayer Aktiengesellschaft
    Inventors: Kirkor Sirinyan, Rudolf Merten, Gerhard D. Wolf
  • Patent number: 4661374
    Abstract: Metal-gate transistors with metal silicide cladding of the source/drain regions, as may be used in very high density dynamic RAM devices, are made by a process in which the metal gate is encapsulated in oxide and the cladding is self aligned with the encapsulated gate. A thin coating of a refractory metal is applied to the source/drain areas and heated to react with the exposed silicon. The unreacted metal is removed by an etchant that does not disturb the metal gate or the silicide.
    Type: Grant
    Filed: August 7, 1984
    Date of Patent: April 28, 1987
    Assignee: Texas Instruments Incorporated
    Inventor: Robert R. Doering
  • Patent number: 4661368
    Abstract: A dispensing nozzle tip is advanced into engagement with the particular position of the circuit board to which material is to be applied, and a reactive force on the nozzle tip from the circuit board is sensed by variation in the output from a load cell such that an exact spacing may be provided between the nozzle tip and that portion of the surface to which material is to be dispensed. Having provided such spacing between the tip and surface, the flowable material is dispensed and a reactive force from the surface, via the flowable material, is sensed by the load cell arrangement to provide for metering of a dose of the flowable material. Such surface location and dispensed dosage sensing is performed for every dose of material to be applied.
    Type: Grant
    Filed: September 18, 1985
    Date of Patent: April 28, 1987
    Assignee: Universal Instruments Corporation
    Inventors: Robert R. Rohde, Joseph J. Bedard
  • Patent number: 4661372
    Abstract: A method is described for depositing an electroless copper plate onto a region of a styrene-derivative polymer surface using a vacuum deposited copper catalyst. Prior to depositing the catalyst, the region is treated with ultraviolet radiation while exposed to air. It is found that the vacuum-deposited copper is active to catalyze electroless deposition onto the treated region, but not upon a similar region not subjected to the ultraviolet treatment.
    Type: Grant
    Filed: December 23, 1985
    Date of Patent: April 28, 1987
    Assignee: General Motors Corporation
    Inventor: Andrew M. Mance
  • Patent number: 4659587
    Abstract: In a selective electroless plating process suitable for formation and correction of a minute pattern by plating film, irradiation of the surface of a workpiece with a laser beam serves to selectively activate the surface of the workpiece to allow an electroless plating film to deposited on only the activated portions. The portion of the workpiece where plating is effected is irradiated with a radiation energy beam to form a damaged portion, which is contact with a plating bath during and/or after the irradiation to selectively from a plating film on the damaged portion. The portion of a workpiece where a pole as the connector part of a multilayer wiring board is to be formed is irradiated with a laser beam and allowed to have a pole selectively formed only thereon.
    Type: Grant
    Filed: October 10, 1985
    Date of Patent: April 21, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Midori Imura, Makoto Morijiri, Masanobu Hanazono, Shinichi Kazui, Youzi Miura, Hiroyuki Ogino
  • Patent number: 4659592
    Abstract: Metallized laminated materials are obtained by coating a solder-resistant core material with a non-conductive polymer film, and subsequent activation and wet-chemical metallization of the polymer film, the activation being carried out, without oxidative pretreatment, on the polymer film before it has hardened completely, and the final hardening only being effected after the metallization. The materials thus metallized are suitable for the production of printed circuits.
    Type: Grant
    Filed: June 28, 1985
    Date of Patent: April 21, 1987
    Assignee: Bayer Aktiengesellschaft
    Inventors: Kirkor Sirinyan, Friedrich Jonas, Rudolf Merten
  • Patent number: 4659585
    Abstract: A method of planarizing or smoothing the surface of a ceramic substrate by deposition of a silicon nitride layer. The silicon nitride in addition to planarizing the surface forms an alpha particle barrier. The substrates suitable for planarization with silicon nitride in accordance with the method of the present invention are sintered oxide particles which are bonded with a silicon bonding phase. The silicon content of the silicon bonding phase is greater than the silicon content of the aggregate of the oxide particles. The silicon nitride is preferably deposited by plasma enhanced chemical vapor deposition, and the silicon bonding phase is preferably a glass.
    Type: Grant
    Filed: June 24, 1985
    Date of Patent: April 21, 1987
    Assignee: International Business Machines Corporation
    Inventors: Kenneth L. Elias, Stuart R. Martin, William J. Slattery
  • Patent number: 4659650
    Abstract: A positive resist containing a weak base and polyvinyl phenol as a film forming component is deposited on a substrate, subsequently exposed imagewise, cured, blanket exposed and developed in a KOH solution at temperatures of less than 10.degree. C. The resist pattern thus obtained is exposed to light having a wavelength ranging from 300 to 320 nm and finally heat-treated at temperatures ranging from 150.degree. to 280.degree. C. The finished lift-off mask is dimensionally stable at temperatures of .ltoreq.280.degree. C. and does not emit liquid or volatile components when heated.During application of the lift-off mask, a material is blanket vapor deposited at a substrate temperature ranging from about 160.degree. to 250.degree. C. on the resist pattern having openings with overhanging walls. Subsequently, the resist pattern is dissolved in a sodium metasilicate solution, causing the material vapor deposited thereon to be lifted off, with the material deposited on the substrate directly remaining.
    Type: Grant
    Filed: March 17, 1986
    Date of Patent: April 21, 1987
    Assignee: International Business Machines Corporation
    Inventors: Holger Moritz, Gerd Pfeiffer
  • Patent number: 4659593
    Abstract: The present invention concerns processes for making composite materials.The process is characterized essentially by the fact that it consists in making a fibrous preform 1, in pre-treating this fibrous preform by a fluorine containing flux 3 and in wetting the said pre-treated preform by a light alloy.Utilization for the making of composite pieces with a fibrous armature such as carbon wet by a light aluminum-based alloy.
    Type: Grant
    Filed: December 14, 1983
    Date of Patent: April 21, 1987
    Assignee: Messier Fonderie d'Arudy
    Inventors: Jean-Philippe Rocher, Jean-Michel Quenisset, Rene Pailler, Roger Naslain
  • Patent number: 4657778
    Abstract: A method of producing a multilayer system comprises depositing a seed layer (4) of copper on an electrically insulating substrate (2). A resist is formed on the copper seed layer (4), and the seed layer is electroplated with copper to produce a desired conductor pattern (8). An air firing dielectric (10) is screen printed over the pattern (8) and the exposed parts of the seed layer (4) are fired in air. The outer skin of the pattern is oxidized as is also the whole of the seed layer other than where it underlies the copper pattern. The ozidized regions of the copper both form a firm bond with the dielectric and inhibit the migration of oxygen into the inner regions of the conductor pattern (8). Also the oxidation of the seed layer renders it non-conductive and therefore obviates the need for its removal. Through holes (12) produced in the dielectric enable electrical connection to the pattern (8).
    Type: Grant
    Filed: July 18, 1985
    Date of Patent: April 14, 1987
    Inventor: Peter L. Moran