Patents Examined by Kevin L. Ellis
  • Patent number: 7849259
    Abstract: An execution queue stores a write command from the host in response to issuance of the write command from the host, and is removed from the execution queue in response to a signal indicating that data designated by the write command has been written to the hard disk. A holding queue stores the write command removed from the execution queue. In response to the command being stored in the holding queue, a request is issued for an acknowledgment from the host. The write command is removed from the holding queue in response to the acknowledgment being received from the host. An outgoing queue stores the write command removed from the holding queue for deletion. The queues are controlled by queue management hardware, the request is issued by the queue management hardware, and the signal and acknowledgment are received by the queue management hardware.
    Type: Grant
    Filed: February 12, 2008
    Date of Patent: December 7, 2010
    Assignee: Marvell International Ltd.
    Inventors: William Wong, Kha Nguyen, Huy Tu Nguyen, William Dennin, III, Roger Baldwin
  • Patent number: 7849284
    Abstract: A message memory (1) with a flexible association between the message-object memories of the message memory (2) and the segments of a physical memory (3). The association is made through configuration, wherein one or more memory segments form a cluster as a function of the length of the message content to be stored.
    Type: Grant
    Filed: May 10, 2004
    Date of Patent: December 7, 2010
    Assignee: NXP B.V.
    Inventor: Peter Fuhrmann
  • Patent number: 7844786
    Abstract: Electrical interfaces, addressing schemes, and command protocols allow for communications with memory modules in computing devices such as imaging and printing devices. Memory modules may be assigned an address through a set of discrete voltages. One, multiple, or all of the memory modules may be addressed with a single command, which may be an increment counter command, a write command, or a punch out bit field. The status of the memory modules may be determined by sampling a single signal that may be at a low, high, or intermediate voltage level.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: November 30, 2010
    Assignee: Lexmark International, Inc.
    Inventors: James Ronald Booth, Bryan Scott Willett
  • Patent number: 7844783
    Abstract: A method for automatically detecting an attempted invalid access to a memory address in accordance with an exemplary embodiment is provided. The method includes reading a first data set having a software application name and a memory address stored therein utilizing the mainframe computer. The memory address indicates a portion of a memory that is not allowed to be changed. The method further includes detecting when a software application is attempting to access the memory address and setting a first bit in the memory to a first value in response to the detection utilizing the mainframe computer. The method further includes storing a name of the software application, the memory address, and contents of the portion of the memory specified by the memory address, in a second data set, when the first bit has the first value utilizing the mainframe computer. The method further includes displaying an error message on a display device when the first bit has the first value.
    Type: Grant
    Filed: October 23, 2006
    Date of Patent: November 30, 2010
    Assignee: International Business Machines Corporation
    Inventors: Edward Alan Addison, Tracy Michael Canada, Michael Vann
  • Patent number: 7844506
    Abstract: Under the present invention an identifier for a computer system undergoing an IT migration is extracted from a pertinent field the record. Thereafter, a mapping table is consulted. The mapping table generally contains entries that associate computer system identifiers with identifiers of hardware components that have been installed (or are to be installed) in the computer systems. Using the computer system identifier extracted from the record, an associated hardware component identifier is determined from the mapping table, and automatically populated into a corresponding field (e.g., a hardware component field) of the record. Thus, the present invention avoids having to manually populate the hardware component identifier into the record.
    Type: Grant
    Filed: July 19, 2005
    Date of Patent: November 30, 2010
    Assignee: International Business Machines Corporation
    Inventors: Scott D. Hicks, Victoria A. Locke, James A. Martin, Jr., Douglas G. Murray
  • Patent number: 7840770
    Abstract: Methods and systems for managing computer system configuration data are provided. The method includes staging the configuration data in a staging memory accessible to a first application, selecting a path for a transfer of the configuration data from the staging memory to a target memory, emulating a hardware data loader using a second software application adapted to control a transfer of the configuration data from the staging memory to the target memory, and transferring the configuration data from the staging memory to the target memory using the emulator. The method further effectively expands a memory capacity of a Flight Management Computer by providing swappable memory capacity such that a re-certification to Federal Aviation Administration standards of the Flight Management Computer is not triggered.
    Type: Grant
    Filed: October 18, 2006
    Date of Patent: November 23, 2010
    Assignee: The Boeing Company
    Inventors: Craig A. Larson, David L. Allen, Linda A. Hapgood, Timothy M. Mitchell
  • Patent number: 7840763
    Abstract: A computing system contains and uses a partitioning microkernel (PMK) or equivalent means for imposing memory partitioning and isolation prior to exposing data to a target operating system or process, and conducts continuing memory management whereby data is validated by security checks before or between sequential processing steps. The PMK may be used in conjunction with an Object Request Broker.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: November 23, 2010
    Assignee: SCA Technica, Inc.
    Inventors: David K Murotake, Antonio Martin
  • Patent number: 7840773
    Abstract: Methods, systems, and computer-readable media are provided for managing memory within a system management mode (“SMM”). According to the method, a memory management program is executed within the SMM. The memory management program is operative to maintain a singly linked list having one or more descriptors for identifying allocated regions of system management random access memory (“SMRAM”). In particular, each descriptor identifies a region of SMRAM that has been allocated by the memory management program by storing an indication of the base memory address of the allocated region, an indication of the ending memory address for the allocated region, and a pointer to the next descriptor.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: November 23, 2010
    Assignee: American Megatrends, Inc.
    Inventor: Mark Eric Wilson
  • Patent number: 7836247
    Abstract: A method, apparatus, and computer program product are disclosed for permitting access to a data storage device while the device is being formatted. A format command is received within the device from the host. A command complete response is then transmitted to the host before the device has completed being formatted. The host waits for the command complete response before the host transmits any read or write command to the device. Read and write commands that are transmitted to the device from the host are executed while the device is still being formatted.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: November 16, 2010
    Assignee: International Business Machines Corporation
    Inventors: Thomas R. Forrer, Jr., Jason Eric Moore, Abel Enrique Zuzuarregui
  • Patent number: 7836275
    Abstract: In one embodiment, a method includes receiving control transitioned from a virtual machine (VM) due to a privileged event pertaining to a translation-lookaside buffer (TLB), and determining which entries in a guest translation data structure were modified by the VM. The determination is made based on metadata extracted from a shadow translation data structure maintained by a virtual machine monitor (VMM) and attributes associated with entries in the shadow translation data structure. The method further includes synchronizing entries in the shadow translation data structure that correspond to the modified entries in the guest translation data structure with the modified entries in the guest translation data structure.
    Type: Grant
    Filed: May 22, 2008
    Date of Patent: November 16, 2010
    Assignee: Intel Corporation
    Inventors: Andrew V. Anderson, Alain Kägi
  • Patent number: 7836242
    Abstract: A method for page random write and read in blocks of flash memory is disclosed. The data could be random written in the pages of block. The pages would be arranged when the block was filled with data, so as to prevent from data copied and erased repeatedly. Present invention would reduce the data read/write time and increase the life-span of flash memory.
    Type: Grant
    Filed: August 25, 2006
    Date of Patent: November 16, 2010
    Assignee: Nuvoton Technology Corporation
    Inventors: Bar-Chung Hwang, Chien-Yin Liu
  • Patent number: 7836251
    Abstract: The present invention controls supply of power to a storage device on the basis of an access status, moves a logical storage device between physical storage devices having different power supply modes, reduces energization time, and improves the reliability. A relocation plan creation portion creates a relocation plan by disposing a logical volume with high access frequency in a RAID group which is in a long-time energization mode, disposing a logical volume with moderate access frequency in a RAID group which is in a first short-time energization mode, and disposing a logical volume with low access frequency in a RAID group which is in a second short-time energization mode. An execution time determination portion determines an execution time for executing the relocation plan, on the basis of the access frequency to the RAID groups.
    Type: Grant
    Filed: November 19, 2008
    Date of Patent: November 16, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Yasuo Watanabe, Yoshiaki Eguchi
  • Patent number: 7831769
    Abstract: Various embodiments of systems and methods are disclosed for performing online backup and restore of volume configuration information. In some embodiments, a method involves receiving a request to restore a volume configuration and, in response to the request, writing volume configuration information to a storage device. The volume configuration information includes a first disk signature, which identifies the storage device.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: November 9, 2010
    Assignee: Symantec Operating Corporation
    Inventors: Tianyu Wen, Chris C. Lin, Ronald S. Karr
  • Patent number: 7831765
    Abstract: A distributed, hierarchically-structured, programmable priority encoder for a content addressable memory (CAM) device including at least one section, the section further including a section level priority encoder, and a plurality of blocks, each block further including a block level priority encoder, and a plurality of slices. The distributed, hierarchically-structured, programmable priority encoder, wherein each slice further including a CAM slice, a maskable comparand register coupled to the CAM slice and a programmable priority encoder coupled to said CAM slice and further coupled to said block level priority encoder.
    Type: Grant
    Filed: July 12, 2006
    Date of Patent: November 9, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Alon Regev, Zvi Regev
  • Patent number: 7831762
    Abstract: In bit alterable memories, a particular header of a particular block may be programmed to a particular code to indicate that the block is to be considered empty. This saves the time of resetting all the bits in both the header and the data section of the block.
    Type: Grant
    Filed: November 29, 2006
    Date of Patent: November 9, 2010
    Assignee: Intel Corporation
    Inventor: Cheng Zheng
  • Patent number: 7827365
    Abstract: A system to locate a storage device. The system receives a request for a data item stored on a first and second storage device. The request includes a data identifier for the data item. Next, the system generates a start value and a step value based on the data identifier. Next, the system locates the first storage device utilizing the start value and identifies the first storage device is unavailable. Next, the system locates a second storage device utilizing a backup value that is generated based on the step value and the start value.
    Type: Grant
    Filed: December 27, 2007
    Date of Patent: November 2, 2010
    Assignee: eBay Inc.
    Inventors: Jean-Michel Leon, Louis Marcel Gino Monier
  • Patent number: 7827458
    Abstract: A method, apparatus, system, and signal-bearing medium that in an embodiment detect that a first packet is not received, add a place holder for the first packet in a buffer, request retransmission of the first packet, and create an estimated packet based on a combination of a second packet previous to the first packet, a third packet following the first packet, and a fourth packet from a previous frame that is spatially corresponding to the first packet. In another embodiment, a method, apparatus, system, and signal-bearing medium are provided that send a encoded packet to a receiver, save the encoded packet in a bitstream, determine whether the encoded packet is lost, and when the encoded packet is lost, decode the bitstream with the lost packet omitted and insert a reconstructed frame associated with the lost packet into a reference frame storage. In another embodiment, when the encoded packet is lost, a decoder is run on a reference frame chosen as the last uncorrupted frame.
    Type: Grant
    Filed: March 3, 2003
    Date of Patent: November 2, 2010
    Assignee: Apple Inc.
    Inventors: Ryan R. Salsbury, James Oliver Normile, Hyeonkuk Jeong, Joe S. Abuan, Barin G. Haskell
  • Patent number: 7823033
    Abstract: A data processing system includes functional circuitry which performs at least one data processing function, a register file coupled to the functional circuitry and having a plurality of general purpose registers (GPRs) which are included as part of a user's programming model for the data processing system, where a portion of the plurality of GPRs are reconfigurable as test registers during a test mode, and control circuitry which provides a test enable indicator to the register file. The portion of the plurality of GPRs, in response to the test enable indicator indicating the test mode is enabled, operates to accumulate test data from predetermined circuit nodes within the functional circuitry. In one aspect, the portion of the plurality of GPRs are reconfigured as multiple input shift registers (MISRs) during the test mode and generate signatures based on the test data.
    Type: Grant
    Filed: July 26, 2006
    Date of Patent: October 26, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: William C. Moyer, Jimmy Gumulja
  • Patent number: 7822933
    Abstract: Enabling an off-host computer to migrate data of a data volume. In one embodiment, the off-host computer copies data contents of n data blocks of a first data volume to n data blocks, respectively, of a second data volume. A host computer is capable of modifying data contents of a first plurality of data blocks of the n data blocks of the first data volume after the off-host computer begins copying data contents of the n data blocks of the first data volume to the n data blocks, respectively, of the second data volume.
    Type: Grant
    Filed: January 4, 2007
    Date of Patent: October 26, 2010
    Assignee: Symantec Operating Corporation
    Inventors: Nikhil Keshav Sontakke, Rahul M. Fiske, Anuj Garg, Niranjan S. Pendharkar
  • Patent number: 7818491
    Abstract: A nonvolatile memory may include a count data region provided in a memory region which is counted up according to an updating data and a fiat number of times managing region provided in a memory region which manages the full-counted number of times of the count data region. The nonvolatile memory may include a second number of times managing region which manages the full-counted number of times of the first number of times managing region. The nonvolatile memory is preferably utilized in an electronic device such as a card reader to detect the expiration of service lifetimes of the structural components of the electronic device.
    Type: Grant
    Filed: June 20, 2006
    Date of Patent: October 19, 2010
    Assignee: Nidec Sankyo Corporation
    Inventor: Tsutomu Baba