Abstract: A Junction Field Effect Transistor (JFET) has a source and a drain disposed on a substrate. The source and drain have an S/D doping with an S/D doping type. Two or more channels are electrically connected in parallel between the source and drain and can carry a current between the source and drain. Each of the channels has two or more channel surfaces. The channel has the same channel doping type as the S/D doping type. A first gate is in direct contact with one of the channel surfaces. One or more second gates is in direct contact with a respective second channel surface. The gates are doped with a gate doping that has a gate doping type opposite of the channel doping type. A p-n junction (junction gate) is formed where the gates and channel surfaces are in direct contact. The first and second gates are electrically connected so a voltage applied to the first and second gates creates at least two depletion regions in each of the channels.

Abstract: In some embodiments, the present disclosure relates to an integrated circuit (IC), including a first insulating layer which includes a first metal interconnect structure stacked above a bottom die. Including a substrate disposed above the first insulating layer, a second metal interconnect structure disposed above the substrate, a through-substrate via (TSV) directly connecting the first metal interconnect structure to the second metal interconnect structure, and a stacked deep trench capacitor (DTC) structure disposed in the substrate. The DTC structure includes a first plurality of trenches extending from a first side of the substrate and a second plurality of trenches extending from a second side of the substrate.

Abstract: In a computer-implemented method of assessing driving performance using route scoring, driving data indicative of operation of a vehicle while the vehicle was driven on a driving route may be received. Road infrastructure data indicative of one or more features of the driving route may also be received. A route score for the driving route may be calculated using the road infrastructure data, and a driving performance score for a driver of the vehicle may be calculated using the driving data and the route score for the driving route. Data may be sent to a client device via a network to cause the client device to display the driving performance score and/or a ranking based on the driving performance score, and/or the driving performance score may be used to determine a risk rating for the driver of the vehicle.

Abstract: A light-emitting diode includes an N-type cladding layer, and a superlattice structure, an active layer, a P-type electron-blocking layer, and a P-type cladding layer disposed on the N-type cladding layer in such order. The superlattice structure includes at least one first layered element which has a sub-layer made of a nitride-based semiconductor material including Al, and having an energy band gap greater than that of said electron-blocking layer. The P-type electron-blocking layer is made of a nitride-based semiconductor material including Al, and has an energy band gap greater than that of the P-type cladding layer.

Abstract: A display panel and a method of manufacturing the display panel are provided. Wherein, a display region of the display panel includes a plurality of gate lines extending laterally and a gate repair line, a plurality of gate connection lines extending longitudinally to a non-display region, and a first connection repair line extending longitudinally. The gate repair line is connected to the first connection repair line in a one-to-one correspondence, each of the gate repair line is provided with a plurality of first connection repair points, and each of the first connection repair lines is provided with a plurality of second connection repair points.

Abstract: A method includes forming source/drain regions in a semiconductor substrate; depositing a zirconium-containing oxide layer over a channel region in the semiconductor substrate and between the source/drain region; forming a titanium oxide layer in contact with the zirconium-containing oxide layer; forming a top electrode over the zirconium-containing oxide layer, wherein no annealing is performed after depositing the zirconium-containing oxide layer and prior to forming the top electrode.

Abstract: A method of manufacturing a semiconductor structure includes following operations. A first die is provided. A first molding is formed to encapsulate the first die. A second die is disposed over the first molding. A mold chase is disposed over the second die and the first molding. The mold chase includes a protrusion protruded from the mold chase towards the first molding. A molding material is disposed between the mold chase and the first molding. A second molding is formed to surround the second die. The second die is at least partially covered by the second molding. The disposing of the mold chase includes surrounding the protrusion of the mold chase by the molding material.

Abstract: A method for fabricating a semiconductor device is provided. The method includes forming an alignment mark in a material layer, wherein the alignment mark has a step sidewall in the material layer, and the step sidewall of the alignment mark has a floor surface portion; forming a feature material over the material layer; and performing a planarization process at least on the feature material, wherein the planarization process stops at a level higher than the floor surface portion of the step sidewall of the alignment mark.

Abstract: A semiconductor device that includes a semiconductor substrate, a dielectric layer over the semiconductor substrate, a conductive feature over the semiconductor substrate and buried in the dielectric layer, and a metal plug over the conductive feature and buried in the dielectric layer, where the dielectric layer has a hydrophobic sidewall facing the metal plug.

Abstract: Implementations of methods of forming a plurality of semiconductor die may include forming a damage layer beneath a surface of a die street in a semiconductor substrate, singulating the semiconductor substrate along the die street into a plurality of semiconductor die, and removing one or more particulates in the die street after singulating through applying sonic energy to the plurality of semiconductor die.

Abstract: Provided are a method of manufacturing a display apparatus and the display apparatus. The method includes forming an emissive layer and a driving layer on a first area of a substrate, forming an exposure line electrically connected to the driving layer, on a second area of the substrate, and forming a color conversion layer on the driving layer by emitting light from the emissive layer using the exposure line.

Abstract: Semiconductor devices including structures of active region are disclosed. An example semiconductor device according to the disclosure includes a substrate, a layer on the substrate and a dielectric layer on the layer. The layer includes an interface in contact with the dielectric layer. The interface includes a first portion on a surface of the layer and a second portion perpendicular to the first portion.

Abstract: A semiconductor device includes a contact metallization layer that includes aluminum and is arranged on a semiconductor substrate, an inorganic passivation structure arranged on the semiconductor substrate, an organic passivation layer comprising a first part that is arranged on the contact metallization layer, and a second part that is arranged on the inorganic passivation structure, a first layer structure including a first part that is in contact with the contact metallization layer, a second part that is contact with the inorganic passivation structure, and a third part that is disposed on the semiconductor substrate laterally between the inorganic passivation structure and the organic passivation layer.

Abstract: According to one embodiment, an imprint apparatus includes a first light source positioned to irradiate a substrate with light, a second light source positioned to irradiate the substrate with light, an illuminance changing portion selectively configured to change the illuminance distribution of light from the first light source on an irradiation surface on the substrate, and a controller configured to control the first light source, the second light source and the illuminance changing portion to irradiate the substrate with light from the first light source, and to subsequently irradiate the substrate with light from the second light source directly through the template.

Abstract: The capacity of a MOS capacitor is increased. A semiconductor element includes a first semiconductor region, an insulation film, a gate electrode, and a second semiconductor region. The first semiconductor region is arranged on a semiconductor substrate and has a recess on the surface. The insulation film is arranged adjacent to the surface of the first semiconductor region. The gate electrode is arranged adjacent to the insulation film and constitutes a MOS capacitor with the first semiconductor region. The second semiconductor region is arranged adjacent to the first semiconductor region on the semiconductor substrate, formed in the same conductive type as the first semiconductor region, and supplies a carrier to the first semiconductor region when the MOS capacitor is charged and discharged.

Abstract: A display device includes a display substrate including a plurality of first pads arranged in a first pad area and a plurality of second pads arranged in a second pad area, wherein the first pads and the second pads are arranged in different rows from each other, a circuit board including first circuit pads facing the first pads, respectively, and second circuit pads facing the second pads, respectively, and an adhesive member disposed between the display substrate and the circuit board and including an adhesive layer and a plurality of conductive balls distributed in the adhesive layer. Here, a first density of first conductive balls overlapping the first pad area among the conductive balls is greater that a second density of second conductive balls overlapping the second pad area among the conductive balls.

Abstract: Disclosed is a semiconductor device, including: a substrate of a first conductivity type that is a base for the semiconductor device; a high voltage junction field effect transistor, JFET, over the substrate, wherein the JFET including a plurality of parallel conductive layers; and a first conductive layer of the second conductivity type of the parallel conductive layers stretching over the substrate. On top of the first conductive layer of the second conductivity type is arranged a plurality of layers forming the parallel conductive layers with channels formed by a plurality of doped epitaxial layers of the second conductivity type with a plurality of gate layers of the first conductivity type on both sides thereof; wherein a lowermost layer of the first conductivity type is arranged in the form of consecutive dots with different lengths and distances between them.

Abstract: Implementations of a method of forming a plurality of semiconductor devices on a semiconductor substrate may include: providing a semiconductor substrate having a first surface, a second surface, a size, and a thickness where the second surface opposes the first surface and the thickness is between the first surface and the second surface. The method may include processing the semiconductor substrate through a plurality of semiconductor device fabrication processes to form a plurality of semiconductor devices on the first surface. The thickness may be between 100 microns and 575 microns and the size may be 150 mm. The semiconductor substrate may not be coupled with a carrier or support.

Abstract: A semiconductor device includes a semiconductor layer having a first surface in which a plurality of trenches each extending along a first direction are arranged along a second direction perpendicular to the first direction, a first electrode on a second surface of the semiconductor layer, a second electrode on the first surface of the semiconductor layer, and a control electrode inside at least one of the trenches. The plurality of trenches includes first, second, and third trenches. The first and second trenches are connected to each other via a first connector at an end in the first direction of each of the first and second trenches. The third trench extends beyond the end of each of the first and second trenches along the first direction.

Abstract: A display substrate and a manufacturing method thereof, and a display panel are provided. The display substrate includes a base substrate, a first electrode, a light-emitting functional layer, and a second electrode. The light-emitting functional layer includes a first functional layer and a second functional layer, an orthographic projection of an edge of the second functional layer on the base substrate is within an orthographic projection of an edge of the first functional layer on the base substrate, and an area of an orthographic projection of the second functional layer on the base substrate is smaller than an area of an orthographic projection of the first functional layer on the base substrate; and the second electrode covers and is in contact with at least one side surface of the light-emitting functional layer and a portion of a surface of the light-emitting functional layer away from the base substrate.