Abstract: A silicon carbide semiconductor device includes a first load electrode disposed on a first surface of a silicon carbide semiconductor body, a first doped region disposed in the silicon carbide semiconductor body and electrically connected to the first load electrode, and an insulated gate field effect transistor electrically connected in series with the first doped region, the insulated gate field effect transistor including a source region and a body region, the body region being electrically connected to the first load electrode, wherein a geometry and dopant concentration of the first doped region is such that a resistance of the first doped region increases by at least a factor of two as load current in the insulated gate field effect transistor rises.

Abstract: A two-wire load control device may be configured to compute an accurate estimate of real-time power consumption by a load that is electrically connected to, and controlled by, the two-wire load control device. The load control device may be adapted to measure a voltage drop across the device during a first portion of a half-cycle of an AC waveform provided to the device. The device may be further configured to estimate a voltage drop across the load during the second portion of the half-cycle. The estimated voltage drop may be based on the measured voltage drop. The device may be further configured to measure a current supplied to the load during a second portion of the half-cycle. The device may be configured to estimate power consumed by the load based on the measured current and the estimated voltage drop.

Abstract: A structure, comprising an island comprising a III-N material. The island extends over a substrate and has a sloped sidewall. A cap comprising a III-N material extends laterally from a top surface and overhangs the sidewall of the island. A device, such as a transistor, light emitting diode, or resonator, may be formed within, or over, the cap.

Abstract: A light-emitting device includes: a substrate; and a laminated structure provided at the substrate and having a plurality of columnar parts. The columnar part has: an n-type first semiconductor layer; a p-type second semiconductor layer; a light-emitting layer provided between the first semiconductor layer and the second semiconductor layer; and an electrode provided on a side opposite to a side of the substrate, of the laminated structure. The first semiconductor layer is provided between the light-emitting layer and the substrate. An end part on a side opposite to a side of the substrate, of the light-emitting layer, has a first facet surface. An end part on a side opposite to a side of the substrate, of the second semiconductor layer, has a second facet surface. A relation of ?2??1 is satisfied, where ?1 is a taper angle of the first facet surface, and ?2 is a taper angle of the second facet surface. ?1 is 70° or smaller, and ?2 is 30° or greater.

Abstract: The present disclosure relates to an imaging device, a method for manufacturing an imaging device, and an electronic device capable of reducing light entering an electric-charge holding unit in a back-illuminated imaging device. An imaging device includes: a photoelectric conversion unit; an electric-charge holding unit; a semiconductor substrate; a wiring layer; an insulation film layer; a first light-shielding film; and a second light-shielding film. The insulation film layer, the first light-shielding film, and the wiring layer are stacked on a second surface of the semiconductor substrate. The second light-shielding film includes: a first light-shielding portion extending from the first surface of the semiconductor substrate to a middle of the semiconductor substrate; a second light-shielding portion penetrating the semiconductor substrate; and a third light-shielding portion covering a part of the first surface of the semiconductor substrate.

Abstract: Some embodiments include a NAND memory array having a vertical stack of alternating insulative levels and conductive levels. The conductive levels include terminal regions, and include nonterminal regions proximate the terminal regions. The terminal regions are vertically thicker than the nonterminal regions, and are configured as segments which are vertically stacked one atop another and which are vertically spaced from one another. Blocks are adjacent to the segments and have approximately a same vertical thickness as the segments. The blocks include high-k dielectric material, charge-blocking material and charge-storage material. Channel material extends vertically along the stack and is adjacent to the blocks. Some embodiments include integrated assemblies. Some embodiments include methods of forming integrated assemblies.

Abstract: Some embodiments of the present disclosure provide a back side illuminated (BSI) image sensor. The back side illuminated (BSI) image sensor includes a semiconductive substrate and an interlayer dielectric (ILD) layer at a front side of the semiconductive substrate. The ILD layer includes a dielectric layer over the semiconductive substrate and a contact partially buried inside the semiconductive substrate. The contact includes a silicide layer including a predetermined thickness proximately in a range from about 600 angstroms to about 1200 angstroms.

Abstract: A display structure is provided. The display structure includes: an array layer; a transparent anode layer disposed on the array layer; a light-emitting element layer disposed on the transparent anode layer; a light reflective layer disposed on the light-emitting element layer and sequentially including a reflective cathode layer, a cathode protection layer, and a reflective metal layer; and an encapsulation layer disposed on the light reflective layer. A reflective metal layer is added between the encapsulation layer and the reflective cathode layer, thereby increasing a light-emitting efficiency of a bottom-emission type organic light-emitting diode, further enhancing the moisture and oxygen block capability of the OLED device, and effectively improving the optical properties and the moisture and oxygen resistance of OLED display panels.

Abstract: A highly reliable light-emitting device is provided. A yield in a manufacturing process of a light-emitting device is increased. A light-emitting device is provided in which a non-light-emitting portion having a frame-like shape outside a light-emitting portion includes a portion thinner than the light-emitting portion. A light-emitting element and a bonding layer are formed over a substrate. The light-emitting element is sealed by overlapping a pair of substrates and curing the bonding layer. Then, while the cured bonding layer is heated, pressure is applied to at least a portion of the non-light-emitting portion with a member having a projection.

Abstract: The present invention relates to a dicing die-bonding film including: a substrate; an antistatic layer formed on the substrate and including an aliphatic or alicyclic polyurethane resin and a conductive filler; a cohesive layer formed on the antistatic layer; and an adhesive layer formed on the cohesive layer, and a dicing method of a semiconductor wafer using the dicing die-bonding film.

Abstract: An integrated circuit structure includes a dielectric layer and an etch stop layer. The etch stop layer includes a first sub layer including a metal nitride over the first dielectric layer, and a second sub layer overlying or underlying the first sub layer. The second sub layer includes a metal compound comprising an element selected from carbon and oxygen, and is in contact with the first sub layer.

Abstract: A Complementary Metal Oxide Semiconductor, CMOS, device for radiation detection. The CMOS device includes a semiconductor diffusion layer having a photodetector region for receiving incident light, and a polysilicon layer having a patterned structure in a region at least partially overlapping the photodetector region. The structure includes a plurality of features being perforations extending through the polysilicon layer or columns of polysilicon, wherein the perforations are filled with, or the columns are surrounded by, a dielectric material.

Abstract: A middle layer removal method is provided. The method includes providing a substrate having a structure formed on the substrate, and forming a spacer layer on the structure. The method includes forming a mask layer over the spacer layer, the mask layer including a first layer, a second layer over the first layer, and a third layer over the second layer. The method also includes patterning the third layer of the mask layer, and etching the first layer and the second layer of the mask layer to form an opening to expose a bottom surface of the second layer. The method further includes removing the second layer using a wet etchant.

Abstract: An organic light-emitting display apparatus includes: a first substrate; an insulating layer on the first substrate; a signal wiring on the insulating layer; an organic light-emitting device on the first substrate, the organic light-emitting device defining an active area and including a first electrode, a second electrode, and an intermediate layer between the first and second electrodes; a passivation layer on the insulating layer; and a metal layer on the passivation layer at an outer region adjacent to the active area, separated from the first electrode, and contacting the second electrode and the signal wiring, wherein a first opening is in the passivation layer at the outer region, and the metal layer contacts the insulating layer at the first opening.

Abstract: A flexible display panel and a display device are provided. The display panel includes: a first display zone; a second display zone; and a non-display zone located between the first display zone and the second display zone. After the flexible display panel is bent along a folding axis extending along a first direction defined in the non-display zone, a light-emitting surface of the first display zone and a light-emitting surface of the second display zone face away from each other. The first display zone has a first hollow zone close to the non-display zone. The second display zone has a second hollow zone close to the non-display zone. By providing two mutually independent display zones on the same flexible substrate and providing a hollow portion on each display zone, a screen occupancy ratio of the two display zones will be high, and a “full screen” is realized.

Abstract: A semiconductor device includes a substrate, a first semiconductor stack including elongated semiconductor features isolated from each other and overlaid in a direction perpendicular to a top surface of the substrate, and a second semiconductor stack including elongated semiconductor features isolated from each other and overlaid in the direction perpendicular to the top surface of the substrate. The second semiconductor stack has different geometric characteristics than the first semiconductor stack. A top surface of the first semiconductor stack is coplanar with a top surface of the second semiconductor stack.

Abstract: A semiconductor package includes a semiconductor chip, and including a passivation film disposed on an active surface and having a first opening exposing at least a portion of a connection pad of the semiconductor chip and a protective film disposed on the passivation film, filling at least a portion in the first opening, and having a second opening exposing at least a portion of the connection pad in the first opening, an encapsulant covering at least a portion of the semiconductor chip, and a connection structure disposed on the active surface of the semiconductor chip, and including a connection via connected to the connection pad in the first opening and the second opening and a redistribution layer electrically connected to the connection pad through the connection via. The second opening has a width narrower than a width of the first opening.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to tight pitch wirings and capacitors and methods of manufacture. The structure includes: a capacitor including: a bottom plate of a first conductive material; an insulator material on the bottom plate; and a top plate of a second conductive material on the insulator material; and a plurality of wirings on a same level as the bottom plate and composed of the second conductive material.

Abstract: A method and computer program product for monitoring one or more processes occurring during a first portion of a multi-portion recipe being executed on a processing device to obtain data concerning at least of portion of the one or more processes. At least a portion of the data is stored. The availability of the at least a portion of the data is enabled to one or more processes occurring during a second portion of the multi-portion recipe.

Abstract: A silicon carbide diode having a high surge current capability, and including a semiconductor base plate. The semiconductor base plate includes an N-type silicon carbide substrate and an N-type silicon carbide epitaxial layer located on the N-type silicon carbide substrate. The upper portion of the N-type silicon carbide epitaxial layer is provided with a plurality of P-type well regions. The N-type high resistance region is provided under the P-type well region or on the lower surface of the P-type well region. The resistivity of the N-type high resistance region is greater than the resistivity of the N-type silicon carbide epitaxial layer. The N-type high resistance region is provided under the P-type well region, and a plurality of grooves are provided in the P-type well region or a plurality of block-shaped P-type regions uniformly arranged at intervals are provided in the N-type high resistance region.