Abstract: This application discloses a computing system implementing tools and mechanisms to generate a framework for a system-level design of an electronic system, wherein the system-level design includes multiple electronic designs from different electronic design automation tools. The tools and mechanisms can correlate design components in the electronic designs to different portions of the framework for the system-level design, and determine whether the electronic designs are congruent with the system-level design based, at least in part, on the correlation of the electronic designs to the different portions of the framework for the system-level design.

Abstract: The present invention discloses a method for fixing hold time violations in circuits. The method comprises: creating a topology diagram of the circuit with a branch indicating a signal path where the hold time violation occurs in the circuit, and a node on the branch indicating a port of an element where the hold time violation occurs; dividing the circuit into a plurality of regions; and placing a hold time correction element selectively in a region corresponding to the node in the topology diagram to fix the hold time violation thereof, according to a circuit element density of the region corresponding to the node in the topology diagram. With this method there will be no new element in a region whose circuit element density is excessively large, and it is unnecessary to move an element which has been placed in the circuit and an input/output pin thereof.

Abstract: The present invention provides a graphical view of this connected network that allows the user to navigate throughout a network. The graph view consists of a series of nodes that correspond to a set of test, testbench, design or coverage items in the simulation. Various nodes in the network are colored or shaped differently to represent either test, class, stimulus, testbench, design or coverage points. The graph may be drawn so that all items that occur at the same time are lined up in the same horizontal or vertical region, to give the user an intuitive view of time going left to right or top to bottom.

Abstract: The invention relates to a method for reducing the number of flip-flops in a VLSI design that require data retention, thereby eliminating the respective backup cells for those flip flops, the method comprises the steps of: (a) defining one or more criteria for non-essentiality of backup cells! (b) during the physical design stage, analyzing the VLSI design based on said one or more criteria for non-essentiality, and finding those flip-flops that meet these criteria, wherein said analysis is performed at the gate level, independent from any higher level representation of the design; and (c) eliminating from the VLSI design those backup cells for all non-essential flip-flops that meet one or more of said criteria for non-essentiality, thereby leaving in the design only those backup cells for those flip-flops that do not meet any of said criteria.

Abstract: In a method, a layout of a device having a pattern of features is provided. The method continues to include identifying a first portion of at least one feature of the plurality of features. An image criteria for the first portion may be assigned. A lithography optimization parameter is determined based on the assigned image criteria for the first portion. Finally, the first portion of the at least one feature is imaged onto a semiconductor substrate using the determined lithography optimization parameter.

Abstract: A method, executed by a computer, for routing a circuit includes receiving a logic structure for a circuit, retrieving a logic template, determining whether the logic structure for the circuit matches the logic template, and routing the circuit using a routing recipe corresponding to the logic template in response to determining that the logic structure matches the logic template. A corresponding computer program product and computer system are also disclosed herein.

Abstract: Method for monitoring an electrochemical cell or a battery (1), in particular method for monitoring the first charging of an electrochemical cell or of a battery (1) of Li-ion type, comprising a step of acquiring data relating to acoustic emissions produced in the electrochemical cell or in the battery and, by using the data acquired, a step of detecting: the formation of a passivation film on an electrode of the electrochemical cell or of the battery; and/or the first storage of lithium in an electrode of the electrochemical cell or of the battery.

Abstract: A method, executed by a computer, for routing a circuit includes receiving a logic structure for a circuit, retrieving a logic template, determining whether the logic structure for the circuit matches the logic template, and routing the circuit using a routing recipe corresponding to the logic template in response to determining that the logic structure matches the logic template. A corresponding computer program product and computer system are also disclosed herein.

Abstract: Disclosed are techniques for implementing parallel fills for bottom-up electronic design implementation flow and track pattern definition for multiple-patterning lithographic processing. These techniques identify a canvas in a layout and design rules for track patterns and multiple-patterning, where the canvas is not yet associated with any base track patterns. A first shape having the first width is inserted along a first track in the canvas based on the design rules. A custom, legal track pattern is generated by arranging multiple tracks in an order and further by associating the first width with the first track in the custom, legal track pattern. The layout may then be further modified by guiding the insertion of one or more additional shapes with the custom, legal track pattern.

Abstract: Electric and plug-in hybrid electric vehicles include a rechargeable traction battery. An automated vehicle charging system is configured to charge the traction battery with minimal operator intervention. The vehicle charging system includes a carousel, including a plurality of transmit coils, configured to move in a longitudinal direction and rotate about an axis. The vehicle charging system further includes at least one controller programmed to move the carousel in the longitudinal direction and rotate the carousel about the axis to align a selected transmit coil from the plurality of transmit coils with a vehicle receive coil. The vehicle charging system may receive positioning data from a vehicle and may move and rotate the carousel according to the positioning data to align the selected transmit coil with the vehicle receive coil.

Abstract: A layout design method may include receiving predetermined values related to first to third normal fin designs extending in a first direction and arranged in parallel in a second direction perpendicular to the first direction, generating dummy fin designs based on the predetermined values, generating mandrel candidate designs based on the first to third normal fin designs and the dummy fin designs, decomposing the mandrel candidate designs to first and second mandrel mask designs, and generating a final mandrel mask design using one of the first and second mandrel mask designs that satisfies a predetermined condition. A first interval distance in the second direction between the first normal fin design and the second normal fin design may be different from a second interval distance in the second direction between the second normal fin design and the third normal fin design.

Abstract: A method is disclosed for defining a multiple patterned cell layout for use in an integrated circuit design. A layout is defined for a level of a cell in accordance with a dynamic array architecture so as to include a number of layout features. The number of layout features are linear-shaped and commonly oriented. The layout is split into a number of sub-layouts for the level of the cell. Each of the number of layout features in the layout is allocated to any one of the number of sub-layouts. Also, the layout is split such that each sub-layout is independently fabricatable. The sub-layouts for the level of the cell are stored on a computer readable medium.

Abstract: A system and method of analyzing signal performance of a hardware system includes dividing a simulation of the hardware system into a chain of blocks, identifying resonant loops between pairs of blocks in the chain of blocks, determining a loop response for each of the identified resonant loops, and determining an impact of each loop response on a performance of the system.

Abstract: Electrochemical cells that include resistor switch assemblies that can operate according to temperature and batteries and power systems including such cells are disclosed.

Abstract: A method of designing an acoustic microwave filter comprises generating a proposed filter circuit design having an acoustic resonant element with a defined admittance value, introducing a lumped capacitive element in parallel and a lumped inductive element in series with the resonant element, selecting a first capacitance value for the capacitive element and a first inductance value for the inductive element, thereby creating a first temperature modeled filter circuit design, simulating the first temperature modeled filter circuit design at a first operating temperature, thereby generating a first frequency response, selecting a second capacitance value for the capacitive element and a second inductance value for the inductive element, thereby creating a second temperature modeled filter circuit design, simulating the second temperature modeled filter circuit design at a second operating temperature, thereby generating a second frequency response, and comparing the first and second frequency responses to the

Abstract: Various example implementations are directed to methods and systems for simulating circuit designs having configuration parameters. According to one example implementation, code blocks of a circuit design for which execution of operations described by the code blocks is conditioned on a value of one or more of a set of configuration parameters, are identified. For each identified code block, a respective expression is determined that indicates whether or not the code block will be executed for different sets of values of the set of configuration parameters. The circuit design is simulated for a first set of values for the configuration parameters. The simulation is performed using a model that omits code blocks that describe sets of operations that will not be executed. The determined expressions are evaluated to determine whether or not each identified code block was realized in the simulation model.

Abstract: A system for inductive power transmission includes at least one interface surface and a plurality of triangular coil elements positioned underneath the interface surface such that at least one edge of the respective triangular coil element is adjacent to an edge of at least one other of the triangular coil elements. Each of the triangular coil elements may be operable to inductively transmit power to at least one coil of at least one electronic device and/or inductively receive power from the coil of the electronic device. Each triangular coil element may be operable to detect the proximity of one or more inductive coils of one or more electronic devices and inductively transmit power upon such detection at different frequencies, power levels, and/or other inductive power transmission characteristics.

Abstract: Various embodiments scalable statistical library characterization for electronic designs by identifying an electronic design, performing circuit simulations on strongly connected components on a component-by-component basis, performing the logic cone analysis on the entire electronic design, and performing combinations of influences on the electronic design caused by variations of parameters. Some embodiments perform simulations on one or more stronger parameters or the strongest parameter of a circuit component and use the simulation results to calibrate the predicted behaviors of one or more remaining circuit components of the electronic design. Various statistical or mathematical techniques may be used for performing the combinations of influences on the electronic design caused by variations of parameters. The techniques described are scalable with the increase in complexities and sizes of electronic designs while reducing or minimizing the impact on sensitivity accuracy.

Abstract: The general field of this invention is electrical connectors and their actuating mechanism. More specifically, this invention teaches a novel connector and its actuating mechanism for establishing an electrical connection between two arbitrarily oriented objects such as an arbitrarily parked EV and infrastructure. In most of the prior art, a conductive connection requires precise and guided alignment of mating conductors. The prior art achieves this either by a sensor guided search or mechanical guides to being the two objects into desired alignment. In order to tolerate a wider misalignment between the two objects, the guides have to have a large footprint. In contrast, this invention breaks down the process of aligning the two halves of connector into a series of simple motions—when carried out in a particular order, would deliver the necessary alignment of the two sides of a connector.

Abstract: A method for simulating a circuit includes running a first prototype of the circuit a predetermined number of cycles behind a second prototype of the circuit, and running a hardware emulator of the circuit in accordance with an input trace received by the first prototype and the second prototype.