Abstract: The present disclosure provides a flexible display device and a manufacturing method thereof. The flexible display device includes a base substrate; a pixel defining layer disposed on the base substrate defining a plurality of light emitting regions; and a first electrode layer disposed on a side of the pixel defining layer away from the base substrate and in light-emitting regions. A thin film encapsulation layer covers the first electrode layer and has protrusions protruding toward the pixel defining layer at a plurality of positions.

Abstract: A semiconductor device package includes a first electronic component, a plurality of first conductive traces, a second electronic component, a plurality of second conductive traces and a plurality of first conductive structures. The first electronic component has a first active surface. The first conductive traces are disposed on and electrically connected to the first active surface. The second electronic component is stacked on the first electronic component. The second electronic component has an inactive surface facing the first active surface, a second active surface opposite the inactive surface, and at least one lateral surface connecting the second active surface and the inactive surface. The second conductive traces are electrically connected to the second active surface, and extending from the second active surface to the lateral surface. The first conductive structures are electrically connecting the second conductive traces to the first conductive traces, respectively.

Abstract: A semiconductor device having a substrate, a dielectric layer, a polycrystalline silicon (“poly”) resistor, a drain, and a source is disclosed. After implantation, the poly resistor may have a lateral doping profile with two peaks, one near each edge of the poly resistor, and a trough near the middle of the poly resistor. Such a doping profile can allow the poly resistor to have a resistance that is insensitive to small variations in critical dimension of the poly resistor. The resistance of the poly resistor may be determined by the doping dose of the tilted implant used to form the poly resistor. The tilted implant may be used to form the drain and the source of a transistor substantially simultaneously as forming the poly resistor.

Abstract: A display panel includes: a first substrate including an opening area, a display area, and a non-display area; a plurality of display elements arranged in the display area; a second substrate facing the first substrate with the plurality of display elements therebetween; a sealing member arranged between the first substrate and the second substrate; a first conductive line between the opening area and the display area, the first conductive line being located in the non-display area; a second conductive line located in the non-display area; and at least one insulating layer arranged between the first conductive line and the second conductive line.

Abstract: A display panel includes: a substrate including an opening area, a display area surrounding the opening area, and an intermediate area between the opening area and the display area; a plurality of display elements in the display area and electrically connected to a thin film transistor; a plurality of wirings arranged along an edge of the opening area in the intermediate area; and at least one metal pattern spaced apart from the plurality of wirings in the intermediate area, the at least one metal pattern surrounding the opening area and having a ring shape opened at one side.

Abstract: A method includes placing a package component over a carrier. The package component includes a device die. A core frame is placed over the carrier. The core frame forms a ring encircling the package component. The method further includes encapsulating the core frame and the package component in an encapsulant, forming redistribution lines over the core frame and the package component, and forming electrical connectors over and electrically coupling to the package component through the redistribution lines.

Abstract: A package structure includes a semiconductor device, a molding compound, a first dielectric layer, and a through-via. The molding compound is in contact with a sidewall of the semiconductor device. The first dielectric layer is over the molding compound and the semiconductor device. The through-via is in the molding compound and the first dielectric layer. The through-via is a continuous element and in contact with the first dielectric layer.

Abstract: A display device that includes a substrate having a display area configured for displaying an image and a peripheral area positioned outside of the display area. A first thin film transistor is disposed on the display area. A display element is electrically connected to the first thin film transistor. The display element includes a pixel electrode, an intermediate layer, and an opposite electrode. An embedded driving circuit portion is disposed on the peripheral area. The embedded driving circuit portion includes a second thin film transistor. A common voltage supply line is disposed on the peripheral area. The common voltage supply line is positioned closer to the display area than the embedded driving circuit portion. The common voltage supply line is electrically connected to the opposite electrode.

Abstract: Provided is a display device in which a defect by external light reflection is minimized in a non-display area. The display device includes a display panel and a touch unit arranged on the display panel. The display panel may include: a substrate including a display area and a non-display area arranged around the display area; an insulator including a valley portion, the valley portion being defined as an opening arranged along an outer side of the display area in the non-display area; and a display unit arranged in the display area and including a light-emitting element electrically connected to a thin film transistor. The touch unit may include a reflection prevention unit that overlaps the valley portion and is configured to reduce reflectivity of external light.

Abstract: The present application discloses an array substrate having a plurality of subpixel areas. The array substrate includes a base substrate; a plurality of first thin film transistors on the base substrate, each of which being in one of the plurality of subpixel areas; and a plurality of capacitor electrodes, each of which being in one of the plurality of subpixel areas. Each of the plurality of first thin film transistors includes a first active layer, a first gate electrode, a first source electrode, and a first drain electrode. The first active layer includes a first semi-conductive channel part, a first conductive part electrically connected to the first drain electrode, and a second conductive part electrically connected to the first source electrode. Each of the plurality of capacitor electrodes, the insulating layer, and the first conductive part constitute a first storage capacitor in one of the plurality of subpixel areas.

Abstract: A display substrate having a display area and a peripheral area. The display panel includes a base substrate; a first power pad on the base substrate, the first power pad including a first portion in the peripheral area and along a power line interface side of the display substrate; a planarization layer on a side of the first power pad away from the base substrate; a pixel definition layer on a side of the planarization layer away from the base substrate, defining a plurality of subpixel apertures; and an encapsulating layer on a side of the pixel definition layer away from the base substrate. The display substrate includes a first groove extending through one or a combination of the planarization layer and the pixel definition layer, exposing a surface of the first portion of the first power pad in the peripheral area.

Abstract: Disclosed a chip packaging structure and a manufacturing method thereof. The chip packaging structure comprises: a metal heat dissipation layer; a chip structure comprising a plurality of first electrical contacts on an upper surface of the chip structure; a pin layer comprising a plurality of second electrical contacts and a plurality of separate metal bumps; an encapsulant encapsulating at least one portion of the chip structure, the metal heat dissipation layer and the pin layer, wherein at least one portion of the pin layer is exposed to an upper surface of the encapsulant, and an lower surface of the metal heat dissipation layer is exposed outside the encapsulant. The metal heat dissipation layer includes a flange on the side surface for tightly combining the metal heat dissipation layer and the encapsulant.

Abstract: An integrated display panel and a preparation method thereof are provided. The integrated display panel includes a first base substrate and a second base substrate, the first base substrate and the second base substrate being disposed opposite to each other, the first base substrate being provided with a pixel unit thereon, the pixel unit including a plurality of sub-pixel units having different colors; the integrated display panel further includes an image acquisition module which includes a photo sensing unit disposed in each of the sub-pixel units, the photo sensing unit includes a photodiode disposed in a non-display region of the sub-pixel unit, the photodiode is configured to photoelectrically convert light from a target area to obtain an electric signal representing an image of the target area.

Abstract: Various embodiments of the present application are directed to a method for forming a semiconductor-on-insulator (SOI) substrate without bond interface voids and/or without delamination between layers. In some embodiments, a first high ? bonding structure is formed over a handle substrate. A device layer is formed over a sacrificial substrate. Outer most sidewalls of the device layer are between outer most sidewalls of the sacrificial substrate. A second high ? bonding structure is formed over the device layer. The first high ? bonding structure is bonded to the second high ? bonding structure, such that the device layer is between the sacrificial substrate and the handle substrate. A first removal process is performed to remove the sacrificial substrate. The first removal process comprises performing a first etch into the sacrificial substrate until the device layer is reached.

Abstract: Embodiments of mechanisms for forming a package are provided. The package includes a substrate and a contact pad formed on the substrate. The package also includes a conductive pillar bonded to the contact pad through solder formed between the conductive pillar and the contact pad. The solder is in direct contact with the conductive pillar.

Abstract: A display apparatus has an enlarged display area so that an image can be displayed in a sensor area. The display apparatus includes: a first base layer that includes a display area that includes a plurality of main pixels and a sensor area that includes a plurality of auxiliary pixels and a transmission portion; a conductive layer positioned on the first base layer and that corresponds to the plurality of auxiliary pixels; and a second base layer positioned on the first base layer with the conductive layer positioned between the second base layer and the first base layer. A resolution of an image displayed by the sensor area is lower than a resolution of an image displayed by the display area.

Abstract: A display unit includes: a drive wire; a planarization layer covering the drive wire and having a connection hole; a relay electrode provided on the planarization layer and configured to be electrically connected to the drive wire through the connection hole; a filling member made of an insulating material and provided in the connection hole; a first partition wall made of a same material as that of the filling member and covering an end of the relay electrode; a first electrode covering the filling member and configured to be electrically connected to the relay electrode; a second electrode facing the first electrode; and a functional layer located between the first electrode and the second electrode, the functional layer including a light-emitting layer.

Abstract: A display device includes: a substrate including a display area, a peripheral area, and a pad area, a plurality of pixels in the display area, and the peripheral area surrounding the display area; a plurality of fan-out lines extending from the pad area to the display area; a first metal layer covering at least a portion of the plurality of fan-out lines in the peripheral area; a second metal layer overlapping at least a portion of the first metal layer, the second metal layer being over the first metal layer; a third metal layer over the second metal layer in the peripheral area; a first insulating layer between the first metal layer and the second metal layer and including first contact holes; and a second insulating layer between the second metal layer and the third metal layer and including second contact holes.

Abstract: A semiconductor device includes a first device fin and a second device fin that are each located in a first region of the semiconductor device. The first region has a first pattern density. A first dummy fin is located in the first region. The first dummy fin is disposed between the first device fin and the second device fin. The first dummy fin has a first height. A third device fin and a fourth device fin are each located in a second region of the semiconductor device. The second region has a second pattern density that is greater the first pattern density. A second dummy fin is located in the second region. The second dummy fin is disposed between the third device fin and the fourth device fin. The second dummy fin has a second height that is greater than the first height.

Abstract: A display apparatus including a base layer including a display region and a non-display region; display elements on the display region and including a first electrode, a light emitting layer, and a second electrode on the light emitting layer; and an upper layer on the display elements, wherein the upper layer includes a first organic layer contacting the second electrode; a first inorganic layer contacting the first organic layer; a second organic layer contacting the first inorganic layer; and a second inorganic layer contacting the second organic layer, wherein the first inorganic layer includes a first and second area, the first area having a refractive index of about 1.60 to about 1.65 with respect to a wavelength of about 633 nm, wherein the first area has a uniform thickness, and wherein a thickness of the second area decreases as a distance from the display region increases.