Abstract: A display panel includes: a substrate comprising a first area, a second area, and a third area between the first area and the second area; a stack structure in the second area and comprising a pixel electrode, an opposite electrode, and an intermediate layer between the pixel electrode and the opposite electrode; a groove in the third area and separating at least one organic material layer included in the intermediate layer; and at least one metal layer in the third area and comprising a first opening overlapping the groove, wherein the groove is defined in a multi-layered film including an organic layer and an inorganic layer on the organic layer, and the at least one metal layer is between the substrate and the multi-layered film.

Abstract: An image sensor package includes a substrate, an image sensor mounted on the substrate, a bonding wire connecting the image sensor to the substrate, a reflector disposed on the image sensor, a sealing member sealing the bonding wire and a portion of the image sensor, and covering at least a portion of the reflector, the sealing member including a hole exposing an effective imaging plane of the image sensor, and a filter attached to the sealing member.

Abstract: Examples of an integrated circuit with FinFET devices and a method for forming the integrated circuit are provided herein. In some examples, an integrated circuit device includes a substrate, a fin extending from the substrate, a gate disposed on a first side of the fin, and a gate spacer disposed alongside the gate. The gate spacer has a first portion extending along the gate that has a first width and a second portion extending above the first gate that has a second width that is greater than the first width. In some such examples, the second portion of the gate spacer includes a gate spacer layer disposed on the gate.

Abstract: A radiation-emitting semiconductor chip includes a semiconductor body; a first contact layer having a first contact surface for external electrical contacting of the semiconductor chip and a first contact web structure connected to the first contact surface, wherein the first contact web structure is a region of the first contact layer that, compared to the first contact surface, has a comparatively small extent at least in a lateral direction; a second contact layer, wherein first and second contact web structures overlap in places in plan view of the semiconductor chip; a current distribution layer; and an insulation layer having a plurality of openings into which the current distribution layer extends.

Abstract: A method of making a magnetoresistive random access memory (MRAM) device includes forming a bottom conductive layer. The method includes forming an anti-ferromagnetic layer over the bottom conductive layer and forming a tunnel layer over the anti-ferromagnetic layer. The method includes forming a free magnetic layer, having a magnetic moment aligned in a direction that is adjustable by applying an electromagnetic field, over the tunnel layer, wherein the anti-ferromagnetic layer, the tunnel layer and the free magnetic layer are part of a magnetic tunnel junction (MTJ) unit. The method includes forming a top conductive layer over the free magnetic layer. The method includes performing at least one lithographic process to remove portions of the bottom conductive layer, the MTJ unit and the top conductive layer that is uncovered by a photoresist layer. The method includes removing a portion of a sidewall of the MTJ unit.

Abstract: Embodiments of the present disclosure provide a display module and display device. The display module comprises a display panel which is an organic electroluminescent display panel; a first phase retarder located on a side of an out-light surface of the display panel; a linear polarizer located on a side of first phase retarder facing away from the display panel; and a second phase retarder covering a side of the linear polarizer facing away from the display panel.

Abstract: The present application provides a display panel comprising a substrate and a plurality of film layers disposed on the substrate in sequence, and at least one of the film layers having a patterned structure, wherein the display panel has at least a first location and a second location different from the first location, and the film layers arranged in a thickness direction of the display panel at the first location are different from the film layers arranged in a thickness direction of the display panel at the second location, a first optical length L1 at the first location and a second optical length L2 at the second location meet the following conditions: L1=d1*n1+d2*n2+ . . . +di*ni, L2=D1*N1+D2*N2+ . . . +Dj*Nj, (m??)??L1?L2?(m+?)?, wherein ? is a constant between 380 nm and 780 nm; m is a natural number; and ? is a constant between 0 and 0.2.

Abstract: A display apparatus may include a first plurality of pixels, a substrate, a first signal line, and a load matching device. The substrate may include a first opening, a first non-display area, and a main display area. The first non-displaying area may at least partially surround the first opening. The main display area may support the first plurality of pixels. The first signal line may be electrically connected to the first plurality of pixels, may overlap the main display area, and may overlap the first non-display area. The load matching device may overlap the first non-display area and may provide a first electrical load to the first signal line.

Abstract: A display device includes a substrate in which a first area, a second area and a bending area between the first and second areas are defined, a plurality of pixels disposed above the substrate in the first area, a plurality of conductive layers extending to and intersecting the bending area, a protective film covering the conductive layers and disposed in the bending area, a first portion of the first area adjacent to the bending area, and a second portion of the second area adjacent to the bending area. The display device further includes a plurality of tag layers disposed in the first and second portions and connected to both ends of the conductive layers, wherein the bending area is interposed between the plurality of tag layers. The tag layers are exposed to an outside of the display device by exposure holes defined in the protective film.

Abstract: A semiconductor device with multiple silicide regions is provided. In embodiments a first silicide precursor and a second silicide precursor are deposited on a source/drain region. A first silicide with a first phase is formed, and the second silicide precursor is insoluble within the first phase of the first silicide. The first phase of the first silicide is modified to a second phase of the first silicide, and the second silicide precursor being soluble within the second phase of the first silicide. A second silicide is formed with the second silicide precursor and the second phase of the first silicide.

Abstract: A display device includes a substrate including a display area and a peripheral area. A display element is disposed in the display area and is electrically connected to a thin film transistor. A power supply line is disposed in the peripheral area. An insulating layer covers a portion of the power supply line. A barrier layer is disposed on the insulating layer and includes a first side surface facing the display area and a second side surface facing away from the display area. At least one of the first side surface or the second side surface includes a concavo-convex surface. The barrier layer forms a step difference with respect to an upper surface of the insulating layer. An end of the insulating layer is positioned beyond the second side surface of the barrier layer on a side of the barrier layer facing away from the display area.

Abstract: A display panel and an electronic equipment are provided. By disposing a plurality of pixel driving circuit islands on a periphery of a transparent display zone, wherein each of the pixel driving circuit islands includes a plurality of first pixel driving circuits, and at least part of the first pixel driving circuits of at least part of the pixel driving circuit islands is used for driving a plurality of first display pixels of the transparent display zone, a driving circuit is not disposed on the transparent display region, thereby improving a light transmittance rate of the transparent display region.

Abstract: A method includes etching a dielectric layer of a substrate to form an opening in the dielectric layer, forming a metal layer extending into the opening, performing an anneal process, so that a bottom portion of the metal layer reacts with a semiconductor region underlying the metal layer to form a source/drain region, performing a plasma treatment process on the substrate using a process gas including hydrogen gas and a nitrogen-containing gas to form a silicon-and-nitrogen-containing layer, and depositing a metallic material on the silicon-and-nitrogen-containing layer.

Abstract: This organic-EL display apparatus comprises: a substrate with a drive circuit comprising a thin-film transistor (TFT), a planarizing layer to cover the drive circuit, and an organic light-emitting element formed upon the surface of the planarizing layer facing the opposite direction from the drive circuit. The surface of the planarizing layer has an arithmetic average roughness of 50 nm or less. The TFT comprises a drain electrode, a source electrode, and a semiconductor layer that includes regions to be a channel of TFT and partially overlaps with the source and drain electrodes. Respective parts of a first conductor layer forming the drain electrode and a second conductor layer forming the source electrode are arranged in an alternating manner along a prescribed direction, and the region to be the channel is sandwiched between the part of the first conductor layer and the part of the second conductor layer.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to diode triggered Silicon controlled rectifiers and methods of manufacture. The structure includes a diode string comprising a first type of diodes and a second type of diode in bulk technology in series with the diode string of the first type of diodes.

Abstract: A light emitting device includes: a light emitting element comprising: a semiconductor multilayer structure that has an electrode formation surface, a light-emitting surface opposite to the electrode formation surface, and side surfaces between the electrode formation surface and the light-emitting surface, and a pair of electrodes provided on the electrode formation surface; a covering member covering the side surfaces of the light emitting element; and an optical member disposed over the light-emitting surface of the light emitting element and an upper surface of the covering member, the optical member comprising: a light-reflective portion disposed above the light emitting element, and a light-transmissive portion disposed between the light-reflective portion and the covering member and forming a part of an outer side surface of the light emitting device.

Abstract: A display panel or a display device with high display quality is provided. The display panel includes a light-emitting element, an insulating layer, a protective layer, and a conductive layer. The light-emitting element includes a first electrode, a light-emitting layer, and a second electrode. The light-emitting element emits light to the protective layer side. The insulating layer includes a first opening overlapping with the first electrode. The insulating layer covers an end portion of the first electrode. The light-emitting layer overlaps with the first electrode through the first opening. The second electrode is positioned over the light-emitting layer. The protective layer is over and in contact with the second electrode. The protective layer functions as a protective layer of the light-emitting element. The protective layer includes a second opening overlapping with the insulating layer. The conductive layer is connected to the second electrode through the second opening.

Abstract: An image sensor package is provided. The image sensor package comprises a package substrate, and an image sensor chip arranged over the package substrate. The integrated circuit device further comprises a protection layer overlying the image sensor chip having a planar top surface and a bottom surface lining and contacting structures under the protection layer, and an on-wafer shield structure spaced around a periphery of the image sensor chip. The height of the image sensor package can be reduced since a discrete cover glass or an infrared filter and corresponding intervening materials are no longer needed since being replaced by the build in protection layer. The size of the image sensor package can be reduced since a discrete light shield and corresponding intervening materials are no longer needed since being replaced by the build in on wafer light shield structure.

Abstract: Provided is a display panel, comprising a substrate, and a plurality of film layers sequentially disposed on the substrate. The display panel has m paths orthogonal to a surface of the substrate, and including a first path and a second path comprising different film layers. When a thickness of the film layer is set to a preset thickness and/or when a refractive index is set to a preset refractive index, the display panel allows an externally incident light to enter therein in a direction orthogonal to the surface of the substrate, and pass through the first path and the second path. A difference value between optical lengths of the first path and the second path is an integer multiple of a wavelength of the externally incident light.

Abstract: The present application provides an array substrate and a manufacturing method of the same, the array substrate includes a display region, the display region includes a thin film transistor structure layer including a gate electrode layer and a source drain electrode layer, wherein the gate electrode layer and the source drain electrode layer are made of an alloy material including one or a group selected from Al, Ge, Nd, Ta, Zr, Ni, or La.