Abstract: A semiconductor device includes a lower stack structure that includes a lower word line, an upper stack structure that is on the lower stack structure and includes an upper word line, a decoder that is adjacent to the lower stack structure and the upper stack structure, a signal interconnection that is connected to the decoder, a lower selector that is connected to the signal interconnection and further connected to the lower word line, and an upper selector that is connected to the signal interconnection, isolated from direct contact with the lower selector, and further connected to the upper word line.

Abstract: A display apparatus includes a first display area including a plurality of pixel areas, and a second display area including a plurality of pixel areas and a plurality of transmission areas and arranged adjacent to the first display area. The plurality of pixel areas each includes sub-pixels each including a pixel circuit and an organic light-emitting device electrically connected to the pixel circuit. The pixel circuit includes a thin-film transistor and an inorganic insulating layer on the thin-film transistor, and the thin-film transistor includes a semiconductor layer and a gate electrode. The organic insulated layer extends in the transmission areas. The second display area defines a dummy contact hole which passes through the inorganic insulating layer in at least one of the pixel areas and the transmission areas.

Abstract: A display device may prevent signal lines in a non-display area from being damaged by particles. The display device may include a first substrate including a display area and a non-display area, a first electrode in the display area over the first substrate, a light emitting layer over the first electrode, a second electrode over the light emitting layer, lines in the non-display area over the first substrate, organic patterns over the lines and spaced apart from one another, an adhesive layer over the organic patterns, and a second substrate over the adhesive layer. The light emitting layer and the second electrode are provided from the display area to the non-display area, and spaced distances among the organic patterns are shorter than a distance from an upper surface of the second electrode provided over the organic patterns to an upper surface of the adhesive layer.

Abstract: A semiconductor device includes a fin projecting upwardly from a substrate; a gate stack engaging the fin; a gate spacer on a sidewall of the gate stack and in contact with the gate stack; and a dielectric layer on the sidewall of the gate stack and in contact with the gate stack, the dielectric layer being vertically between the fin and the gate spacer, wherein the dielectric layer has a thickness small than the gate spacer.

Abstract: A display device includes a substrate including a display area and a peripheral area, a thin film transistor arranged on the substrate, a first metal wiring layer electrically connected to the thin film transistor, an inorganic protective layer on the first metal wiring layer, a patterned first organic film layer located on the inorganic protective layer and overlapping the first metal wiring layer in a plan view, a second metal wiring layer on the first organic film layer, and a second organic film layer on the second metal wiring layer, where the first organic film layer is patterned to be arranged at a position where the first metal wiring layer and the second metal wiring layer overlap each other in the plan view, and is not arranged on an entirety of the display area, and the second organic film layer is arranged on the entire display area.

Abstract: An organic light emitting display device may include a substrate having a display area and a non-display area at least partially surrounds the display area, a pixel structure disposed in the display area on the substrate, a via insulating layer disposed in the non-display area on the substrate and having a contact hole, a lower pad disposed on the via insulating layer and a connecting structure. Here, the connecting structure may include a flexible substrate disposed on the lower pad, an upper pad disposed between the flexible substrate and the lower pad, and an upper dummy pad spaced apart from the upper pad in a first direction on a bottom surface of the flexible substrate.

Abstract: A light emitting element includes: a substrate including a first surface including a first region and a second region; a first semiconductor layered body on the first region, the first semiconductor layered body comprising a first light emitting layer and including: a first lateral surface, and a second lateral surface opposite to the first lateral surface; and a second semiconductor layered body on the second region, the second semiconductor layered body comprising a second light emitting layer and including: a first lateral surface facing the second lateral surface and located on a first semiconductor layered body side of the second semiconductor layered body, and a second lateral surface opposite to the first lateral surface and located on a side opposite the first semiconductor layered body side of the second semiconductor layered body.

Abstract: A display device includes a substrate including a display area and a non-display area around the display area. A pixel is disposed on the display area. A first dam is disposed on the non-display area. The first dam includes a first sub-dam and a second sub-dam disposed on the first sub-dam. A first power line is disposed on the non-display area and passes between the first sub-dam and the second sub-dam. The first power line is connected to the pixel. A bridge pattern is disposed under the first sub-dam. The bridge pattern is connected to the first power line.

Abstract: An organic EL device (100D) according to an embodiment of the present invention has: a substrate (1); a drive circuit layer (2) having a plurality of TFTs formed on the substrate; interlayer insulation layers (2Pa, 2Pb) formed on the drive circuit layer; an organic EL element layer (3) formed on the interlayer insulation layers; and a thin-film sealing structure (10DE) formed so as to cover the organic EL element layer. The interlayer insulation layers have contact holes (CH1, CH2). Contact parts (C1, C2) that connect the drive circuit layer and the organic EL element layer are formed inside the contact holes. The surface (2Pb_Sb) of the interlayer insulation layers and the surface (C_Sb) of the contact parts are flush, and the arithmetic average roughness Ra of the surfaces are 50 nm or less.

Abstract: An organic light-emitting display including a substrate, an insulating layer on the substrate, the substrate and the insulating layer having an opening therethrough penetrating, a pixel array on the insulating layer, the pixel array including a plurality of pixels that surround the opening, a first pixel adjacent to the opening from among the plurality of pixels includes a pixel electrode layer, an intermediate layer on the pixel electrode layer, and an opposite electrode layer on the intermediate layer, and a stepped portion on the substrate and adjacent to the opening, the stepped portion having an under-cut step, wherein the intermediate layer including an organic emission layer, and wherein at least one of the intermediate layer and the opposite electrode layer extends toward the opening and is disconnected by the stepped portion.

Abstract: A display device includes: a base substrate including an opening area, an opening peripheral area, and a display area at least partially surrounding the opening peripheral area, wherein the opening peripheral area is a non-display area at least partially surrounding the opening area; a thin film transistor disposed on the base substrate in the display area; a via insulating layer disposed on the thin film transistor and having a first opening surrounding the opening area, wherein the first opening is in the opening peripheral area; a pixel defining layer disposed on the via insulating layer and having a first opening which overlaps the first opening of the via insulating layer; a transparent filler disposed on the base substrate in the opening area; and a sealing substrate disposed on the transparent filler.

Abstract: An optoelectronic device includes a semiconductor stack including a top surface; a current blocking region, including a first pad portion formed on the semiconductor stack and wherein the current blocking region includes transparent insulated material; a first opening, formed in the first pad portion, exposing the top surface of the semiconductor stack; a transparent conductive layer, covering the top surface of the semiconductor stack, including a second opening overlapping the first opening; and a first electrode, formed on the semiconductor stack, including a first pad electrode formed on the first pad portion of the current blocking region; wherein the first pad electrode contacts the semiconductor stack through the first opening and the second opening; wherein the first opening includes a first area, the first pad portion and the first opening compose a total area, and a ratio of the first area to the total area is between 10% and 40%.

Abstract: A display device is provided. The display device includes first, second and third front signal lines disposed on a first portion and electrically connected to light emitting elements, connection lines overlapping a second portion, and first, second and third rear signal lines disposed on a third portion. The first, second and third front signal lines are disposed on different layers. The first front signal line and the first rear signal line are disposed on a same layer. The second front signal line and the second rear signal line are disposed on a same layer. The third front signal line and the third rear signal line are disposed on a same layer. The connection lines electrically and selectively connect the front signal lines and the rear signal lines.

Abstract: A display panel includes a first display area and a second display area. The display panel includes a plurality of first pixel groups in the first display area, a plurality of second pixel groups in the second display area, and a plurality of scan lines connected to the first and second pixel groups. The second display area includes a plurality of light emitting areas in which the second pixel groups are respectively disposed, and a plurality of open areas in which the second pixel groups are not disposed. One of a second pixel group of an n-th row is cut and does not overlap an adjacent open area of the n-th row, and is connected in the second display area to a scan line of a second pixel group of an (n?1)-th row or a scan line of a second pixel group of an (n+1)-th row.

Abstract: A semiconductor device includes a core insulating layer extending in a first direction, an etch stop layer disposed on the core insulating layer, a channel layer extending along a sidewall of the core insulating layer and a sidewall of the etch stop layer, conductive patterns each surrounding the channel layer and stacked to be spaced apart from each other in the first direction, and an impurity region formed in an upper end of the channel layer.

Abstract: A display device includes a substrate, a semiconductor layer on the substrate, the semiconductor layer comprising a first semiconductor portion, a first insulating layer on the semiconductor layer, a first gate electrode on the first insulating layer and overlapping the first semiconductor portion, a scan line disposed on the first insulating layer and extending in a first direction, a second insulating layer on the first gate electrode and the scan line, a data line on the second insulating layer, and a first driving voltage line on the second insulating layer. The first driving voltage line may include a first portion extending in a second direction crossing the first direction, and a second portion expanding from the first portion in the first direction. The first portion may overlap the scan line, and the second portion may overlap the first gate electrode in a plan view to form a storage capacitor.

Abstract: A transistor comprises a pair of source/drain regions having a channel there-between. A transistor gate construction is operatively proximate the channel. The channel comprises Si1-yGey, where “y” is from 0 to 0.6. At least a portion of each of the source/drain regions comprises Si1-xGex, where “x” is from 0.5 to 1. Other embodiments, including methods, are disclosed.

Abstract: An organic light emitting diode display includes a substrate, a scan line on the substrate for transferring a scan signal, a data line crossing the scan line and for transferring a data signal, a driving voltage line crossing the scan line and for transferring a driving voltage, a switching thin film transistor coupled to the scan line and the data line, a driving thin film transistor coupled to a switching drain electrode of the switching thin film transistor, and an organic light emitting diode (OLED) coupled to a driving drain electrode of the driving thin film transistor, wherein a driving semiconductor layer of the driving thin film transistor is bent and in a plane substantially parallel to the substrate.

Abstract: A display device includes: a substrate having a display area and a non-display area; a lower connection line disposed in the non-display area; a bank layer disposed on the lower connection line and having an undercut structure at an edge of a lower end portion thereof; a bank etch layer disposed between the lower connection line and the bank layer and having an edge inside the edge of the lower end portion of the bank layer; and a second driving electrode disposed on the bank layer and electrically connected to the lower connection line at least once, wherein a plurality of bank holes are formed in the bank layer.

Abstract: The present disclosure provides a display panel and a display device. The display panel includes pixel circuits arranged in a matrix, and a blocking unit. Each pixel circuit includes: a driving transistor; a first switch transistor; a second switch transistor; and a third switch transistor. The blocking unit is configured to receive a fixed potential signal, and at least a partial area of the blocking unit is located between a first semiconductor connection portion and a second semiconductor connection portion, the first semiconductor connection portion is connected between a second electrode of the first switch transistor and a gate electrode of the driving transistor, and the second semiconductor connection portion is electrically connected between a first electrode of the second switch transistor and a data line.