Abstract: A process is provided in which low-k layers are protected from damage by the use of thermal decomposition materials. In one embodiment, the low-k layers may be low-k dielectric layers utilized in BEOL process steps. The thermal decomposition materials may be utilized to replace organic layers that typically require ashing processes to remove. By removing the need for certain ashing steps, the exposure of the low-k dielectric layer to ashing processes may be lessened. In another embodiment, the low-k layers may be protected by plugging openings in the low-k layer with the thermal decomposition material before a subsequent process step that may damage the low-k layer is performed. The thermal decomposition materials may be removed by a thermal anneal process step that does not damage the low-k layers.

Abstract: An etching method includes: adsorbing an adsorbate based on a processing gas containing BCl3 gas onto a target object, which serves as a to-be-etched object, by: supplying H2 gas and the processing gas to a process space in which the target object is disposed; and applying power of a predetermined frequency to the process space, while supplying the H2 gas is stopped, to generate plasma in the process space; and etching the target object by generating plasma of a rare gas in the process space to activate the adsorbate.

Abstract: A method for etching features in a stack below a carbon containing mask is provided. The stack is cooled to a temperature below ?20° C. An etch gas is provided comprising a free fluorine providing component, a hydrogen containing component, a hydrocarbon containing component, and a fluorocarbon containing component. A plasma is generated from the etch gas. A bias is provided with a magnitude of at least about 400 volts to accelerate ions from the plasma to the stack. Features are selectively etched in the stack with respect to the carbon containing mask.

Abstract: An etchant composition includes a silane compound represented by the following Chemical Formula 1: wherein R1 to R6 are independently hydrogen, halogen, a substituted or unsubstituted C1-C20 hydrocarbyl group, a phenyl group, a C1-C20 alkoxy group, a carboxy group, a carbonyl group, a nitro group, a tri (C1-C20)alkylsilyl group, a phosphoryl group, or a cyano group, L is a direct bond or C1-C3 hydrocarbylene, A is an n-valent radical, and n is an integer of 1 to 4.

Abstract: In some embodiments, a method of a semiconductor process includes conformally forming a spacer layer over a plurality of mandrels that are disposed over a mask layer, portions of the spacer layer disposed over opposing sidewalls of adjacent ones of the plurality of mandrels defining trenches therebetween, filling the trenches with a dummy material, and removing first portions of the dummy material in the trenches, thereby forming a plurality of openings in the dummy material. The method further includes filling the plurality of openings with a first material, removing a remaining portion of the dummy material in the trenches, and removing the plurality of mandrels after the removing the dummy material.

Abstract: Provided herein are methods and related apparatus that facilitate patterning by performing highly non-conformal (directional) deposition on patterned structures. The methods involve depositing films on a patterned structure, such as a hard mask. The deposition may be both substrate-selective such that the films have high etch selectivity with respect to an underlying material to be etched and pattern-selective such that the films are directionally deposited to replicate the pattern of the patterned structure. In some embodiments, the deposition is performed in the same chamber as a subsequent etch is performed. In some embodiments, the deposition may be performed in a separate chamber (e.g., a PECVD deposition chamber) that is connected to the etch chamber by a vacuum transfer chamber. The deposition may be performed prior to or at selected intermittences during at etch process. In some embodiments, the deposition involves multiple cycles of a deposition and treatment process.

Abstract: Bending of a hole or a groove formed in a multilayered film including silicon oxide films and silicon nitride films alternately stacked on top of each other is suppressed. A plasma etching method includes a first etching process of etching, by plasma, the multilayered film including the silicon oxide films and the silicon nitride films alternately stacked on top of each other; and a second etching process of etching, by plasma, the multilayered film under a processing condition that an inclination of a portion of an inner sidewall of the hole or the groove, which is formed by the etching of the multilayered film, corresponding to the silicon nitride film with respect to a depth direction of the hole or the groove is reduced.

Abstract: A planarization structure is formed with a planar upper face enclosing a relief projecting from a planar substrate. The process used deposits a layer of a first material over the reliefs and then forms a layer of a second material with a planar upper face. This second material may be etched selectively with respect to the first material. The second layer is processed so that the protuberances of the first material are uncovered. A planarizing is then performed on the first material as far as the layer of the second material by selective chemical-mechanical polishing with respect to the second material.

Abstract: A system controls a flow of a chemical mechanical polish (CMP) slurry into a chamber to form a slurry reservoir within the chamber. Once the slurry reservoir has been formed within the chamber, the system moves a polishing head to position and force a surface of a wafer that is attached to the polishing head into contact with a polishing pad attached to a platen within the chamber. A wafer/pad interface is formed at the surface of the wafer forced into contact with the polishing pad and the wafer/pad interface is disposed below an upper surface of the slurry reservoir. During CMP processing, the system controls one or more of a level, a force, and a rotation of the platen, a position, a force and a rotation of the polishing head to conduct the CMP processing of the surface of the wafer at the wafer/pad interface.

Abstract: A manufacturing method of micro channel structure is disclosed and includes steps of: providing a substrate; depositing and etching to form a first insulation layer; depositing and etching to form a supporting layer; depositing and etching to form a valve layer; depositing and etching to form a second insulation layer; depositing and etching to form a vibration layer, a lower electrode layer and a piezoelectric actuating layer; providing a photoresist layer and depositing and etching to form a plurality of bonding pads; depositing and etching to from a mask layer; etching to form a first chamber; and etching to form a second chamber.

Abstract: In a method for etching a multilayer film of a target object by using a plasma processing apparatus, the multilayer film of the target object includes a layer made of a metal magnetic material and a mask is provided on the multilayer film. The multilayer film is etched in a state where a pressure in a processing chamber of the plasma processing apparatus is set to a first pressure that is a relatively high pressure. Subsequently, the multilayer film is further etched in a state where the pressure in the processing chamber is set to a second pressure lower than the first pressure.

Abstract: Acid chemical mechanical polishing compositions and methods have enhanced defect inhibition and selectively polish silicon nitride over silicon dioxide in an acid environment. The acid chemical mechanic polishing compositions include poly(2-ethyl-2-oxazoline) polymers, anionic functional colloidal silica particles, amine carboxylic acids and have a pH of 5 or less.

Abstract: A planarization method and a CMP method are provided. The planarization method includes providing a substrate with a first region and a second region having different degrees of hydrophobicity or hydrophilicity and performing a surface treatment to the first region to render the degrees of hydrophobicity or hydrophilicity in proximity to that of the second region. The CMP method includes providing a substrate with a first region and a second region; providing a polishing slurry on the substrate, wherein the polishing slurry and the surface of the first region have a first contact angle, and the polishing slurry and the surface of the first region have a second contact angle; modifying the surface of the first region to make a contact angle difference between the first contact angle and the second contact angle equal to or less than 30 degrees.

Abstract: A semiconductor device is manufactured using a cleaning process. The cleaning process utilizes a semiconductor manufacturing tool that has a wet cleaning section and a plasma cleaning section. The semiconductor device is placed within a wet cleaning chamber within the wet cleaning section, where a wet cleaning process is performed. Once completed, and without breaking atmosphere, the semiconductor device is removed from the wet cleaning section and placed within a plasma cleaning chamber within the plasma cleaning section. A plasma clean is then performed.

Abstract: A cavity is etched in a stack of layers which includes a first layer made of a first material and a second layer made of a second material. To etch the cavity, a first etch mask having a first opening is formed over the stack of layer. The stack of layers is then etched through the first opening to a depth located in the second layer. A second mask having a second opening, the dimensions of which are smaller, in top view, than the first opening, is formed over the stack of layer. The second opening is located, in top view, opposite the area etched through the first opening. The second layer is then etched through the second opening to reach the first layer. The etch method used is configured to etch the second material selectively over the first material.

Abstract: A method includes forming a tri-layer. The tri-layer includes a bottom layer; a middle layer over the bottom layer; and a top layer over the middle layer. The top layer includes a photo resist. The method further includes removing the top layer; and removing the middle layer using a chemical solution. The chemical solution is free from potassium hydroxide (KOH), and includes at least one of a quaternary ammonium hydroxide and a quaternary ammonium fluoride.

Abstract: A method of catalyst-assisted chemical etching with a vapor-phase etchant has been developed. In one approach, a semiconductor substrate including a patterned titanium nitride layer thereon is heated, and an oxidant and an acid are evaporated to form a vapor-phase etchant comprising an oxidant vapor and an acid vapor. The semiconductor substrate and the patterned titanium nitride layer are exposed to the vapor-phase etchant during the heating of the semiconductor substrate. The vapor-phase etchant diffuses through the patterned titanium nitride layer, and titanium nitride-covered regions of the semiconductor substrate are etched. Thus, an etched semiconductor structure is formed.

Abstract: There is provided a polishing method capable of more reducing defects on a silicon wafer surface. A polishing method of a silicon wafer, which includes a polishing step and a surface treatment step conducted after the polishing step and in which the number of abrasives in a surface treatment composition used in the surface treatment step is 1.0×1010 particles/mL or more and 1.0×1013 particles/mL or less by calculating from (1 [mL]×specific gravity of the composition [g/mL]×concentration of the abrasives [wt %])/((4/3)?×(average secondary particle diameter×10?7 [cm]/2)3 [/particle]×specific gravity of the abrasives [g/cm3]), using concentration of the abrasives in the surface treatment composition and an average secondary particle diameter measured by dynamic light scattering method, provided that all of the abrasives in the surface treatment composition used in the surface treatment step are assumed to have the average secondary particle diameter.

Abstract: Chemical mechanical polishing (CMP) compositions, methods and systems for polish cobalt or cobalt-containing substrates are provided. The CMP compositions comprise ?-alanine, abrasive particles, a salt of phosphate, corrosion inhibitor, oxidizer and water. The cobalt chemical mechanical polishing compositions provide high removal rate of Co as well as very high selectivity of Co film vs. dielectric film, such as TEOS, SixNy (with 1.0<x<3.0, 1.33<y<4.0), low-k, and ultra low-k films.

Abstract: To manufacture a liquid ejection head, a film having a lower surface free energy than a surface free energy of a substrate is first formed on an inner face of a liquid supply port. Next, a dry film to be a flow path forming member is attached to cover the surface of the substrate, and then a member to be an ejection orifice forming member is provided on the surface of the dry film.