Patents Examined by Mark Prenty
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Patent number: 9053994Abstract: A device for image sensing includes a photoelectric conversion unit and at least one transistor. The photoelectric conversion unit is configured to convert incident electromagnetic radiation into an electric signal. The at least one transistor includes a first gate electrode and a second gate electrode above the first gate electrode. The first gate electrode and the second gate electrode do not overlap each other within a non-overlapping region.Type: GrantFiled: April 17, 2013Date of Patent: June 9, 2015Assignee: SONY CORPORATIONInventors: Yasuhiro Yamada, Makoto Takatoku
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Patent number: 9024306Abstract: The organic electroluminescence element according to the present invention includes: a light-emitting layer; a first electrode layer on a first surface in a thickness direction of the light-emitting layer; a second electrode layer on a second surface in the thickness direction of the light-emitting layer; an electrically conductive layer; and an insulating layer. The light-emitting layer emits light when a predetermined voltage is applied between the first and second electrode layers. The second electrode layer includes an electrode part covering the second surface and an opening part formed in the electrode part to expose the second surface therethrough. The electrically conductive layer allows the light to pass therethrough, and formed on an exposed region of the second surface exposed through the opening part so as to be electrically connected to the electrode part and the light-emitting layer. The insulating layer is interposed between the electrode part and the second surface.Type: GrantFiled: April 23, 2012Date of Patent: May 5, 2015Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Masahiro Nakamura, Masahito Yamana, Mitsuo Yaguchi, Takeyuki Yamaki
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Patent number: 9012959Abstract: A semiconductor device includes: a semiconductor substrate having an upper surface and a lower surface; a field effect transistor having a semiconductor layer on the upper surface of the semiconductor substrate, a gate electrode, a drain electrode, and a source electrode; a P-type diffusion region in the semiconductor substrate and extending to the upper surface of the semiconductor substrate; a first N-type diffusion region in the semiconductor substrate and extending t the upper surface of the semiconductor substrate; a first connection electrode connecting the P-type diffusion region to a grounding point; and a second connection electrode connecting the first N-type diffusion region to the gate electrode or the drain electrode. The P-type diffusion region and the first N-type diffusion region constitute a bidirectional lateral diode.Type: GrantFiled: March 6, 2014Date of Patent: April 21, 2015Assignee: Mitsubishi Electric CorporationInventor: Koichi Fujita
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Patent number: 8994012Abstract: An organic EL panel (1) in accordance with one embodiment of the present invention includes: an element substrate (10); a sealing substrate (14); and an organic EL element (15) which is (i) sandwiched between the element substrate (10) and the sealing substrate (14) and (ii) constituted by at least an anode, an organic light emitting layer and a cathode which are stacked together. The sealing substrate (14) has, on its surface facing the element substrate (10), a PVA sealing film (13) and an SiO2 sealing film (12) stacked together.Type: GrantFiled: October 14, 2011Date of Patent: March 31, 2015Assignee: Sharp Kabushiki KaishaInventor: Takeshi Hirase
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Patent number: 8994036Abstract: According to the invention, a semiconductor device composite structure is provided which comprises an initial substrate with discrete, integrated devices and a heat removal structure. The heat removal structure comprises: a bond layer which is attached to the initial substrate or the devices, a heat removal structure which is attached on the bond layer and which consists of a material with a specific thermal conductivity which is at least double the level of the average specific heat conductivity of the initial substrate or the devices, and one or more metallic thermal bridges which thermally connect the devices with the heat removal structure via the bond layer. The thermal bridges are designed as vertical through connections (vias) through the bond and heat removal structure. The invention furthermore relates to an associated production method.Type: GrantFiled: April 17, 2013Date of Patent: March 31, 2015Assignee: Forschungsverbund Berlin E.V.Inventor: Tomas Krämer
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Patent number: 8987784Abstract: In an exemplary implementation, a III-nitride semiconductor device includes a III-nitride heterojunction including a first III-nitride body situated over a second III-nitride body to form a two-dimensional electron gas. The III-nitride semiconductor device further includes a dielectric body situated over the III-nitride heterojunction and including a first dielectric layer of a first dielectric material and a second dielectric layer of a second dielectric material different than the first dielectric material. A gate well of a first width is defined by the first dielectric layer, and is of a second width defined by the second dielectric layer, where the second width is greater than the first width. The III-nitride semiconductor device further includes a gate arrangement situated in the gate well and including a gate electrode integrated with a field plate.Type: GrantFiled: November 15, 2013Date of Patent: March 24, 2015Assignee: International Rectifier CorporationInventor: Michael A. Briere
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Patent number: 8981393Abstract: An object is to provide a light-emitting element which uses a plurality of kinds of light-emitting dopants and has high emission efficiency. In one embodiment of the present invention, a light-emitting device, a light-emitting module, a light-emitting display device, an electronic device, and a lighting device each having reduced power consumption by using the above light-emitting element are provided. Attention is paid to Förster mechanism, which is one of mechanisms of intermolecular energy transfer. Efficient energy transfer by Förster mechanism is achieved by making an emission wavelength of a molecule which donates energy overlap with the longest-wavelength-side local maximum peak of a graph obtained by multiplying an absorption spectrum of a molecule which receives energy by a wavelength raised to the fourth power.Type: GrantFiled: April 16, 2013Date of Patent: March 17, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Satoshi Seo, Shunpei Yamazaki, Takahiro Ishisone
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Patent number: 8975115Abstract: An insulating layer which releases a large amount of oxygen is used as an insulating layer in contact with a channel region of an oxide semiconductor layer, and an insulating layer which releases a small amount of oxygen is used as an insulating layer in contact with a source region and a drain region of the oxide semiconductor layer. By releasing oxygen from the insulating layer which releases a large amount of oxygen, oxygen deficiency in the channel region and an interface state density between the insulating layer and the channel region can be reduced, so that a highly reliable semiconductor device having small variation in electrical characteristics can be manufactured. The source region and the drain region are provided in contact with the insulating layer which releases a small amount of oxygen, thereby suppressing the increase of the resistance of the source region and the drain region.Type: GrantFiled: January 7, 2014Date of Patent: March 10, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yuta Endo, Kosei Noda, Toshinari Sasaki
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Patent number: 8975651Abstract: An LED package includes a lens, an LED chip securely received and engaged in the lens, and a base with an electrode assembly thereon. A bottom surface of the LED chip is bare. The lens is mounted on the base and the bottom surface of the LED chip electrically and mechanically connects with the electrode assembly.Type: GrantFiled: April 17, 2013Date of Patent: March 10, 2015Assignee: Hon Hai Precision Industry Co., Ltd.Inventors: Yun-Yu Chou, Ko-Hua Chen
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Patent number: 8975623Abstract: The organic electroluminescence element in accordance with the present invention includes: a light-emitting layer; a first electrode layer on a first surface in a thickness direction of the light-emitting layer; a second electrode layer on a second surface in the thickness direction of the light-emitting layer; an electrically conductive layer; and an insulating layer. The light-emitting layer is configured to emit light when a predetermined voltage is applied between the first and second electrode layers. The second electrode layer includes an electrode part covering the second surface and an opening part formed in the electrode part to expose the second surface. The electrically conductive layer is designed to allow the light to pass therethrough, and is interposed between the second surface and the second electrode layer to cover the second surface. The insulating layer is interposed between the second surface and the electrically conductive layer to overlap the electrode part.Type: GrantFiled: April 23, 2012Date of Patent: March 10, 2015Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Masahiro Nakamura, Masahito Yamana, Mitsuo Yaguchi, Takeyuki Yamaki
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Patent number: 8969890Abstract: The present invention discloses a method for manufacturing a solid state light emitting device having a plurality of light-sources, the method comprising the steps of: providing a substrate having a growth surface; providing a mask layer on the growth surface, the mask layer having a plurality of openings through which the growth surface is exposed, wherein a largest lateral dimension of each of said openings is less than 0.Type: GrantFiled: October 20, 2011Date of Patent: March 3, 2015Assignee: Koninklijke Philips N.V.Inventors: Abraham Rudolf Balkenende, Marcus Antonius Verschuuren, George Immink
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Patent number: 8963193Abstract: The present invention relates to an opto-electric device having a stack of layers subsequently comprising a first electrode layer (20) of a material having a first work function, deposited on a substrate (10) or forming a substrate (20), an organic opto-electric layer (30) on the first electrode layer (20), a patterned electrically conductive layer (40) printed on the opto-electric layer (30), a transparent, second electrode layer (50) of a material having a second work function on the opto-electric layer (30) provided with the patterned electrically conductive layer (40), the second work function having a value lower than the first work function.Type: GrantFiled: June 17, 2011Date of Patent: February 24, 2015Assignee: Nederlandse Organisatie voor toegepast-natuurwetenschappelijk onderzoek TNOInventors: Dorothee Christine Hermes, Joanne Sarah Wilson
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Patent number: 8957496Abstract: An electronic apparatus includes a semiconductor substrate, a circuit block disposed in and supported by the semiconductor substrate and comprising an inductor, and a discontinuous noise isolation guard ring surrounding the circuit block. The discontinuous noise isolation guard ring includes a metal ring supported by the semiconductor substrate and a ring-shaped region disposed in the semiconductor substrate, having a dopant concentration level, and electrically coupled to the metal ring, to inhibit noise in the semiconductor substrate from reaching the circuit. The metal ring has a first gap and the ring-shaped region has a second gap.Type: GrantFiled: April 17, 2013Date of Patent: February 17, 2015Assignee: Freescale Semiconductor, Inc.Inventors: Qiang Li, Olin L. Hartin, Sateh Jalaleddine, Radu M. Secareanu, Michael J. Zunino
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Patent number: 8946817Abstract: A semiconductor device includes a semiconductor body including an inner region, and an edge region, a first doped device region of a first doping type in the inner region and the edge region and coupled to a first terminal, and at least one second doped device region of a second doping type complementary to the first doping type in the inner region and coupled to a second terminal. Further, the semiconductor device includes a minority carrier converter structure in the edge region. The minority carrier converter structure includes a first trap region of the second doping type adjoining the first doped device region, and a conductor electrically coupling the first trap region to the first doped device region.Type: GrantFiled: April 15, 2013Date of Patent: February 3, 2015Assignee: Infineon Technologies Austria AGInventor: Franz Hirler
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Patent number: 8946778Abstract: In an exemplary implementation, a III-nitride semiconductor device includes a III-nitride heterojunction including a first III-nitride body situated over a second III-nitride body to form a two-dimensional electron gas. The III-nitride semiconductor device further includes a gate well formed in a dielectric body, the dielectric body situated over the III-nitride heterojunction. A gate arrangement is situated in the gate well and includes a gate electrode, a source-side field plate, and a drain-side field plate. The source-side field plate and the drain-side field plate each include one or more steps, where the drain-side field plate has a different number of the one or more steps than the source-side field plate.Type: GrantFiled: November 15, 2013Date of Patent: February 3, 2015Assignee: International Rectifier CorporationInventor: Michael A. Briere
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Patent number: 8946827Abstract: Disclosed is a semiconductor device. The semiconductor device includes a functional circuit having a resistor formed by a plurality of polysilicon resistors, and in which the property of the functional circuit can be adjusted by trimming the resistor, and in which the polysilicon resistors are coupled in series or in parallel to each other and arranged in a direction perpendicular to one side of the semiconductor device.Type: GrantFiled: April 17, 2013Date of Patent: February 3, 2015Assignee: Renesas Electronics CorporationInventors: Satoshi Maeda, Maya Ueno
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Patent number: 8921932Abstract: The substrate is made of a compound semiconductor and has a plurality of first recesses, each of which opens at one main surface thereof and has a first side wall surface. The gate insulating film is disposed on and in contact with the first side wall surface. The gate electrode is disposed on and in contact with the gate insulating film. The substrate include: a source region having first conductivity type and disposed to face itself with a first recess interposed therebetween, when viewed in a cross section along the thickness direction; and a body region having second conductivity type and disposed to face itself with the first recess interposed therebetween. Portions of the source region facing each other are connected to each other in a region interposed between the first recess and another first recess adjacent to the first recess, when viewed in a plan view.Type: GrantFiled: April 15, 2013Date of Patent: December 30, 2014Assignee: Sumitomo Electric Industries, Ltd.Inventors: Takeyoshi Masuda, Keiji Wada, Toru Hiyoshi
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Patent number: 8916902Abstract: An improved LED module packaging structure with an IC chip includes a power input end in a packaging groove of a carrier stand connected to a zener diode and a power input port of the IC chip acquiring an operating power from the zener diode, so that the LED module applied to a full-color or self-color illuminant of central control utilizes the zener diode connected to the power input end within the packaging groove of the carrier stand to lower or modulate the voltage of an external power. While the IC chip receives a data signal from the data signal input end, the IC chip receives a matched operating voltage via the zener diode to drive the LED chip to shine, thereby attaining a long transmission of the central control easily.Type: GrantFiled: April 17, 2013Date of Patent: December 23, 2014Assignee: UBLeds Co., Ltd.Inventor: ShouWen Hsue
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Patent number: 8901682Abstract: A MEMS device, such as a microphone, uses a perforated plate. The plate comprises an array of holes across the plate area. The plate has an area formed as a grid of polygonal cells, wherein each cell comprises a line of material following a path around the polygon thereby defining an opening in the center. In one aspect, the line of material forms a path along each side of the polygon which forms a track which extends at least once inwardly from the polygon perimeter towards the center of the polygon and back outwardly to the polygon perimeter. This defines a meandering hexagon side wall, which functions as a local spring suspension.Type: GrantFiled: April 12, 2013Date of Patent: December 2, 2014Assignee: NXP, B.V.Inventors: Klaus Reimann, Iris Bominaar-Silkens, Twan Van Lippen, Remco Henricus Wilhelmus Pijnenburg
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Patent number: RE45356Abstract: Provided are a phase-change memory device using a phase-change material having a low melting point and a high crystallization speed, and a method of fabricating the same. The phase-change memory device includes an antimony (Sb)-selenium (Se) chalcogenide SbxSe100-x phase-change material layer contacting a heat-generating electrode layer exposed through a pore and filling the pore. Due to the use of SbxSe100-x in the phase-change material layer, a higher-speed, lower-power consumption phase-change memory device than a GST memory device can be manufactured.Type: GrantFiled: June 16, 2011Date of Patent: February 3, 2015Assignee: Electronics and Telecommunications Research InstituteInventors: Sung Min Yoon, Nam Yeal Lee, Sang Ouk Ryu, Seung Yun Lee, Young Sam Park, Kyu Jeong Choi, Byoung Gon Yu