Abstract: Systems and methods of sharing removable media storage (RMS) devices in multi-partitioned systems are disclosed. An exemplary method may include receiving requests from a plurality of partitions of a processor to map at least one shared RMS device for the multi-partitioned system. The method may also include scheduling the requests if the shared RMS device is unavailable. The method may also include automatically mapping the at least one shared RMS device to the partitions one at a time as the at least one shared RMS device becomes available.

Abstract: An operating system in a shared processor logical partitioned data processing system is given a target percentage. The hypervisor assigns the target processor percentage to the operating system. The operating system also has a predetermined time slice to allot to threads in a multitasking environment. The operating system adjusts the time slice based on a per-virtual-processor percentage.

Abstract: A processor-based system includes a processor coupled to a system controller through a processor bus. The system controller is used to couple at least one input device, at least one output device, and at least one data storage device to the processor. Also coupled to the processor bus is a memory hub controller coupled to a memory hub of at least one memory module having a plurality of memory devices coupled to the memory hub. The memory hub is coupled to the memory hub controller through a downstream bus and an upstream bus. The downstream bus has a width of M bits, and the upstream bus has a width of N bits. Although the sum of M and N is fixed, the individual values of M and N can be adjusted during the operation of the processor-based system to adjust the bandwidths of the downstream bus and the upstream bus.

Abstract: An apparatus and method for expediting parity checked TLB access operations is described in connection with a multithreaded multiprocessor chip. This parity checking mechanism eliminates the need to read a CAM entry from a TLB during a TLB access by storing the tag parity value in a RAM portion of a TLB, using the CAM key input to generate a tag parity check value for a matched entry, and comparing the generated tag parity check value to the stored tag parity value to determine if there is a parity match or error.

Abstract: A technique places content, such as data, of one or more data containers on volumes of a striped volume set (SVS). The placement of data across the volumes of the SVS allows specification of a deterministic pattern of fixed length. That is, the pattern determines a placement of data of a data container that is striped among the volumes of the SVS. The placement pattern is such that the stripes are distributed exactly or nearly equally among the volumes and that, within any local span of a small multiple of the number of volumes, the stripes are distributed nearly equally among the volumes. The placement pattern is also substantially similar for a plurality of SVSs having different numbers of volumes.

Abstract: A semiconductor memory device includes a plurality of banks. A data path may be divided into a read data path and a write data path, therefore, parallel processing of write and read commands are possible. The semiconductor memory device may include an address bank buffer, address buffer, column predecoder and/or a decoder. The semiconductor memory device may begin execution of a write command in a bank in one clock cycle and begin execution of a read command in the following clock cycle, therefore, bus efficiency is increased and/or write-to-read turn around time is reduced.

Abstract: A system for optimizing translation lookaside buffer entries is provided. The system includes a translation lookaside buffer configured to store a number of entries, each entry having a size attribute, each entry referencing a corresponding page, and control logic configured to modify the size attribute of an existing entry in the translation lookaside buffer if a new page is contiguous with an existing page referenced by the existing entry. The existing entry after having had its size attribute modified references a consolidated page comprising the existing page and the new page.

Abstract: A burden placed on an administrator in creating a volume is reduced. An evaluation hint value and a performance hint value are employed as hint values for each hint. The evaluation hint value is determined by the administrator considering a service usage and the like of the service server 1 to which the volume is allocated. The performance hint value is used to determine a performance and a setting of the volume to be created in the storage system 3. The management server 2 has a conversion table indicating a correspondence between the evaluation hint value defined considering the hardware configuration and the performance hint value, with respect to each storage system 3. The management server 2 converts the evaluation hint value designated by the administrator to a performance hint value, by use of the conversion table associated with the storage system to which the volume is to be created, and the management server creates the volume in the storage system 3 according to the performance value.

Abstract: In a computer system where a site including a storage device system connected to high-rank apparatuses, via a network such as a SAN, and a site including a storage device system similarly connected to high-rank apparatuses via a network are connected to each other via an inter-high-rank-apparatuses network, arbitration-emulation software is installed in each of the high-rank apparatuses. Here, the following two-step arbitration is carried out, thereby determining one high-rank apparatus. Namely, at first, a shared/exclusive control using an already-existing shared volume is performed based on an in-site arbitration within the site. Next, a shared/exclusive control based on an inter-sites arbitration is performed by high-rank apparatuses each of which has won the arbitration within each site.

Abstract: A volume matrix is established including host devices on a host computer and virtual devices and logical devices on a data storage system. Each host device/virtual device (H/V) pair has a user-visible primary address range to serve as a primary H/V pair on a primary path for a logical device, and selected H/V pairs also have one or more user-hidden secondary address ranges to serve as secondary H/V pairs on secondary paths for other logical devices. The host computer directs storage requests to either the primary path or a secondary path to a target logical device based on expected performance criteria, and if a secondary path is used then the address is translated to the correct secondary address range. The data storage system performs the storage request on the target logical device after determining whether the request was received on the primary path or a secondary path, in which case the storage address is further translated to an address range of the target logical device.

Abstract: A method for taking snapshots of data. In an embodiment, a first map data structure is obtained that records locations for a plurality of data blocks. A second map data structure is formed that is initially empty of locations, the second map data structure representing the snapshot after the snapshot is started. Writes on data that arrive before the snapshot starts are applied to the first map, and writes that arrive after the snapshot starts are applied to the second map.

Abstract: A system and method of allocating contiguous real memory in a data processing system. A memory controller within system memory receives a request from a data processing system component for a contiguous block of memory during operation of the data processing system. In response to receiving the request, the memory controller selects a candidate contiguous block of memory. Then, after temporarily restricting access to the candidate contiguous block of memory, the memory controller identifies a set of frames currently in use within the candidate contiguous block of memory, relocates the set of frames, and allocates the candidate block of memory for exclusive use by the requesting data processing component. The allocation of contiguous real memory occurs dynamically during the operation of the data processing system.

Abstract: A deque of a local process in a memory work-stealing implementation may use one or more data structures to perform work. If the local process attempts to add a new value to its deque's data structure when the data structure is full (i.e., an overflow condition occurs), the contents of the data structure are copied to a larger allocated data structure (e.g., an array of greater size than an original array). The entries in the original, smaller-sized data structure are copied to exact positions in the now-active, larger-sized data structure. By this technique, the local process is thus provided with space to add the new value.

Abstract: Described is a synchronization technique that may be used to coordinate processing between endpoints using the connecting message fabric. Processors in a data storage system communicate using the message switch of the message fabric. Each processor is an endpoint within a data storage system. A first endpoint may mark the beginning of the synchronization period by specifying a processing point at which other processors and the first endpoint are to coordinate from the perspective of the first endpoint. Synchronization is performed using local state information about the processing state of each endpoint as reported by each endpoint. The first endpoint waits for successful synchronization within a timeout period in accordance with the first endpoint's local state information. If successful synchronization does not occur prior to the timeout period, the first endpoint broadcasts a message with a new synchronization point to other endpoints.

Abstract: Systems and methods which provide automatic management of cached content are disclosed. These systems and methods may provide a cache manager which is capable of updating content in a cache without receiving a request from a user. Content may be stored in a cache along with associated metadata. Based upon this metadata, the request which resulted in a particular piece of cached content may be regenerated. This regenerated request can be dynamically evaluated and content responsive generated. This newly generated content can be used to replace the previously cached content. Using these systems and methods content in a cache can be automatically managed and dynamically updated.

Abstract: A method, system, and program for facilitating non-contiguous allocation of a chunked object within a Java heap without changing the manner in which a Java Virtual Manager allocates objects within the heap are provided. According to one embodiment, a chunking controller within a broker layer detects a large object, where a large object is one that the size of the allocation of the large object within a memory heap exceeds a maximum contiguous free space within the Java heap. The broker layer operates atop the Java Virtual Manager to facilitate communication and business processes between heterogeneous systems. The chunking controller describes the large object by an underlying array of the large object divided into multiple pieces of a size not exceeding the maximum contiguous free space.

Abstract: A method and system are for reducing power consumption in a multi-way set-associative cache memory. During a first clock cycle, in response to an address, an associated set is identified in the cache memory. The address is compared to respective tag portions of blocks in the associated set, and a signal is output in response thereto. During a second clock cycle, in response to the signal indicating a match between one of the blocks and the address, a non-tag portion of the matching block in the associated set is read, while a non-matching block in the associated set is disabled.

Abstract: In accordance with the teaching described herein, systems and methods are provided for managing memory space in a mobile device. A plurality of data storage locations may be included. A plurality of software applications may be included, with each software application being operable to store data to a different data storage location. A data store management system may be operable to access and delete data stored in the plurality of data storage locations. If insufficient memory space is available in one of the data storage locations, then the data store management system may access the one data storage location and at least one other data storage location and delete data from at least one of the accessed data storage locations.

Abstract: Storage arrays are subdivided into a plurality of physical and logical entities to provide a framework of the available storage. In a large SAN, the network of storage arrays may define a complex arrangement of such physical and logical entities to partition the total storage volume. Therefore, the storage area network classifies a series of storage categories corresponding to different levels of the physical and logical entities representing subdivisions of the storage. In the storage array, designated storage is often not immediately employed for storing active data. In the enumerated storage categories, storage is apportioned from the previous category level in a progressive manner. Storage utilization reports which simultaneously display a plurality of storage category levels, and compute designated and free storage capacity at each level, indicate underutilized or potential available storage which may be obscured by imprecise or overly generous storage allotment estimates.

Abstract: A deque of a local process in a memory work-stealing implementation may use one or more data structures to perform work. If the local process attempts to add a new value to its deque's circular array when the data structure is full (i.e., an overflow condition occurs), the contents of the data structure are copied to a larger allocated circular array (e.g., a circular array of greater size than the original circular array). The entries in the original, smaller-sized circular array are copied to positions in the now-active, larger-sized circular array, and the system is configured to work with the newly activated circular array. By this technique, the local process is thus provided with space to add the new value.