Patents Examined by Matthew L. Reames
  • Patent number: 11502237
    Abstract: An electronic device (e.g., a diode) is provided that includes a substrate and a patterned layer of superconducting material disposed over the substrate. The patterned layer forms a first electrode, a second electrode, and a loop coupling the first electrode with the second electrode by a first channel and a second channel. The first channel and the second channel have different minimum widths. For a range of current magnitudes, when a magnetic field is applied to the patterned layer of superconducting material, the conductance from the first electrode to the second electrode is greater than the conductance from the second electrode to the first electrode.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: November 15, 2022
    Assignee: PSIQUANTUM CORP.
    Inventors: Faraz Najafi, Syrus Ziai
  • Patent number: 11495724
    Abstract: A method of fabricating a superconductor device includes providing a first metal layer on top of the substrate. An oxidation of a top surface of the first metal layer is rejected. A second metal layer is deposited on top of the second metal layer. A superconducting alloy of the first metal layer and the second metal layer is created between the first metal layer and the second metal layer. There is no oxide layer between the superconducting alloy and the first metal layer.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: November 8, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Benjamin Wymore, Christian Lavoie, Markus Brink
  • Patent number: 11489102
    Abstract: Josephson junction (JJ) structures are disclosed. In some embodiments, a JJ structure may include a first superconducting structure and a second superconducting structure disposed on a plane parallel to a silicon wafer surface. A non-superconducting structure may be disposed between the first superconducting structure and the second superconducting structure. A direction of current flow through the non-superconducting structure may be parallel to the silicon wafer surface.
    Type: Grant
    Filed: July 13, 2020
    Date of Patent: November 1, 2022
    Assignee: Synopsys, Inc.
    Inventors: Jamil Kawa, Victor Moroz, Stephen Robert Whiteley
  • Patent number: 11482663
    Abstract: A method for forming a MEMS device is provided. The method includes forming a stack of piezoelectric films and metal films on a base layer, wherein the piezoelectric films and the metal films are arranged in an alternating manner. The method also includes forming a first trench in the stack of the piezoelectric films and the metal films. The method further includes forming at least one void at the side wall of the first trench. In addition, the method includes forming a spacer structure in the at least one void. The method further includes forming a contact in the first trench after the formation of the spacer structure.
    Type: Grant
    Filed: May 20, 2020
    Date of Patent: October 25, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Ting-Jung Chen
  • Patent number: 11469341
    Abstract: The present disclosure relates to an optical detection panel. The optical detection panel may include a first substrate and a second substrate opposite the first substrate, a photosensitive component and a driving thin film transistor at a side of the second substrate facing the first substrate, a first electrode and a second electrode at a side of the second substrate facing the first substrate, and a plurality of microlenses at a side of the photosensitive component opposite from the second substrate. The second electrode may be connected to the driving thin film transistor.
    Type: Grant
    Filed: October 8, 2019
    Date of Patent: October 11, 2022
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
    Inventors: Qianqian Bu, Weipin Hu, Dan Wang, Yun Qiu, Xiao Sun, Congcong Wei
  • Patent number: 11469362
    Abstract: Superconductors and processes that form superconductors as composites of electrically polarizable ferroelectric materials and electrically conductive materials. The materials are chosen such that the binding energy of charge carriers within the materials exceeds the repulsive energy of the carriers and the energy carried by thermal vibrations (phonons) within the materials.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: October 11, 2022
    Assignee: FERRO DOMAIN, LLC.
    Inventors: John J. Mantese, Joseph V. Mantese
  • Patent number: 11443978
    Abstract: A method for preparing semiconductor on insulator structures comprises transferring a thin layer of silicon from a donor substrate onto a handle substrate.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: September 13, 2022
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Gaurab Samanta, Salvador Zepeda
  • Patent number: 11444233
    Abstract: A hysteretic magnetic Josephson junction (HMJJ) device is provided that comprises a non-magnetic spacer disposed between a first ferromagnetic layer and a second ferromagnetic layer, a first ferrimagnetic layer having a first side disposed on a side of the first ferromagnetic layer opposite the non-magnetic spacer, and a second ferrimagnetic layer having a first side disposed on a side of the second ferromagnetic layer opposite the non-magnetic spacer. The first ferrimagnetic layer and the second ferrimagnetic layer are formed from a composition that provides orthogonally magnetic responses relative to the magnetic responses of the first ferromagnetic layer and the second ferromagnetic layer. The HMJJ further comprises a first superconducting material layer having a first side disposed on a second side of the first ferromagnetic layer and a second superconducting material layer having a first side disposed on a second side of the second ferromagnetic layer.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: September 13, 2022
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventor: Melissa G. Loving
  • Patent number: 11430937
    Abstract: A tunable oscillator including a Josephson junction. In some embodiments, the tunable oscillator includes a first superconducting terminal, a second superconducting terminal, a graphene channel including a portion of a graphene sheet, and a conductive gate. The first superconducting terminal, the second superconducting terminal, and the graphene channel together may form a Josephson junction having an oscillation frequency, and the conductive gate may be configured, upon application of a voltage across the conductive gate and the graphene channel, to modify the oscillation frequency.
    Type: Grant
    Filed: January 12, 2021
    Date of Patent: August 30, 2022
    Assignee: Raytheon BBN Technologies Corp.
    Inventor: Kin Chung Fong
  • Patent number: 11430690
    Abstract: A semiconductor structure includes a substrate. A first metallization layer is disposed on the substrate. A second metallization layer is disposed on the first metallization layer and having one or more openings, wherein at least one of the one or more openings is configured to expose a top surface of the first metallization layer. A polymer-adhering liner layer is disposed on sidewalls of the at least one of the one more openings in the second metallization layer. A dielectric polymer is disposed in the at least one of the one or more openings in the second metallization layer and on the polymer-adhering liner layer. The dielectric polymer is configured to seal an air gap in the dielectric polymer.
    Type: Grant
    Filed: December 24, 2020
    Date of Patent: August 30, 2022
    Assignee: International Business Machines Corporation
    Inventors: Kenneth Chun Kuen Cheng, Koichi Motoyama, Oscar van der Straten, Joseph F. Maniscalco, Chih-Chao Yang
  • Patent number: 11424401
    Abstract: The present invention relates to a plurality of phononic devices and a method of manufacturing thereof. In one embodiment, highly sensitive superconducting cryogenic detectors integrate phononic crystals into their architecture. The phononic structures are designed to reduce the loss of athermal phonons, resulting in lower noise and higher sensitivity detectors. This fabrication process increases the qp generation recombination rate, thus, reducing the noise equivalent power (NEP) without sacrificing the scalability. A plurality of phononic devices, such as a kinetic inductance detector (KID), a transition edge sensor (TES) bolometer, and quarterwave backshort, can be manufactured according to the methods of the present invention.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: August 23, 2022
    Inventors: Kevin Denis, Karwan Rostem, Edward Wollack, Elissa Williams
  • Patent number: 11424400
    Abstract: The invention is directed to a device and method to engineer the superconducting transition width by suppressing the phonon populations responsible for the Cooper-pair decoherence below the superconducting transition temperature via phononic bandgap engineering. The device uses phononic crystals to engineer a phononic frequency gap that suppresses the decohering thermal phonon population just below the Cooper-frequency, and thus the normal conduction electron population. For example, such engineering can relax the cooling requirements for a variety of circuits yielding higher operational quality factors for superconducting electronics and interconnects.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: August 23, 2022
    Assignee: National Technology & Engineering Solutions of Sandia, LLC
    Inventors: Ihab Fathy El-Kady, Rupert M. Lewis, Michael David Henry, Matt Eichenfield
  • Patent number: 11417639
    Abstract: An optoelectronic device is specified, with a radiation-emitting semiconductor chip configured to generate electromagnetic radiation, and an active element configured to change a physical state, wherein the active element is embedded in a component of the component, and the physical change of state comprises the following: temperature change, sound generation, mechanical motion.
    Type: Grant
    Filed: October 9, 2018
    Date of Patent: August 16, 2022
    Assignee: OSRAM OLED GmbH
    Inventors: Luca Haiberger, Matthias Sperl
  • Patent number: 11417726
    Abstract: The present disclosure provides a semiconductor structure having an air gap dielectric and a method for preparing the semiconductor structure. The semiconductor structure includes a substrate; a plurality of conductive pillars disposed over the substrate; a plurality of dielectric pillars, disposed over the substrate, separated from the conductive pillars; a plurality of dielectric caps disposed over the conductive pillars, separated from the dielectric pillars; and a sealing layer disposed over the dielectric pillars and the dielectric caps.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: August 16, 2022
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Chin-Te Kuo
  • Patent number: 11411158
    Abstract: Techniques for creating an offset embedded ground plane cutout for a qubit device to facilitate frequency tuning of the qubit device are presented. A qubit device can comprise a first substrate and second substrate in a flip-chip assembly. The qubit chip assembly can comprise a qubit component fabricated on the first substrate. The qubit component can comprise a Josephson junction (JJ) circuit that can be offset from a center point of the qubit component. The qubit chip assembly can comprise an embedded ground plane situated on a surface of the qubit chip assembly. A cutout section can be formed in the ground plane and positioned over the JJ circuit. The cutout section can enable access of an optical signal or magnetic flux to the JJ circuit. A frequency of the qubit component can be tuned based on application of the optical signal or magnetic flux to the JJ circuit.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: August 9, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Timothy Phung, David Abraham
  • Patent number: 11403168
    Abstract: A method of detecting parity of weak magnetic fields includes inputting a first electromagnetic pump drive to a first three-wave mixing Josephson device via a first 90 deg. hybrid; inputting a second electromagnetic pump drive to a second three-wave mixing Josephson device through the first 90 deg. hybrid; and inputting a first electromagnetic wave via a second 90 deg. hybrid connected to the first three-wave mixing Josephson device to output a second electromagnetic wave through the second three-wave mixing Josephson device. The method includes transmitting a third electromagnetic wave via the second 90 deg. hybrid to a third 90 deg. hybrid; and detecting a parity of a first magnet field applied by a first magnetic source and a second magnetic field applied by a second magnetic source based on constructive wave interference or destructive wave interference of the second electromagnetic wave and the third electromagnetic wave.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: August 2, 2022
    Assignee: International Business Machines Corporation
    Inventor: Baleegh Abdo
  • Patent number: 11398593
    Abstract: A process for fabricating an electronic component incorporating double quantum dots and split gates includes providing a substrate surmounted with a stack of a semiconductor layer and of a dielectric layer that is formed above the semiconductor layer. The process also includes forming a mask on the dielectric layer and etching the dielectric layer and the semiconductor layer with the pattern of the mask, so as to form a stack of a semiconductor nanowire and of a dielectric hard mask. Finally, the process includes depositing a gate material on all of the wafer and carrying out a planarization, until the dielectric hard mask is reached, so as to form first and second gates that are electrically insulated from each other on either side of said nanowire.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: July 26, 2022
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Sylvain Barraud, Louis Hutin, Maud Vinet
  • Patent number: 11390804
    Abstract: A quantum dot having a core including a first semiconductor nanocrystal including zinc, selenium, and tellurium, and a semiconductor nanocrystal shell disposed on the surface of the core, the shell including zinc, selenium, and sulfur. The quantum dot is configured to emit green light, the quantum dot does not include cadmium, and the quantum dot has a mole ratio Te:Se of tellurium relative to selenium of greater than about 0.05 and less than or equal to about 0.5:1. A method of producing the quantum dot and an electronic device including the same.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: July 19, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yuho Won, Yong Wook Kim, Eun Joo Jang, Hyo Sook Jang
  • Patent number: 11393938
    Abstract: A photovoltaic device and a method of making the photovoltaic device are disclosed. The photovoltaic device may include a semiconductor layer epitaxially grown using a compound semiconductor material, such as a group III-V semiconductor material, wherein a surface of the semiconductor layer is textured via one or more laser pulses of a laser. The photovoltaic device may also include a dielectric layer deposited over the textured surface of the semiconductor layer, and a back metal reflector provided on the dielectric layer. The textured surface extends a path of light traveling through the photovoltaic device to increase absorption of the light within the photovoltaic device.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: July 19, 2022
    Assignee: UTICA LEASECO, LLC
    Inventors: Octavi Santiago Escala Semonin, Daniel Guilford Patterson, Reto Adrian Furler, Andrew James Ritenour
  • Patent number: 11392848
    Abstract: A qubit assembly includes a first superconducting loop comprising a first Josephson junction and a second Josephson junction, a second superconducting loop comprising the second Josephson junction and a third Josephson junction, and a third superconducting loop comprising the third Josephson junction and a fourth Josephson junction. A flux source is configured to provide a control flux to the second superconducting loop, such that the effective commutation relations between a first quantum operator corresponding to current in the first superconducting loop and a second quantum operator corresponding to current in the third superconducting loop can be changed by changing a magnitude of the control flux provided to the second superconducting loop by the flux source.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: July 19, 2022
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventor: David James Clarke