Patents Examined by Matthew Reames
  • Spacer formation on semiconductor device
    Patent number: 9911831
    Abstract: A method for forming a semiconductor device comprising forming a semiconductor fin on a substrate, forming a first sacrificial gate stack over a first channel region of the fin and forming a second sacrificial gate stack over a second channel region of the fin, forming spacers adjacent to the first sacrificial gate stack and the second sacrificial gate stack, depositing a first liner layer on the spacers, the first sacrificial gate stack and the second sacrificial gate stack, depositing a first sacrificial layer on the first liner layer, removing a portion of the first sacrificial layer over the first gate stack to expose a portion of the first liner layer on the first sacrificial gate stack, and growing a first semiconductor material on exposed portions of the fin to form a first source/drain region adjacent to the first gate sacrificial gate stack.
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: March 6, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thamarai Selvi Devarajan, Sanjay C. Mehta, Eric R. Miller, Soon-Cheon Seo
  • Optoelectronic device including quantum dot
    Patent number: 9905790
    Abstract: Provided are optoelectronic devices including quantum dots. An optoelectronic device may include an active layer including a quantum dot and at least one molecular interlayer adjacent to the active layer. The active layer may be provided between two electrodes, and a charge transfer layer may be provided adjacent to the active layer. The molecular interlayer may be provided between the active layer and the charge transfer layer. The molecular interlayer may have a smaller amount of surface charge than the charge transfer layer. The molecular interlayer may include a nonionic material or a hydrophobic material. The charge transfer layer may include an electron transport layer, and the electron transport layer may include an inorganic semiconductor.
    Type: Grant
    Filed: April 6, 2016
    Date of Patent: February 27, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Weonkyu Koh, Taeho Shin, Kyungsang Cho
  • Quantum dot phosphor for light emitting diode and method of preparing the same
    Patent number: 9902902
    Abstract: Disclosed herein is a quantum dot phosphor for light emitting diodes, which includes quantum dots and a solid substrate on which the quantum dots are supported. Also, a method of preparing the quantum dot phosphor is provided. Since the quantum dot phosphor of the current invention is composed of the quantum dots supported on the solid substrate, the quantum dots do not aggregate when dispensing a paste obtained by mixing the quantum dots with a paste resin for use in packaging of a light emitting diode. Thereby, a light emitting diode able to maintain excellent light emitting efficiency can be manufactured.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: February 27, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Eun Joo Jang, Mi Yang Kim, Hyung Kun Kim, Shin Ae Jun, Yong Wan Jin, Seong Jae Choi
  • Silicon-carbide trench gate MOSFETs
    Patent number: 9893176
    Abstract: In a general aspect, an apparatus can include a silicon carbide (SiC) trench gate MOSFET with improved operation due, at least in part, to a reduced gate capacitance. In the SiC trench gate MOSFET, a thick gate oxide can be formed on a bottom surface of the gate trench and a built-in channel, having a vertical portion and a lateral portion, can be formed to electrically connect a vertical inversion-layer channel, such as in a channel stopper layer, to a vertical JFET channel region and a drift region.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: February 13, 2018
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Andrei Konstantinov
  • Magnetoresistive structure having two dielectric layers, and method of manufacturing same
    Patent number: 9893275
    Abstract: A magnetoresistive structure having two dielectric layers, and method of manufacturing same, includes a free magnetic layer positioned between the two dielectric layers. The method of manufacture comprises at least two etch processes and at least one encapsulation process interposed therebetween wherein the encapsulation is formed on sidewalls of the partially formed magnetoresistive stack between etch processes.
    Type: Grant
    Filed: January 2, 2017
    Date of Patent: February 13, 2018
    Assignee: Everspin Technologies, Inc.
    Inventors: Sanjeev Aggarwal, Kerry Nagel, Jason Janesky
  • Fin-type field effect transistor device and method of fabricating the same
    Patent number: 9893184
    Abstract: In accordance with some embodiments of the present disclosure, a fin-FET device includes a substrate, a stack structure, a source and drain region, a sidewall insulator and a metal connector. The stack structure including a gate stack is disposed on the substrate. The source and drain region is disposed beside the stack structure. The sidewall insulator is disposed on the source and drain region. The sidewall insulator includes a bottom portion and an upper portion. An interface is formed between the bottom portion and the upper portion and the bottom portion is located between the upper portion and the source and drain region. The metal connector stacks on the source and drain region and the sidewall insulator is located between the metal connector and the stack structure.
    Type: Grant
    Filed: December 15, 2015
    Date of Patent: February 13, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Che-Cheng Chang, Chih-Han Lin, Horng-Huei Tseng
  • Middle of the line integrated efuse in trench EPI structure
    Patent number: 9881869
    Abstract: A fuse includes a semiconductor layer having a dielectric material formed thereon. An epitaxially grown material is formed in a trench within the dielectric material. The epitaxially grown material includes a peak region. A fuse metal is formed over the peak region and extends along sidewalls of the trench and over the dielectric material outside the trench. Contacts are formed outside the trench connecting to fuse metal over the dielectric material.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: January 30, 2018
    Assignee: International Business Machines Corporation
    Inventors: Hong He, Juntao Li, Junli Wang, Chih-Chao Yang
  • Materials and methods for the preparation of nanocomposites
    Patent number: 9882001
    Abstract: Disclosed herein is an isolable colloidal particle comprising a nanoparticle and an inorganic capping agent bound to the surface of the nanoparticle, a method for making the same in a biphasic solvent mixture, and the formation of structures and solids from the isolable colloidal particle. The process can yield photovoltaic cells, piezoelectric crystals, thermoelectric layers, optoelectronic layers, light emitting diodes, ferroelectric layers, thin film transistors, floating gate memory devices, phase change layers, and sensor devices.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: January 30, 2018
    Assignee: THE UNIVERSITY OF CHICAGO
    Inventors: Angshuman Nag, Dmitri V. Talapin
  • LED with patterned surface features based on emission field patterns
    Patent number: 9876141
    Abstract: The escape surface of a light emitting element includes features (310) that include sloped surfaces (312, 314) that have angles of inclination that are based on the direction of peak light output from the light emitting element. If the light output exhibits a number of lobes at different directions, the sloped surfaces (312, 314) may have a corresponding number of different angles of inclination (as in FIGS. 3b and 3c). To minimize the re-injection of light into adjacent features, adjacent features may be positioned to avoid having surfaces that directly face each other. The features may be shaped or positioned to provide a pseudo-random distribution of inclined surfaces across the escape surface, and multiple roughening processes may be used.
    Type: Grant
    Filed: June 12, 2014
    Date of Patent: January 23, 2018
    Assignee: KONINKLIJKE PHILIPS N.V.
    Inventor: Toni Lopez
  • Touch panel and fabrication method thereof
    Patent number: 9874954
    Abstract: A touch panel and a fabricating method thereof are provided in the instant disclosure. The touch panel having a non-display area and a display area includes a shielding layer disposed on a side of a substrate and defining the non-display area on the substrate; a sensing electrode layer disposed on the substrate at the same side as the shielding layer, wherein at least one portion of the sensing electrode layer is disposed on a surface of the substrate in the display area; a first protecting layer disposed in the display area and covering the sensing electrode layer; and a second protecting layer disposed in the non-display area and covering the shielding layer. By modifying the structure of the protecting layer, the height difference between the sensing electrode layer and the shielding layer may not cause the color difference due to the non-uniform protecting layer.
    Type: Grant
    Filed: June 4, 2014
    Date of Patent: January 23, 2018
    Assignee: TPK Touch Solutions (Xiamen) Inc.
    Inventors: Yuh-Wen Lee, Chuangdai Tang, Xianbin Xu, Fengming Lin
  • Light emitting device
    Patent number: 9865573
    Abstract: A light emitting device including a supporting body; first wirings formed on a surface of the supporting body; second wirings formed on the surface of the supporting body; a plurality of first light emitting elements, which are flip-chip mounted on respective ones of the first wirings and are electrically connected to each other by the first wirings; and a second light emitting element electrically connected to at least one of the second wirings. The second light emitting element is disposed on at least one of the first wirings at a location between at least two of the electrically-connected first light emitting elements, without being electrically connected to said at least one of the first wirings.
    Type: Grant
    Filed: January 17, 2017
    Date of Patent: January 9, 2018
    Assignee: NICHIA CORPORATION
    Inventor: Yusuke Kawano
  • Display device
    Patent number: 9865661
    Abstract: A display device includes a pixel electrode provided on an insulating surface, a pixel separation film provided on an end of the pixel electrode, a light-emitting layer provided to cover the pixel electrode, and a counter electrode provided to cover the light-emitting layer and the pixel separation film. The pixel separation film includes a photoelectric conversion element, one of a first electrode and a second electrode of the photoelectric conversion element is electrically connected to the counter electrode, and the other is electrically connected to a wiring through which current generated by the photoelectric conversion element flows.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: January 9, 2018
    Assignee: Japan Display Inc.
    Inventor: Toshihiro Sato
  • FinFET CMOS with Si NFET and SiGe PFET
    Patent number: 9865509
    Abstract: A method for forming a complementary metal oxide semiconductor (CMOS) device includes growing a SiGe layer on a Si semiconductor layer, and etching fins through the SiGe layer and the Si semiconductor layer down to a buried dielectric layer. Spacers are formed on sidewalls of the fins, and a dielectric material is formed on top of the buried dielectric layer between the fins. The SiGe layer is replaced with a dielectric cap for an n-type device to form a Si fin. The Si semiconductor layer is converted to a SiGe fin for a p-type device by oxidizing the SiGe layer to condense Ge. The dielectric material is recessed to below the spacers, and the dielectric cap and the spacers are removed to expose the Si fin and the SiGe fin.
    Type: Grant
    Filed: August 17, 2016
    Date of Patent: January 9, 2018
    Assignee: International Business Machines Corporation
    Inventors: Kangguo Cheng, Ramachandra Divakaruni, Jeehwan Kim
  • Schottky barrier diode and method for manufacturing the same
    Patent number: 9865701
    Abstract: A Schottky barrier diode includes: an n+ type of silicon carbide substrate; an n? type of epitaxial layer formed on a first surface of the n+ type of silicon carbide substrate; a plurality of p+ regions formed inside the n? type of epitaxial layer; a Schottky electrode formed in an upper portion of the n? type of epitaxial layer of an electrode region; and an ohmic electrode formed on a second surface of the n+ type of silicon carbide substrate, wherein the plurality of p+ regions are formed to be spaced apart from each other at a predetermined interval within the n? type of epitaxial layer.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: January 9, 2018
    Assignee: Hyundai Motor Company
    Inventors: Youngkyun Jung, Junghee Park, Dae Hwan Chun, JongSeok Lee
  • Image sensor
    Patent number: 9865635
    Abstract: An image sensor and a method of fabricating the same are disclosed. The image sensor may include a substrate including an active region defined by a device isolation layer, a photoelectric conversion layer, a well impurity layer, a floating diffusion region, and a transfer gate. When viewed in a plan view, a lower portion of the transfer gate may include a first surface in contact with the device isolation layer, a second surface substantially perpendicular to the first surface, and a third surface connected to the first and second surfaces. The third surface may face the floating diffusion region. A first portion of a gate insulating layer may be adjacent to the third surface and thinner than a portion adjacent to the first surface or the second surface, and this may facilitate more efficient transfer of an electron from the photoelectric conversion layer to the floating diffusion region.
    Type: Grant
    Filed: January 17, 2017
    Date of Patent: January 9, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Donghyuk Park, Seungwon Cha, Cheolju Kang, Yitae Kim, Jongeun Park, Jungchak Ahn, Yujung Choi
  • Substrate heat treatment apparatus and heat treatment method
    Patent number: 9859137
    Abstract: A method for forming a semiconductor device structure and an apparatus for heating a semiconductor substrate are provided. The method includes spin coating a material layer over a semiconductor substrate. The method also includes heating the material layer by using a first heater above the semiconductor substrate and a second heater below the semiconductor substrate.
    Type: Grant
    Filed: May 30, 2014
    Date of Patent: January 2, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Chun-Cha Kuo, Wen-Long Lee, Tzu-Chien Cheng, Ding-I Liu
  • Bipolar transistor compatible with vertical FET fabrication
    Patent number: 9859172
    Abstract: Integrated chips and methods of forming the same include forming a gate stack around a first semiconductor fin and a second semiconductor fin. The gate stack around the second semiconductor fin is etched away. An extrinsic base is formed around the second semiconductor fin in a region exposed by etching away the gate stack.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: January 2, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Brent A. Anderson, Kangguo Cheng, Terence B. Hook, Tak H. Ning
  • Thin film transistor array substrate
    Patent number: 9853067
    Abstract: A thin film transistor array substrate includes a substrate, a plurality of pixel elements arranged on the substrate, each of the pixel elements including a thin film transistor and a pixel electrode electrically connected with the thin film transistor, a light shielding electrode disposed between the substrate and the thin film transistor to shield a channel of the thin film transistor, and a storage capacitor including a first electrode and a second electrode disposed opposite to each other. The light shielding electrode includes a transparent electrically-conductive layer and a non-transparent electrically-conductive layer stacked on top of each other. The first electrode of the storage capacitor is disposed in a same layer and of a same material as the transparent electrically-conductive layer of the light shielding electrode.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: December 26, 2017
    Assignee: SHANGHAI TIANMA MICRO-ELECTRONICS CO., LTD.
    Inventors: Tao Cai, Bengang Zhao
  • Method of manufacturing display device
    Patent number: 9842890
    Abstract: A method of manufacturing a display device includes forming an electrode layer including a first metallic element on a substrate; sequentially forming an insulating layer including a first material and a photosensitive pattern layer including a first pattern on the electrode layer; forming a plurality of fine patterns including a first layer that includes the first material and a second layer by etching the photosensitive pattern layer and the insulating layer; and forming a plurality of scattering bumps by removing the second layer of each of the plurality of fine patterns.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: December 12, 2017
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yongjae Jang, Jaehyuk Jang
  • Use of centrosymmetric Mott insulators in a resistive switched memory for storing data
    Patent number: 9837607
    Abstract: A material belonging to the family of centrosymmetric Mott insulators is used as an active material in a resistively switched memory for storing data. The material is placed between two electrical electrodes, by virtue of which an electric field of a preset value is applied in order to form, by way of an electron avalanche effect, an elementary information cell that has at least two logic states.
    Type: Grant
    Filed: April 10, 2013
    Date of Patent: December 5, 2017
    Assignees: CNRS—CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE, UNIVERSITE DE NANTES
    Inventors: Laurent Cario, Etienne Janod, Benoit Corraze, Marie-Paule Besland, Vincent Guiot