Abstract: Generating an embedded resistor in a semiconductor device includes forming a shallow trench isolation (STI) region in a substrate; forming a pad oxide on the STI region and substrate; depositing a silicon layer on the pad oxide; forming a photo-resist mask on a portion of the silicon layer disposed above the STI region; etching the silicon layer to yield a polyconductor above the STI region; oxidizing the polyconductor; depositing an oxide material or a metal gate material on the oxidized surface; depositing a silicon layer on the oxide material or metal gate material; depositing additional silicon on a portion of the silicon layer above the STI region; patterning a transistor gate with a photo-resist mask on another portion of the silicon layer away from the STI region; and etching the silicon layer to yield a transistor structure away from the STI region and a resistor structure above the STI region.

Abstract: The scribe line structure for wafer dicing according to the present invention includes a plurality of metal structures arranged up-and-down on a substrate in a dielectric layer, and an upper one of the metal structures has a lower metal density than a lower one of the metal structures. In another aspect, the scribe line structure for wafer dicing includes a plurality of metal structures arranged up-and-down on a substrate in a dielectric layer, and each of the metal structures has a lower metal density on a dicing path for the wafer dicing than not on the dicing path. The scribe line structure can effectively avoid interlayer delamination or peeling issue caused by a dicing process, especially on a low-k/Cu wafer.

Abstract: A method for manufacturing a semiconductor device includes forming in order a barrier film, an insulating film, a first mask, and a second mask having etching properties different from those of the first mask on a substrate, removing the insulating film, the first mask, and the second mask to form a via hole in the insulating film, removing the second mask in a wiring trench forming region including the via hole, and etching the first mask using the second mask as a mask to remove the first mask in the wiring trench forming region. Removing the first mask in the wiring trench forming region includes etching the first mask and etching the barrier film at the bottom of the via hole to partially remove the barrier film at the bottom of the via hole.

Abstract: A method of fabricating a leadframe-based semiconductor package, and a semiconductor package formed thereby, are disclosed. The semiconductor package includes a leadframe and one or more semiconductor die affixed to a die paddle of the leadframe. The leadframe is formed with a plurality of electrical terminals that get surface mounted to a host PCB. The leadframe further includes one or more extended leads, at least one of which includes an electrically conductive island which gets surface mounted to the host PCB with the electrical terminals. The islands effectively increase the number terminals within the package without adding footprint to the package.

Abstract: A semiconductor device includes: a first interlayer insulating film; a first conductive member provided lower than the first interlayer insulating film; a contact plug that penetrates through the first interlayer insulating film, and is electrically connected to the first conductive member, the contact plug including a small-diameter part, and a large-diameter part arranged on the small-diameter part, an outer diameter of the large-diameter part being larger than an outer diameter of the small-diameter part, and the outer diameter of the large-diameter part being larger than an outer diameter of a connection face between the second conductive member and the large-diameter part; and a second conductive member that is provided on the first interlayer insulating film, and is electrically connected to the contact plug.

Abstract: A semiconductor device and method for fabricating a semiconductor device incorporating gate control over a resonant tunneling structure. The semiconductor device includes a source terminal, a gate terminal, a drain terminal, and a resonant tunneling structure located beneath or adjacent to the gate terminal, where the gate terminal controls an electrostatic potential drop through the resonant tunneling structure as well as controlling a potential within a portion of the conduction channel immediately beneath the gate terminal as in a MOSFET. The semiconductor device is fabricated by growing epitaxial layers of tunnel barriers and quantum wells, where a quantum well is formed between each set of two tunneling barriers. Additionally, the epitaxial layers of tunnel barriers and quantum wells are grown, etched and patterned to form a resonant tunneling structure. Further, the semiconductor device is grown, etched and patterned to form a gate, source and drain electrode.

Abstract: A method of manufacturing the semiconductor device is provided, which provides a prevention for a “dug” of a silicon substrate caused by the etching in regions except a region for forming a film during a removal of the film with a chemical solution. A method of manufacturing a semiconductor device according to an embodiment of the present invention includes forming a first silicon oxide film on a surface of a silicon substrate or on a surface of a gate electrode when a silicon nitride film for a dummy side wall is etched off, to provide a protection for such surfaces, and then etching a portion of the silicon nitride film with a chemical solution, and then a second oxide film for supplementing a simultaneously-etched portion of the first silicon oxide film is formed, and eventually performing an etching for completely removing the silicon nitride film for the dummy side wall.

Abstract: Provided are a tape, apparatus, and method that relate generally to a single layer adhesive which functions as a dicing tape and also as a die attach adhesive for dicing thinned wafers and subsequent die attach operations of the diced chips in semiconductor device fabrication. The tape, apparatus, and method include a backing with a surface modification that includes a pattern.

Abstract: A CMOS image sensor includes a photosensitive device, a floating diffusion region, a transfer transistor, and a pocket photodiode formed in a semiconductor substrate of a first conductivity type. The floating diffusion region is of a second conductivity type. The transfer transistor has a channel region disposed between the photosensitive device and the floating diffusion region. The pocket photodiode is of the second conductivity type and is formed under a first portion of a bottom surface of the channel region such that a second portion of the bottom surface of the channel region abuts the semiconductor substrate.

Abstract: A solid state imaging device including photoelectric conversion devices which are arranged two-dimensionally; a color filter including a plurality of picture elements, each disposed corresponding to each of the photoelectric conversion devices; and a plurality of transfer lenses each disposed corresponding to each of the picture elements, formed of a thermoset acrylic resin, and formed directly on each of the picture elements, wherein a gap between neighboring transfer lenses is not more than 0.035 ?m, and a contact length between neighboring transfer lenses is within the range of 3-80% of the pitch of the plurality of transfer lenses.

Abstract: A method for forming an isolation layer in a semiconductor device includes forming a trench in a semiconductor substrate. A flowable insulation layer is formed to fill the trench. The flowable insulation layer is recessed. A buried insulation layer is deposited on the flowable insulation layer while keeping a deposition sputtering rate (DSR) below about 22 so as to fill the trench with the buried insulation layer while restraining the buried insulation layer from growing on a lateral portion of the trench.

Abstract: Provided are a method for antireflection treatment of a zinc oxide film and a method for manufacturing a solar cell using the same. In the anti-reflection treatment, a substrate is prepared, then a polycrystalline zinc oxide film is formed on the substrate. A surface of the polycrystalline zinc oxide film is textured. Here, the roughening of the surface of the polycrystalline zinc oxide film comprises wet-etching the polycrystalline zinc oxide film on the substrate using an etching solution mixed with nitric acid and hydrogen peroxide.

Abstract: A method of fabricating an organic thin film transistor exhibiting excellent semiconductor performance by which an organic TFT can be formed continuously on a flexible base such as a polymer support through a simple coating process, and thus the fabrication cost can be reduced sharply, and an organic semiconductor layer thus formed has a high carrier mobility, In the method of fabricating an organic thin film transistor by forming a gate electrode, a gate insulation layer, an organic semiconductor layer, a source electrode and a drain electrode sequentially on a support, the organic semiconductor layer contains an organic semiconductor material having an exothermic point and an endothermic point in a differential scanning thermal analysis, and the organic semiconductor layer thus formed is heat-treated at a temperature not less than the exothermic point and less than the endothermic point.

Abstract: An object of the present invention is to provide a method and a device for constantly setting the energy distribution of a laser beam on an irradiating face, and uniformly irradiating the laser beam to the entire irradiating face. Further, another object of the present invention is to provide a manufacturing method of a semiconductor device including this laser irradiating method in a process. Therefore, the present invention is characterized in that the shapes of plural laser beams on the irradiating face are formed by an optical system in an elliptical shape or a rectangular shape, and the plural laser beams are irradiated while the irradiating face is moved in a first direction, and the plural laser beams are irradiated while the irradiating face is moved in a second direction and is moved in a direction reverse to the first direction.

Abstract: A nitrogen-free anti-reflective layer for use in semiconductor photolithography is fabricated in a chemical vapor deposition process, optionally plasma-enhanced, using a gaseous mixture of carbon, silicon, and oxygen sources. By varying the process parameters, a substantially hermetic layer with acceptable values of the refractive index n and extinction coefficient k can be obtained. The nitrogen-free moisture barrier anti-reflective layer produced by this technique improves plasma etch of features such as vias in subsequent processing steps.

Abstract: Methods of fabricating light emitting elements and light emitting devices, light emitting elements and light emitting devices are provided. In some embodiments, the methods of fabricating a light emitting element includes forming a buffer layer on at least one first substrate, bonding the at least one first substrate on a second substrate, wherein the buffer layer is placed between each of the first substrate and the second substrate and the second substrate is larger than the first substrate, exposing the buffer layer, and sequentially forming a first conductive layer, a light emitting layer, and a second conductive layer on the exposed buffer layer.

Abstract: Provided are a semiconductor device which can be manufactured at low cost and has a low on-resistance and a high withstand voltage, and its manufacturing method. The semiconductor device comprises an N-type well area formed on a P-type semiconductor substrate, a P-type body area formed within the well area, an N-type source area formed within the body area, an N-type drain area formed at a distance from the body area within the well area, a gate insulating film formed so as to overlay a part of the body area, a gate electrode formed on the gate insulating film and a P-type buried diffusion area which makes contact with the bottom of the body area and extends to an area beneath the drain area in a direction parallel to the surface of the semiconductor substrate within the well area.

Abstract: The present invention relates to a method for metallizing semiconductor components in which aluminium is used. In particular in the case of products in which the process costs play a big part, such as e.g. solar cells based on silicon, a cost advantage can be achieved with the invention. In addition, the present invention relates to the use of the method, for example in the production of solar cells.

Abstract: A semiconductor device includes a semiconductor wafer, a source region and a drain region formed within the semiconductor wafer, a gate electrode formed on the semiconductor wafer between the source region and the drain region, an interlayer film formed on the semiconductor wafer and the gate electrode, and a dummy floating pattern embedded into the interlayer film, having a film containing metal or a metallic compound having tensile stress or compressive stress and formed to be spaced from the semiconductor wafer and the gate electrode.

Abstract: A method for fabricating a semiconductor device includes: forming an etch stop pattern over a conductive layer, the etch stop pattern having a first opening exposing a top surface of the conductive layer; forming an insulation layer over the etch stop pattern; selectively etching the insulation layer to form a second opening exposing the top surface of the conductive layer; and enlarging the second opening until the etch stop pattern is exposed.